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Slightly reimplement some recently added helper functions as methods, so

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that drivers are not reaching into the internals of the pci bus.  There
are no driver changes, the public interface is the same.
This commit is contained in:
Peter Wemm 2001-02-27 23:13:20 +00:00
parent cf87044e5e
commit 9eb13b3914
3 changed files with 113 additions and 35 deletions
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75
sys/dev/pci/pci.c
View File

@ -99,6 +99,17 @@ static u_int32_t pci_read_config_method(device_t dev, device_t child,
int reg, int width);
static void pci_write_config_method(device_t dev, device_t child,
int reg, u_int32_t val, int width);
static void pci_enable_busmaster_method(device_t dev,
device_t child);
static void pci_disable_busmaster_method(device_t dev,
device_t child);
static void pci_enable_io_method(device_t dev, device_t child,
int space);
static void pci_disable_io_method(device_t dev, device_t child,
int space);
static int pci_set_powerstate_method(device_t dev, device_t child,
int state);
static int pci_get_powerstate_method(device_t dev, device_t child);
static int pci_modevent(module_t mod, int what, void *arg);
static device_method_t pci_methods[] = {
@ -130,6 +141,12 @@ static device_method_t pci_methods[] = {
/* PCI interface */
DEVMETHOD(pci_read_config, pci_read_config_method),
DEVMETHOD(pci_write_config, pci_write_config_method),
DEVMETHOD(pci_enable_busmaster, pci_enable_busmaster_method),
DEVMETHOD(pci_disable_busmaster, pci_disable_busmaster_method),
DEVMETHOD(pci_enable_io, pci_enable_io_method),
DEVMETHOD(pci_disable_io, pci_disable_io_method),
DEVMETHOD(pci_get_powerstate, pci_get_powerstate_method),
DEVMETHOD(pci_set_powerstate, pci_set_powerstate_method),
{ 0, 0 }
};
@ -435,16 +452,16 @@ pci_freecfg(struct pci_devinfo *dinfo)
/*
* PCI power manangement
*/
int
pci_set_powerstate(device_t dev, int state)
static int
pci_set_powerstate_method(device_t dev, device_t child, int state)
{
struct pci_devinfo *dinfo = device_get_ivars(dev);
struct pci_devinfo *dinfo = device_get_ivars(child);
pcicfgregs *cfg = &dinfo->cfg;
u_int16_t status;
int result;
if (cfg->pp_cap != 0) {
status = pci_read_config(dev, cfg->pp_status, 2) & ~PCIM_PSTAT_DMASK;
status = PCI_READ_CONFIG(dev, child, cfg->pp_status, 2) & ~PCIM_PSTAT_DMASK;
result = 0;
switch (state) {
case PCI_POWERSTATE_D0:
@ -471,23 +488,23 @@ pci_set_powerstate(device_t dev, int state)
result = EINVAL;
}
if (result == 0)
pci_write_config(dev, cfg->pp_status, status, 2);
PCI_WRITE_CONFIG(dev, child, cfg->pp_status, status, 2);
} else {
result = ENXIO;
}
return(result);
}
int
pci_get_powerstate(device_t dev)
static int
pci_get_powerstate_method(device_t dev, device_t child)
{
struct pci_devinfo *dinfo = device_get_ivars(dev);
struct pci_devinfo *dinfo = device_get_ivars(child);
pcicfgregs *cfg = &dinfo->cfg;
u_int16_t status;
int result;
if (cfg->pp_cap != 0) {
status = pci_read_config(dev, cfg->pp_status, 2);
status = PCI_READ_CONFIG(dev, child, cfg->pp_status, 2);
switch (status & PCIM_PSTAT_DMASK) {
case PCIM_PSTAT_D0:
result = PCI_POWERSTATE_D0;
@ -517,59 +534,59 @@ pci_get_powerstate(device_t dev)
*/
static __inline void
pci_set_command_bit(device_t dev, u_int16_t bit)
pci_set_command_bit(device_t dev, device_t child, u_int16_t bit)
{
u_int16_t command;
command = pci_read_config(dev, PCIR_COMMAND, 2);
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
command |= bit;
pci_write_config(dev, PCIR_COMMAND, command, 2);
PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
}
static __inline void
pci_clear_command_bit(device_t dev, u_int16_t bit)
pci_clear_command_bit(device_t dev, device_t child, u_int16_t bit)
{
u_int16_t command;
command = pci_read_config(dev, PCIR_COMMAND, 2);
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
command &= ~bit;
pci_write_config(dev, PCIR_COMMAND, command, 2);
PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
}
void
pci_enable_busmaster(device_t dev)
static void
pci_enable_busmaster_method(device_t dev, device_t child)
{
pci_set_command_bit(dev, PCIM_CMD_BUSMASTEREN);
pci_set_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
}
void
pci_disable_busmaster(device_t dev)
static void
pci_disable_busmaster_method(device_t dev, device_t child)
{
pci_clear_command_bit(dev, PCIM_CMD_BUSMASTEREN);
pci_clear_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
}
void
pci_enable_io(device_t dev, int space)
static void
pci_enable_io_method(device_t dev, device_t child, int space)
{
switch(space) {
case SYS_RES_IOPORT:
pci_set_command_bit(dev, PCIM_CMD_PORTEN);
pci_set_command_bit(dev, child, PCIM_CMD_PORTEN);
break;
case SYS_RES_MEMORY:
pci_set_command_bit(dev, PCIM_CMD_MEMEN);
pci_set_command_bit(dev, child, PCIM_CMD_MEMEN);
break;
}
}
void
pci_disable_io(device_t dev, int space)
static void
pci_disable_io_method(device_t dev, device_t child, int space)
{
switch(space) {
case SYS_RES_IOPORT:
pci_clear_command_bit(dev, PCIM_CMD_PORTEN);
pci_clear_command_bit(dev, child, PCIM_CMD_PORTEN);
break;
case SYS_RES_MEMORY:
pci_clear_command_bit(dev, PCIM_CMD_MEMEN);
pci_clear_command_bit(dev, child, PCIM_CMD_MEMEN);
break;
}
}

33
sys/dev/pci/pci_if.m
View File

@ -44,3 +44,36 @@ METHOD void write_config {
u_int32_t val;
int width;
};
METHOD int get_powerstate {
device_t dev;
device_t child;
};
METHOD int set_powerstate {
device_t dev;
device_t child;
int state;
};
METHOD void enable_busmaster {
device_t dev;
device_t child;
};
METHOD void disable_busmaster {
device_t dev;
device_t child;
};
METHOD void enable_io {
device_t dev;
device_t child;
int space;
};
METHOD void disable_io {
device_t dev;
device_t child;
int space;
};

40
sys/dev/pci/pcivar.h
View File

@ -263,10 +263,29 @@ PCIB_ACCESSOR(bus, BUS, u_int32_t)
* These should be used in preference to manually manipulating
* configuration space.
*/
extern void pci_enable_busmaster(device_t dev);
extern void pci_disable_busmaster(device_t dev);
extern void pci_enable_io(device_t dev, int space);
extern void pci_disable_io(device_t dev, int space);
static __inline void
pci_enable_busmaster(device_t dev)
{
PCI_ENABLE_BUSMASTER(device_get_parent(dev), dev);
}
static __inline void
pci_disable_busmaster(device_t dev)
{
PCI_DISABLE_BUSMASTER(device_get_parent(dev), dev);
}
static __inline void
pci_enable_io(device_t dev, int space)
{
PCI_ENABLE_IO(device_get_parent(dev), dev, space);
}
static __inline void
pci_disable_io(device_t dev, int space)
{
PCI_DISABLE_IO(device_get_parent(dev), dev, space);
}
/*
* PCI power states are as defined by ACPI:
@ -289,8 +308,17 @@ extern void pci_disable_io(device_t dev, int space);
#define PCI_POWERSTATE_D3 3
#define PCI_POWERSTATE_UNKNOWN -1
extern int pci_set_powerstate(device_t dev, int state);
extern int pci_get_powerstate(device_t dev);
static __inline int
pci_set_powerstate(device_t dev, int state)
{
return PCI_SET_POWERSTATE(device_get_parent(dev), dev, state);
}
static __inline int
pci_get_powerstate(device_t dev)
{
return PCI_GET_POWERSTATE(device_get_parent(dev), dev);
}
#endif /* _SYS_BUS_H_ */