Add more definitions for vendor-specific CPU capability bits to the last
revision, which is renamed to "Intel Processor Vendor-Specific ACPI".
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@ -186,18 +186,20 @@ extern struct mtx acpi_mutex;
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/*
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* Various features and capabilities for the acpi_get_features() method.
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* In particular, these are used for the ACPI 3.0 _PDC and _OSC methods.
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* See the Intel document titled "Processor Driver Capabilities Bit
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* Definitions", number 302223-002.
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* See the Intel document titled "Intel Processor Vendor-Specific ACPI",
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* number 302223-005.
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*/
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#define ACPI_CAP_PERF_MSRS (1 << 0) /* Intel SpeedStep PERF_CTL MSRs */
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#define ACPI_CAP_C1_IO_HALT (1 << 1) /* Intel C1 "IO then halt" sequence */
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#define ACPI_CAP_THR_MSRS (1 << 2) /* Intel OnDemand throttling MSRs */
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#define ACPI_CAP_SMP_SAME (1 << 3) /* MP C1, Px, and Tx (all the same) */
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#define ACPI_CAP_SMP_SAME_C3 (1 << 4) /* MP C2 and C3 (all the same) */
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#define ACPI_CAP_SMP_DIFF_PX (1 << 5) /* MP Px (different, using _PSD) */
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#define ACPI_CAP_SMP_DIFF_CX (1 << 6) /* MP Cx (different, using _CSD) */
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#define ACPI_CAP_SMP_DIFF_TX (1 << 7) /* MP Tx (different, using _TSD) */
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#define ACPI_CAP_SMP_C1_NATIVE (1 << 8) /* MP C1 support other than halt */
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#define ACPI_CAP_PERF_MSRS (1 << 0) /* Intel SpeedStep PERF_CTL MSRs */
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#define ACPI_CAP_C1_IO_HALT (1 << 1) /* Intel C1 "IO then halt" sequence */
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#define ACPI_CAP_THR_MSRS (1 << 2) /* Intel OnDemand throttling MSRs */
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#define ACPI_CAP_SMP_SAME (1 << 3) /* MP C1, Px, and Tx (all the same) */
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#define ACPI_CAP_SMP_SAME_C3 (1 << 4) /* MP C2 and C3 (all the same) */
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#define ACPI_CAP_SMP_DIFF_PX (1 << 5) /* MP Px (different, using _PSD) */
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#define ACPI_CAP_SMP_DIFF_CX (1 << 6) /* MP Cx (different, using _CSD) */
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#define ACPI_CAP_SMP_DIFF_TX (1 << 7) /* MP Tx (different, using _TSD) */
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#define ACPI_CAP_SMP_C1_NATIVE (1 << 8) /* MP C1 support other than halt */
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#define ACPI_CAP_SMP_C3_NATIVE (1 << 9) /* MP C2 and C3 support */
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#define ACPI_CAP_PX_HW_COORD (1 << 11) /* Intel P-state HW coordination */
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/*
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* Quirk flags.
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