Add tunable for XHCI port routing.
MFC after: 1 week
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@ -84,14 +84,17 @@ __FBSDID("$FreeBSD$");
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((uint8_t *)&(((struct xhci_softc *)0)->sc_bus))))
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#ifdef USB_DEBUG
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static int xhcidebug = 0;
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static int xhcidebug;
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static int xhciroute;
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static SYSCTL_NODE(_hw_usb, OID_AUTO, xhci, CTLFLAG_RW, 0, "USB XHCI");
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SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RW,
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&xhcidebug, 0, "Debug level");
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SYSCTL_INT(_hw_usb_xhci, OID_AUTO, xhci_port_route, CTLFLAG_RW,
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&xhciroute, 0, "Routing bitmap for switching EHCI ports to XHCI controller");
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TUNABLE_INT("hw.usb.xhci.debug", &xhcidebug);
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TUNABLE_INT("hw.usb.xhci.xhci_port_route", &xhciroute);
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#endif
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#define XHCI_INTR_ENDPT 1
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@ -177,6 +180,16 @@ xhci_dump_device(struct xhci_softc *sc, struct xhci_slot_ctx *psl)
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}
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#endif
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uint32_t
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xhci_get_port_route(void)
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{
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#ifdef USB_DEBUG
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return (0xFFFFFFFFU ^ ((uint32_t)xhciroute));
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#else
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return (0xFFFFFFFFU);
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#endif
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}
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static void
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xhci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
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{
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@ -499,6 +499,7 @@ struct xhci_softc {
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/* prototypes */
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uint32_t xhci_get_port_route(void);
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usb_error_t xhci_halt_controller(struct xhci_softc *);
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usb_error_t xhci_init(struct xhci_softc *, device_t);
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usb_error_t xhci_start_controller(struct xhci_softc *);
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@ -292,9 +292,9 @@ xhci_pci_take_controller(device_t self)
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/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
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if (device_id == 0x1e318086 /* Panther Point */ ||
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device_id == 0x8c318086 /* Lynx Point */) {
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pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 0xffffffff, 4);
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pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, 0xffffffff, 4);
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uint32_t temp = xhci_get_port_route();
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pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
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pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
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}
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return (0);
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}
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