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Do not touch CMB TX threshold register when CMB is not used.

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Note, alc(4) does not use CMB at all due to silicon bug.
This commit is contained in:
Pyun YongHyeon 2010-08-07 23:41:46 +00:00
parent 1e77baed0d
commit a0bca95502
1 changed files with 3 additions and 3 deletions
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6
sys/dev/alc/if_alc.c
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@ -2990,10 +2990,10 @@ alc_init_locked(struct alc_softc *sc)
*/
CSR_WRITE_4(sc, ALC_INTR_RETRIG_TIMER, ALC_USECS(0));
/* Configure CMB. */
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, 4);
if ((sc->alc_flags & ALC_FLAG_CMB_BUG) == 0)
if ((sc->alc_flags & ALC_FLAG_CMB_BUG) == 0) {
CSR_WRITE_4(sc, ALC_CMB_TD_THRESH, 4);
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(5000));
else
} else
CSR_WRITE_4(sc, ALC_CMB_TX_TIMER, ALC_USECS(0));
/*
* Hardware can be configured to issue SMB interrupt based