Fill reserved fields of transmitting packets header with zero.
This fixes the if_fwe problem with 1394b chip. PR and Tested by: nork
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83e3877521
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a1c9e73ab8
@ -839,6 +839,7 @@ fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
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volatile struct fwohci_txpkthdr *ohcifp;
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struct fwohcidb_tr *db_tr;
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volatile struct fwohcidb *db;
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volatile u_int32_t *ld;
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struct tcode_info *info;
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static int maxdesc=0;
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@ -873,17 +874,20 @@ fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
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ohcifp = (volatile struct fwohci_txpkthdr *) db_tr->db[1].db.immed;
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info = &tinfo[tcode];
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hdr_len = pl_off = info->hdr_len;
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for( i = 0 ; i < pl_off ; i+= 4){
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ohcifp->mode.ld[i/4] = fp->mode.ld[i/4];
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}
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ohcifp->mode.common.spd = xfer->spd;
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ld = &ohcifp->mode.ld[0];
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ld[0] = ld[1] = ld[2] = ld[3] = 0;
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for( i = 0 ; i < pl_off ; i+= 4)
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ld[i/4] = fp->mode.ld[i/4];
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ohcifp->mode.common.spd = xfer->spd & 0x7;
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if (tcode == FWTCODE_STREAM ){
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hdr_len = 8;
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ohcifp->mode.stream.len = fp->mode.stream.len;
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} else if (tcode == FWTCODE_PHY) {
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hdr_len = 12;
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ohcifp->mode.ld[1] = fp->mode.ld[1];
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ohcifp->mode.ld[2] = fp->mode.ld[2];
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ld[1] = fp->mode.ld[1];
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ld[2] = fp->mode.ld[2];
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ohcifp->mode.common.spd = 0;
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ohcifp->mode.common.tcode = FWOHCITCODE_PHY;
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} else {
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@ -894,6 +898,7 @@ fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
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db = &db_tr->db[0];
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FWOHCI_DMA_WRITE(db->db.desc.cmd,
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OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | hdr_len);
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FWOHCI_DMA_WRITE(db->db.desc.addr, 0);
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FWOHCI_DMA_WRITE(db->db.desc.res, 0);
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/* Specify bound timer of asy. responce */
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if(&sc->atrs == dbch){
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@ -904,7 +909,7 @@ fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
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if (tcode == FWTCODE_WREQQ || tcode == FWTCODE_RRESQ)
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hdr_len = 12;
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for (i = 0; i < hdr_len/4; i ++)
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FWOHCI_DMA_WRITE(ohcifp->mode.ld[i], ohcifp->mode.ld[i]);
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FWOHCI_DMA_WRITE(ld[i], ld[i]);
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#endif
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again:
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@ -1057,8 +1062,9 @@ fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch)
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bus_dmamap_sync(dbch->dmat, tr->dma_map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(dbch->dmat, tr->dma_map);
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#if 0
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dump_db(sc, ch);
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#if 1
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if (firewire_debug)
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dump_db(sc, ch);
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#endif
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if(status & OHCI_CNTL_DMA_DEAD) {
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/* Stop DMA */
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@ -2106,11 +2112,14 @@ fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
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ldesc = sc->it[dmach].ndesc - 1;
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s = splfw(); /* unnecessary ? */
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fwdma_sync_multiseg_all(sc->it[dmach].am, BUS_DMASYNC_POSTREAD);
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if (firewire_debug)
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dump_db(sc, ITX_CH + dmach);
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while ((chunk = STAILQ_FIRST(&it->stdma)) != NULL) {
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db = ((struct fwohcidb_tr *)(chunk->end))->db;
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stat = FWOHCI_DMA_READ(db[ldesc].db.desc.res)
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>> OHCI_STATUS_SHIFT;
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db = ((struct fwohcidb_tr *)(chunk->start))->db;
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/* timestamp */
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count = FWOHCI_DMA_READ(db[ldesc].db.desc.res)
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& OHCI_COUNT_MASK;
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if (stat == 0)
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@ -2454,10 +2463,10 @@ device_printf(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, db_tr->bus_addr, fdb_
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fp = (struct fw_pkt *)db_tr->buf;
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ohcifp = (volatile struct fwohci_txpkthdr *) db[1].db.immed;
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ohcifp->mode.ld[0] = fp->mode.ld[0];
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ohcifp->mode.common.spd = 0 & 0x7;
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ohcifp->mode.stream.len = fp->mode.stream.len;
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ohcifp->mode.stream.chtag = chtag;
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ohcifp->mode.stream.tcode = 0xa;
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ohcifp->mode.stream.spd = 0;
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#if BYTE_ORDER == BIG_ENDIAN
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FWOHCI_DMA_WRITE(db[1].db.immed[0], db[1].db.immed[0]);
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FWOHCI_DMA_WRITE(db[1].db.immed[1], db[1].db.immed[1]);
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@ -2514,6 +2523,9 @@ fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,
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FWOHCI_DMA_WRITE(db[0].db.desc.cmd,
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OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | 8);
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FWOHCI_DMA_WRITE(db[0].db.desc.addr, 0);
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bzero((void *)(uintptr_t)(volatile void *)
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&db[1].db.immed[0], sizeof(db[1].db.immed));
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FWOHCI_DMA_WRITE(db[2].db.desc.addr,
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fwdma_bus_addr(it->buf, poffset) + sizeof(u_int32_t));
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@ -332,8 +332,7 @@ struct fwohci_txpkthdr{
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u_int32_t ld[4];
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struct {
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#if BYTE_ORDER == BIG_ENDIAN
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u_int32_t :13,
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spd:3,
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u_int32_t spd:16, /* XXX include reserved field */
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:8,
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tcode:4,
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:4;
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@ -341,8 +340,7 @@ struct fwohci_txpkthdr{
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u_int32_t :4,
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tcode:4,
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:8,
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spd:3,
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:13;
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spd:16; /* XXX include reserved fields */
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#endif
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}common;
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struct {
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