Add SMC EtherEZ98 support(PC-98).
Slim up of if_ed98.h. Submitted by: Chiharu Shibata <chi@bd.mbn.or.jp>
This commit is contained in:
KATO Takenori
parent
9ffb74afa4
commit
a305035083
@ -24,7 +24,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: if_ed.c,v 1.55 1998/10/22 05:58:44 bde Exp $
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* $Id: if_ed.c,v 1.56 1998/12/14 08:58:12 kato Exp $
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*/
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/*
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@ -49,6 +49,7 @@
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* MELCO LPC-TJ, LPC-TS, LGY-98, LGH-98, IND-SP, IND-SS, EGY-98
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* PLANET SMART COM CREDITCARD/2000 PCMCIA, EN-2298
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* Contec C-NET(98), C-NET(98)E, C-NET(98)L, C-NET(98)E-A, C-NET(98)L-A
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* SMC EtherEZ98
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*
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* Modified for FreeBSD(98) 2.2 by KATO T. of Nagoya University.
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*
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@ -357,6 +358,16 @@ static unsigned short ed_intr_mask[] = {
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* Interrupt conversion table for 83C790
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*/
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static unsigned short ed_790_intr_mask[] = {
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#ifdef PC98
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0,
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IRQ3,
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IRQ5,
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IRQ6,
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0,
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IRQ9,
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IRQ12,
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IRQ13
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#else
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0,
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IRQ9,
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IRQ3,
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@ -365,6 +376,7 @@ static unsigned short ed_790_intr_mask[] = {
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IRQ10,
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IRQ11,
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IRQ15
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#endif
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};
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/*
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@ -26,7 +26,7 @@
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*/
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/*
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* PC-9801 specific definitions for National Semiconductor DP8390 NIC.
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* PC-9801 specific definitions for DP8390/SMC8216 NICs.
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*/
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#ifndef __PC98_PC98_IF_ED98_H__
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#define __PC98_PC98_IF_ED98_H__
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@ -47,30 +47,22 @@ static int pc98_set_register_unit __P((struct ed_softc *sc, int type, int iobase
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/*
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* Register offsets/total
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*/
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#ifdef ED_NOVELL_NIC_OFFSET
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#undef ED_NOVELL_NIC_OFFSET
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#endif
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#define ED_NOVELL_NIC_OFFSET sc->edreg.nic_offset
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#ifdef ED_NOVELL_ASIC_OFFSET
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#undef ED_NOVELL_ASIC_OFFSET
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#endif
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#define ED_NOVELL_ASIC_OFFSET sc->edreg.asic_offset
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/*
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* Remote DMA data register; for reading or writing to the NIC mem
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* via programmed I/O (offset from ASIC base).
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*/
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#ifdef ED_NOVELL_DATA
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#undef ED_NOVELL_DATA
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#endif
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#define ED_NOVELL_DATA sc->edreg.data
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/*
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* Reset register; reading from this register causes a board reset.
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*/
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#ifdef ED_NOVELL_RESET
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#undef ED_NOVELL_RESET
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#endif
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#define ED_NOVELL_RESET sc->edreg.reset
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/*
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@ -90,20 +82,20 @@ static int pc98_set_register_unit __P((struct ed_softc *sc, int type, int iobase
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* 0xa0 Contec C-NET(98).
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* 0xb0 Contec C-NET(98)E/L.
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*/
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#define ED_TYPE98_BASE 0x10
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#define ED_TYPE98_BASE 0x80
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#define ED_TYPE98_GENERIC 0x10
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#define ED_TYPE98_LPC 0x11
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#define ED_TYPE98_BDN 0x12
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#define ED_TYPE98_EGY 0x13
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#define ED_TYPE98_LGY 0x14
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#define ED_TYPE98_ICM 0x15
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#define ED_TYPE98_SIC 0x16
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#define ED_TYPE98_108 0x18
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#define ED_TYPE98_LA98 0x19
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#define ED_TYPE98_CNET98 0x1a
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#define ED_TYPE98_CNET98EL 0x1b
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#define ED_TYPE98_UE2212 0x1c
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#define ED_TYPE98_GENERIC 0x80
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#define ED_TYPE98_LPC 0x81
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#define ED_TYPE98_BDN 0x82
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#define ED_TYPE98_EGY 0x83
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#define ED_TYPE98_LGY 0x84
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#define ED_TYPE98_ICM 0x85
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#define ED_TYPE98_SIC 0x86
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#define ED_TYPE98_108 0x88
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#define ED_TYPE98_LA98 0x89
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#define ED_TYPE98_CNET98 0x8a
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#define ED_TYPE98_CNET98EL 0x8b
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#define ED_TYPE98_UE2212 0x8c
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#define ED_TYPE98(x) (((x & 0xffff0000) >> 20) | ED_TYPE98_BASE)
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#define ED_TYPE98SUB(x) ((x & 0xf0000) >> 16)
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@ -255,14 +247,10 @@ static int pc98_set_register_unit __P((struct ed_softc *sc, int type, int iobase
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#define ED_P2_IMR sc->edreg.port[0x0f]
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/* PCCARD */
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#ifdef ED_PC_MISC
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#undef ED_PC_MISC
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#endif
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#define ED_PC_MISC sc->edreg.pc_misc
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#ifdef ED_PC_RESET
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#undef ED_PC_RESET
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#endif
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#define ED_PC_RESET sc->edreg.pc_reset
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#define ED_PC_RESET sc->edreg.pc_reset
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/* LPC-T support */
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#define LPCT_1d0_ON() \
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@ -397,6 +385,9 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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int nports;
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sc->type = type;
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ED_PC_MISC = 0x18; /* dummy for NON-PCCard */
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ED_PC_RESET = 0x1f; /* same above */
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switch (type) {
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case ED_TYPE98_GENERIC:
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sc->edreg.port = edp_generic;
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@ -404,8 +395,6 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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ED_NOVELL_ASIC_OFFSET = 0x0010;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x000f;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 32;
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break;
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@ -415,30 +404,24 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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ED_NOVELL_ASIC_OFFSET = 0x0200;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x0100;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 16;
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break;
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case ED_TYPE98_EGY:
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sc->edreg.port = edp_egy98;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0200;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x0100;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 16;
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break;
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case ED_TYPE98_ICM:
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sc->edreg.port = edp_generic;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0100;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x000f;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 16;
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break;
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@ -446,10 +429,8 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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sc->edreg.port = edp_la98;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0100;
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ED_NOVELL_DATA = 0;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0xc100;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 1;
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break;
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@ -457,10 +438,8 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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sc->edreg.port = edp_sic98;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x2000;
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ED_NOVELL_DATA = 0x00; /* dummy */
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ED_NOVELL_RESET = 0x00;
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ED_PC_MISC = 0x18; /* dummy */
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ED_PC_RESET = 0x1f; /* dummy */
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ED_NOVELL_DATA = 0; /* dummy */
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ED_NOVELL_RESET = 0; /* dummy */
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nports = 1;
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break;
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@ -478,47 +457,58 @@ pc98_set_register_unit(struct ed_softc *sc, int type, int iobase)
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case ED_TYPE98_108:
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sc->edreg.port = edp_nec108;
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adj = (iobase & 0xf000) / 2;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_ASIC_OFFSET = (0x888 | adj) - iobase;
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ED_NOVELL_DATA = 0;
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ED_NOVELL_RESET = 2;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = (0x0888 | adj) - iobase;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x0002;
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nports = 16;
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break;
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case ED_TYPE98_LA98:
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sc->edreg.port = edp_la98;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_ASIC_OFFSET = 0x100;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0100;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0xf000;
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ED_PC_MISC = 0x18;
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ED_PC_RESET = 0x1f;
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nports = 1;
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break;
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case ED_TYPE98_CNET98EL:
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sc->edreg.port = edp_generic;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0400;
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ED_NOVELL_DATA = 0x000e;
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ED_NOVELL_RESET = 0x0000; /* dummy */
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ED_PC_RESET = 0x1f;
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ED_NOVELL_RESET = 0; /* dummy */
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nports = 16;
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break;
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case ED_TYPE98_CNET98:
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sc->edreg.port = edp_cnet98;
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ED_NOVELL_NIC_OFFSET = 0;
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ED_NOVELL_NIC_OFFSET = 0x0000;
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ED_NOVELL_ASIC_OFFSET = 0x0400;
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ED_NOVELL_DATA = 0x0000;
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ED_NOVELL_RESET = 0x0000; /* dummy */
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ED_PC_RESET = 0x1f;
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ED_NOVELL_DATA = 0; /* dummy */
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ED_NOVELL_RESET = 0; /* dummy */
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nports = 16;
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break;
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}
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return nports;
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}
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/*
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* SMC EtherEZ98(SMC8498BTA)
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*
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* A sample of kernel conf is as follows.
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* #device ed0 at isa? port 0x10d0 net irq 6 iomem 0xc8000 vector edintr
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*/
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#undef ED_WD_NIC_OFFSET
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#define ED_WD_NIC_OFFSET 0x100 /* I/O base offset to NIC */
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#undef ED_WD_ASIC_OFFSET
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#define ED_WD_ASIC_OFFSET 0 /* I/O base offset to ASIC */
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/*
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* XXX - The I/O address range is fragmented in the EtherEZ98;
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* it occupies 16*2 I/O addresses, by the way.
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*/
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#undef ED_WD_IO_PORTS
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#define ED_WD_IO_PORTS 16 /* # of i/o addresses used */
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#endif /* __PC98_PC98_IF_ED98_H__ */
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