hyperv: Move timer related MSRs into hyperv_reg.h
And avoid bit fields for event timer. MFC after: 1 week Sponsored by: Microsoft OSTC Differential Revision: https://reviews.freebsd.org/D6566
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@ -37,12 +37,17 @@ __FBSDID("$FreeBSD$");
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#include <sys/time.h>
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#include <sys/timeet.h>
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#include "hv_vmbus_priv.h"
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#include <dev/hyperv/vmbus/hv_vmbus_priv.h>
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#include <dev/hyperv/vmbus/hyperv_reg.h>
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#define HV_TIMER_FREQUENCY (10 * 1000 * 1000LL) /* 100ns period */
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#define HV_MAX_DELTA_TICKS 0xffffffffLL
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#define HV_MIN_DELTA_TICKS 1LL
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#define MSR_HV_STIMER0_CFG_SINT \
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((((uint64_t)HV_VMBUS_TIMER_SINT) << MSR_HV_STIMER_CFG_SINT_SHIFT) & \
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MSR_HV_STIMER_CFG_SINT_MASK)
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static struct eventtimer *et;
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static inline uint64_t
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@ -57,18 +62,15 @@ sbintime2tick(sbintime_t time)
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static int
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hv_et_start(struct eventtimer *et, sbintime_t firsttime, sbintime_t periodtime)
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{
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union hv_timer_config timer_cfg;
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uint64_t current;
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uint64_t current, config;
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timer_cfg.as_uint64 = 0;
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timer_cfg.auto_enable = 1;
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timer_cfg.sintx = HV_VMBUS_TIMER_SINT;
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config = MSR_HV_STIMER_CFG_AUTOEN | MSR_HV_STIMER0_CFG_SINT;
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current = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
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current = rdmsr(MSR_HV_TIME_REF_COUNT);
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current += sbintime2tick(firsttime);
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wrmsr(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64);
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wrmsr(HV_X64_MSR_STIMER0_COUNT, current);
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wrmsr(MSR_HV_STIMER0_CONFIG, config);
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wrmsr(MSR_HV_STIMER0_COUNT, current);
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return (0);
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}
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@ -76,8 +78,8 @@ hv_et_start(struct eventtimer *et, sbintime_t firsttime, sbintime_t periodtime)
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static int
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hv_et_stop(struct eventtimer *et)
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{
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wrmsr(HV_X64_MSR_STIMER0_CONFIG, 0);
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wrmsr(HV_X64_MSR_STIMER0_COUNT, 0);
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wrmsr(MSR_HV_STIMER0_CONFIG, 0);
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wrmsr(MSR_HV_STIMER0_COUNT, 0);
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return (0);
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}
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@ -91,8 +91,7 @@ static struct timecounter hv_timecounter = {
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static u_int
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hv_get_timecount(struct timecounter *tc)
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{
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u_int now = rdmsr(HV_X64_MSR_TIME_REF_COUNT);
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return (now);
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return rdmsr(MSR_HV_TIME_REF_COUNT);
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}
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/**
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@ -54,6 +54,8 @@
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#define MSR_HV_VP_INDEX 0x40000002
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#define MSR_HV_TIME_REF_COUNT 0x40000020
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#define MSR_HV_SCONTROL 0x40000080
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#define MSR_HV_SCTRL_ENABLE 0x0001ULL
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#define MSR_HV_SCTRL_RSVD_MASK 0xfffffffffffffffeULL
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@ -77,6 +79,16 @@
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#define MSR_HV_SINT_RSVD_MASK (MSR_HV_SINT_RSVD1_MASK | \
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MSR_HV_SINT_RSVD2_MASK)
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#define MSR_HV_STIMER0_CONFIG 0x400000b0
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#define MSR_HV_STIMER_CFG_ENABLE 0x0001ULL
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#define MSR_HV_STIMER_CFG_PERIODIC 0x0002ULL
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#define MSR_HV_STIMER_CFG_LAZY 0x0004ULL
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#define MSR_HV_STIMER_CFG_AUTOEN 0x0008ULL
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#define MSR_HV_STIMER_CFG_SINT_MASK 0x000f0000ULL
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#define MSR_HV_STIMER_CFG_SINT_SHIFT 16
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#define MSR_HV_STIMER0_COUNT 0x400000b1
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/*
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* CPUID leaves
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*/
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