Add FDT attachment driver for ARM System MMU v3.2 controller.
Tested on ARM Morello Board. Sponsored by: UKRI
This commit is contained in:
Ruslan Bukin
parent
7d0bbf43fd
commit
a5ec261a7c
@ -98,13 +98,15 @@ __FBSDID("$FreeBSD$");
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/sysctl.h>
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#include <sys/tree.h>
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#include <sys/taskqueue.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#if DEV_ACPI
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#ifdef DEV_ACPI
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#include <contrib/dev/acpica/include/acpi.h>
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#include <dev/acpica/acpivar.h>
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#endif
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@ -113,6 +115,14 @@ __FBSDID("$FreeBSD$");
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#include <dev/iommu/iommu.h>
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#include <arm64/iommu/iommu_pmap.h>
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#include <machine/bus.h>
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#ifdef FDT
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include "iommu.h"
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#include "iommu_if.h"
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@ -144,6 +154,7 @@ static struct resource_spec smmu_spec[] = {
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 1, RF_ACTIVE },
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{ SYS_RES_IRQ, 2, RF_ACTIVE },
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{ SYS_RES_IRQ, 3, RF_ACTIVE },
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RESOURCE_SPEC_END
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};
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@ -1129,7 +1140,7 @@ smmu_enable_interrupts(struct smmu_softc *sc)
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return (0);
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}
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#if DEV_ACPI
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#ifdef DEV_ACPI
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static void
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smmu_configure_intr(struct smmu_softc *sc, struct resource *res)
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{
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@ -1155,14 +1166,15 @@ smmu_setup_interrupts(struct smmu_softc *sc)
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dev = sc->dev;
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#if DEV_ACPI
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#ifdef DEV_ACPI
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/*
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* Configure SMMU interrupts as EDGE triggered manually
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* as ACPI tables carries no information for that.
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*/
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smmu_configure_intr(sc, sc->res[1]);
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smmu_configure_intr(sc, sc->res[2]);
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/* PRIQ is not in use. */
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smmu_configure_intr(sc, sc->res[3]);
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smmu_configure_intr(sc, sc->res[4]);
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#endif
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error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC,
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@ -1172,7 +1184,7 @@ smmu_setup_interrupts(struct smmu_softc *sc)
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return (ENXIO);
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}
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error = bus_setup_intr(dev, sc->res[3], INTR_TYPE_MISC,
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error = bus_setup_intr(dev, sc->res[4], INTR_TYPE_MISC,
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smmu_gerr_intr, NULL, sc, &sc->intr_cookie[2]);
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if (error) {
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device_printf(dev, "Couldn't setup Gerr interrupt handler\n");
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@ -1761,18 +1773,28 @@ smmu_ctx_alloc(device_t dev, struct iommu_domain *iodom, device_t child,
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struct smmu_domain *domain;
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struct smmu_softc *sc;
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struct smmu_ctx *ctx;
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#ifdef DEV_ACPI
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uint16_t rid;
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u_int xref, sid;
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u_int xref;
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int seg;
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#else
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struct pci_id_ofw_iommu pi;
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#endif
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u_int sid;
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int err;
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sc = device_get_softc(dev);
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domain = (struct smmu_domain *)iodom;
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#ifdef DEV_ACPI
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seg = pci_get_domain(child);
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rid = pci_get_rid(child);
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err = acpi_iort_map_pci_smmuv3(seg, rid, &xref, &sid);
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if (err)
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#else
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err = pci_get_id(child, PCI_ID_OFW_IOMMU, (uintptr_t *)&pi);
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sid = pi.id;
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#endif
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if (err != 0)
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return (NULL);
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if (sc->features & SMMU_FEATURE_2_LVL_STREAM_TABLE) {
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@ -1852,7 +1874,7 @@ smmu_ctx_lookup_by_sid(device_t dev, u_int sid)
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static struct iommu_ctx *
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smmu_ctx_lookup(device_t dev, device_t child)
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{
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struct iommu_unit *iommu;
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struct iommu_unit *iommu __unused;
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struct smmu_softc *sc;
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struct smmu_domain *domain;
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struct smmu_unit *unit;
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@ -1883,15 +1905,24 @@ static int
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smmu_find(device_t dev, device_t child)
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{
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struct smmu_softc *sc;
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u_int xref, sid;
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uint16_t rid;
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u_int xref;
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int error;
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#ifdef DEV_ACPI
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uint16_t rid;
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int seg;
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u_int sid;
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#else
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phandle_t node;
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uint64_t base, size;
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struct pci_id_ofw_iommu pi;
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#endif
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sc = device_get_softc(dev);
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#ifdef DEV_ACPI
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rid = pci_get_rid(child);
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seg = pci_get_domain(child);
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#endif
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/*
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* Find an xref of an IOMMU controller that serves traffic for dev.
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@ -1903,8 +1934,16 @@ smmu_find(device_t dev, device_t child)
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return (ENOENT);
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}
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#else
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/* TODO: add FDT support. */
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return (ENXIO);
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error = pci_get_id(child, PCI_ID_OFW_IOMMU, (uintptr_t *)&pi);
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if (error) {
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/* Could not find reference to an SMMU device. */
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return (ENOENT);
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}
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/* Our xref is memory base address. */
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node = OF_node_from_xref(pi.xref);
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fdt_regsize(node, &base, &size);
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xref = base;
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#endif
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/* Check if xref is ours. */
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@ -146,8 +146,10 @@ smmu_acpi_identify(driver_t *driver, device_t parent)
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BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 0,
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iort_data.smmu[i]->EventGsiv, 1);
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BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 1,
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iort_data.smmu[i]->SyncGsiv, 1);
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iort_data.smmu[i]->PriGsiv, 1);
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BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 2,
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iort_data.smmu[i]->SyncGsiv, 1);
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BUS_SET_RESOURCE(parent, dev, SYS_RES_IRQ, 3,
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iort_data.smmu[i]->GerrGsiv, 1);
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BUS_SET_RESOURCE(parent, dev, SYS_RES_MEMORY, 0,
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iort_data.smmu[i]->BaseAddress, MEMORY_RESOURCE_SIZE);
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138
sys/arm64/iommu/smmu_fdt.c
Normal file
138
sys/arm64/iommu/smmu_fdt.c
Normal file
@ -0,0 +1,138 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com>
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*
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* This work was supported by Innovate UK project 105694, "Digital Security
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* by Design (DSbD) Technology Platform Prototype".
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/bitstring.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/tree.h>
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#include <sys/taskqueue.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/iommu/iommu.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/iommu/iommu.h>
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#include <arm64/iommu/iommu.h>
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#include "smmuvar.h"
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static struct ofw_compat_data compat_data[] = {
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{ "arm,smmu-v3", 1 },
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{ NULL, 0 }
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};
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static int
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smmu_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "ARM System MMU (SMMU) v3");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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smmu_fdt_attach(device_t dev)
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{
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struct smmu_softc *sc;
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struct smmu_unit *unit;
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struct iommu_unit *iommu;
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int err;
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sc = device_get_softc(dev);
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sc->dev = dev;
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err = smmu_attach(dev);
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if (err != 0)
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goto error;
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unit = &sc->unit;
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unit->dev = dev;
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iommu = &unit->iommu;
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iommu->dev = dev;
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LIST_INIT(&unit->domain_list);
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/* Use memory start address as an xref. */
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sc->xref = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
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err = iommu_register(iommu);
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if (err) {
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device_printf(dev, "Failed to register SMMU.\n");
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return (ENXIO);
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}
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return (0);
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error:
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if (bootverbose) {
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device_printf(dev,
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"Failed to attach. Error %d\n", err);
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}
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/* Failure so free resources. */
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smmu_detach(dev);
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return (err);
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}
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static device_method_t smmu_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, smmu_fdt_probe),
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DEVMETHOD(device_attach, smmu_fdt_attach),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(smmu, smmu_fdt_driver, smmu_fdt_methods,
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sizeof(struct smmu_softc), smmu_driver);
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static devclass_t smmu_fdt_devclass;
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EARLY_DRIVER_MODULE(smmu, simplebus, smmu_fdt_driver, smmu_fdt_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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@ -136,7 +136,7 @@ struct smmu_strtab {
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struct smmu_softc {
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device_t dev;
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struct resource *res[4];
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struct resource *res[5];
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void *intr_cookie[3];
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uint32_t ias; /* Intermediate Physical Address */
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uint32_t oas; /* Physical Address */
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@ -106,7 +106,8 @@ arm64/iommu/iommu.c optional iommu
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arm64/iommu/iommu_if.m optional iommu
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arm64/iommu/iommu_pmap.c optional iommu
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arm64/iommu/smmu.c optional iommu
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arm64/iommu/smmu_acpi.c optional acpi iommu
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arm64/iommu/smmu_acpi.c optional iommu acpi
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arm64/iommu/smmu_fdt.c optional iommu fdt
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arm64/iommu/smmu_quirks.c optional iommu
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dev/iommu/busdma_iommu.c optional iommu
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dev/iommu/iommu_gas.c optional iommu
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