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@ -40,7 +40,7 @@
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__FBSDID("$FreeBSD$");
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/*
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* Mostek MK48T02, MK48T08, MK48T18, MK48T59 time-of-day chip subroutines.
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* Mostek MK48T02, MK48T08, MK48T18, MK48T59 time-of-day chip subroutines
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*/
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#include <sys/param.h>
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@ -59,17 +59,17 @@ __FBSDID("$FreeBSD$");
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#include "clock_if.h"
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static uint8_t mk48txx_def_nvrd(device_t, int);
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static void mk48txx_def_nvwr(device_t, int, uint8_t);
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static void mk48txx_watchdog(void *, u_int, int *);
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static uint8_t mk48txx_def_nvrd(device_t dev, int off);
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static void mk48txx_def_nvwr(device_t dev, int off, uint8_t v);
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static void mk48txx_watchdog(void *arg, u_int cmd, int *error);
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struct {
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static const struct {
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const char *name;
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bus_size_t nvramsz;
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bus_size_t clkoff;
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int flags;
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#define MK48TXX_EXT_REGISTERS 1 /* Has extended register set */
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} mk48txx_models[] = {
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u_int flags;
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#define MK48TXX_EXT_REGISTERS 1 /* Has extended register set. */
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} const mk48txx_models[] = {
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{ "mk48t02", MK48T02_CLKSZ, MK48T02_CLKOFF, 0 },
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{ "mk48t08", MK48T08_CLKSZ, MK48T08_CLKOFF, 0 },
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{ "mk48t18", MK48T18_CLKSZ, MK48T18_CLKOFF, 0 },
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@ -112,7 +112,7 @@ mk48txx_attach(device_t dev)
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if (mk48txx_models[i].flags & MK48TXX_EXT_REGISTERS) {
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mtx_lock(&sc->sc_mtx);
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if ((*sc->sc_nvrd)(dev, sc->sc_clkoffset + MK48TXX_FLAGS) &
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if ((*sc->sc_nvrd)(dev, sc->sc_clkoffset + MK48TXX_FLAGS) &
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MK48TXX_FLAGS_BL) {
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mtx_unlock(&sc->sc_mtx);
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device_printf(dev, "%s: battery low\n", __func__);
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@ -140,7 +140,7 @@ mk48txx_attach(device_t dev)
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}
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}
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clock_register(dev, 1000000); /* 1 second resolution. */
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clock_register(dev, 1000000); /* 1 second resolution */
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if ((sc->sc_flag & MK48TXX_WDOG_REGISTER) &&
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(mk48txx_models[i].flags & MK48TXX_EXT_REGISTERS)) {
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@ -59,23 +59,23 @@
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* The first bank of eight registers at offset (nvramsz - 16) is
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* available only on recenter (which?) MK48Txx models.
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*/
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#define MK48TXX_FLAGS 0 /* flags register */
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#define MK48TXX_UNUSED 1 /* unused */
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#define MK48TXX_ASEC 2 /* alarm seconds (0..59; BCD) */
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#define MK48TXX_AMIN 3 /* alarm minutes (0..59; BCD) */
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#define MK48TXX_AHOUR 4 /* alarm hours (0..23; BCD) */
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#define MK48TXX_ADAY 5 /* alarm day in month (1..31; BCD) */
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#define MK48TXX_INTR 6 /* interrupts register */
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#define MK48TXX_WDOG 7 /* watchdog register */
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#define MK48TXX_FLAGS 0 /* flags register */
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#define MK48TXX_UNUSED 1 /* unused */
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#define MK48TXX_ASEC 2 /* alarm seconds (0..59; BCD) */
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#define MK48TXX_AMIN 3 /* alarm minutes (0..59; BCD) */
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#define MK48TXX_AHOUR 4 /* alarm hours (0..23; BCD) */
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#define MK48TXX_ADAY 5 /* alarm day in month (1..31; BCD) */
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#define MK48TXX_INTR 6 /* interrupts register */
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#define MK48TXX_WDOG 7 /* watchdog register */
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#define MK48TXX_ICSR 8 /* control register */
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#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */
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#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */
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#define MK48TXX_IHOUR 11 /* hours (0..23; BCD) */
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#define MK48TXX_IWDAY 12 /* weekday (1..7) */
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#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */
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#define MK48TXX_IMON 14 /* month (1..12; BCD) */
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#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */
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#define MK48TXX_ICSR 8 /* control register */
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#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */
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#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */
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#define MK48TXX_IHOUR 11 /* hours (0..23; BCD) */
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#define MK48TXX_IWDAY 12 /* weekday (1..7) */
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#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */
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#define MK48TXX_IMON 14 /* month (1..12; BCD) */
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#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */
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/*
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* Note that some of the bits below that are not in the first eight
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@ -84,80 +84,80 @@
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*/
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/* Bits in the flags register (extended only) */
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#define MK48TXX_FLAGS_BL 0x10 /* battery low (read only) */
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#define MK48TXX_FLAGS_AF 0x40 /* alarm flag (read only) */
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#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag (read only) */
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#define MK48TXX_FLAGS_BL 0x10 /* battery low (read only) */
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#define MK48TXX_FLAGS_AF 0x40 /* alarm flag (read only) */
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#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag (read only) */
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/* Bits in the alarm seconds register (extended only) */
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#define MK48TXX_ASEC_MASK 0x7f /* mask for alarm seconds */
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#define MK48TXX_ASEC_RPT1 0x80 /* alarm repeat mode bit 1 */
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#define MK48TXX_ASEC_MASK 0x7f /* mask for alarm seconds */
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#define MK48TXX_ASEC_RPT1 0x80 /* alarm repeat mode bit 1 */
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/* Bits in the alarm minutes register (extended only) */
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#define MK48TXX_AMIN_MASK 0x7f /* mask for alarm minutes */
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#define MK48TXX_AMIN_RPT2 0x80 /* alarm repeat mode bit 2 */
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#define MK48TXX_AMIN_MASK 0x7f /* mask for alarm minutes */
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#define MK48TXX_AMIN_RPT2 0x80 /* alarm repeat mode bit 2 */
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/* Bits in the alarm hours register (extended only) */
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#define MK48TXX_AHOUR_MASK 0x3f /* mask for alarm hours */
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#define MK48TXX_AHOUR_RPT3 0x80 /* alarm repeat mode bit 3 */
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#define MK48TXX_AHOUR_MASK 0x3f /* mask for alarm hours */
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#define MK48TXX_AHOUR_RPT3 0x80 /* alarm repeat mode bit 3 */
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/* Bits in the alarm day in month register (extended only) */
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#define MK48TXX_ADAY_MASK 0x3f /* mask for alarm day in month */
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#define MK48TXX_ADAY_RPT4 0x80 /* alarm repeat mode bit 4 */
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#define MK48TXX_ADAY_MASK 0x3f /* mask for alarm day in month */
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#define MK48TXX_ADAY_RPT4 0x80 /* alarm repeat mode bit 4 */
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/* Bits in the interrupts register (extended only) */
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#define MK48TXX_INTR_ABE 0x20 /* alarm in battery back-up mode */
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#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */
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#define MK48TXX_INTR_ABE 0x20 /* alarm in battery back-up mode */
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#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */
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/* Bits in the watchdog register (extended only) */
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#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */
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#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */
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#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */
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#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */
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#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */
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#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */
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#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */
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#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */
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#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */
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#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */
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#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */
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#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */
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#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */
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#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */
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/* Bits in the control register */
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#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */
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#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */
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#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */
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#define MK48TXX_CSR_WRITE 0x80 /* want to write */
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#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */
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#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */
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#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */
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#define MK48TXX_CSR_WRITE 0x80 /* want to write */
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/* Bits in the seconds register */
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#define MK48TXX_SEC_MASK 0x7f /* mask for seconds */
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#define MK48TXX_SEC_ST 0x80 /* stop oscillator */
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#define MK48TXX_SEC_MASK 0x7f /* mask for seconds */
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#define MK48TXX_SEC_ST 0x80 /* stop oscillator */
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/* Bits in the minutes register */
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#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */
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#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */
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/* Bits in the hours register */
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#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */
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#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */
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/* Bits in the century/weekday register */
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#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */
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#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */
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#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */
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#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */
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#define MK48TXX_WDAY_FT 0x40 /* frequency test */
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#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */
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#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */
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#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */
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#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */
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#define MK48TXX_WDAY_FT 0x40 /* frequency test */
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/* Bits in the day in month register */
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#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */
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#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */
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/* Bits in the month register */
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#define MK48TXX_MON_MASK 0x1f /* mask for month */
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#define MK48TXX_MON_MASK 0x1f /* mask for month */
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/* Bits in the year register */
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#define MK48TXX_YEAR_MASK 0xff /* mask for year */
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#define MK48TXX_YEAR_MASK 0xff /* mask for year */
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/* Model specific NVRAM sizes and clock offsets */
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#define MK48T02_CLKSZ 2048
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#define MK48T02_CLKOFF 0x7f0
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#define MK48T02_CLKSZ 2048
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#define MK48T02_CLKOFF 0x7f0
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#define MK48T08_CLKSZ 8192
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#define MK48T08_CLKOFF 0x1ff0
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#define MK48T08_CLKSZ 8192
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#define MK48T08_CLKOFF 0x1ff0
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#define MK48T18_CLKSZ 8192
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#define MK48T18_CLKOFF 0x1ff0
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#define MK48T18_CLKSZ 8192
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#define MK48T18_CLKOFF 0x1ff0
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#define MK48T59_CLKSZ 8192
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#define MK48T59_CLKOFF 0x1ff0
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#define MK48T59_CLKSZ 8192
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#define MK48T59_CLKOFF 0x1ff0
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* $FreeBSD$
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*/
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typedef uint8_t (*mk48txx_nvrd_t)(device_t, int);
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typedef void (*mk48txx_nvwr_t)(device_t, int, uint8_t);
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typedef uint8_t (*mk48txx_nvrd_t)(device_t dev, int off);
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typedef void (*mk48txx_nvwr_t)(device_t dev, int off, uint8_t v);
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struct mk48txx_softc {
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bus_space_tag_t sc_bst; /* bus space tag */
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@ -53,17 +53,17 @@ struct mk48txx_softc {
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bus_size_t sc_clkoffset; /* Offset in NVRAM to clock bits */
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u_int sc_year0; /* year counter offset */
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u_int sc_flag; /* MD flags */
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#define MK48TXX_NO_CENT_ADJUST 0x0001 /* don't manually adjust century */
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#define MK48TXX_WDOG_REGISTER 0x0002 /* register watchdog */
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#define MK48TXX_WDOG_ENABLE_WDS 0x0004 /* enable watchdog steering bit */
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#define MK48TXX_NO_CENT_ADJUST 0x0001 /* don't manually adjust century */
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#define MK48TXX_WDOG_REGISTER 0x0002 /* register watchdog */
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#define MK48TXX_WDOG_ENABLE_WDS 0x0004 /* enable watchdog steering bit */
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mk48txx_nvrd_t sc_nvrd; /* NVRAM/RTC read function */
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mk48txx_nvwr_t sc_nvwr; /* NVRAM/RTC write function */
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};
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/* Chip attach function */
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int mk48txx_attach(device_t);
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int mk48txx_attach(device_t dev);
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/* Methods for the clock interface */
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int mk48txx_gettime(device_t, struct timespec *);
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int mk48txx_settime(device_t, struct timespec *);
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int mk48txx_gettime(device_t dev, struct timespec *ts);
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int mk48txx_settime(device_t dev, struct timespec *ts);
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