Complete the transition away from newbus to populate the children to

the linker set of CPU modules.  The newbus method, although clever,
had many flaws: it didn't really support multiple SoC, many of the
comments about order were just wrong, and it did a few things far too
late to be useful.  delay and cpu_reset now work much earlier in the
boot process.
This commit is contained in:
Warner Losh 2012-07-12 13:45:58 +00:00
parent 1a2585391a
commit a68d1f48b9
6 changed files with 20 additions and 219 deletions

View File

@ -310,6 +310,7 @@ at91_attach(device_t dev)
* Add this device's children...
*/
at91_cpu_add_builtin_children(dev, soc_info.soc_data->soc_children);
soc_info.soc_data->soc_clock_init();
bus_generic_probe(dev);
bus_generic_attach(dev);

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@ -46,14 +46,6 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_pmcvar.h>
#include <arm/at91/at91soc.h>
struct at91rm92_softc {
device_t dev;
bus_space_tag_t sc_st;
bus_space_handle_t sc_sh;
bus_space_handle_t sc_sys_sh;
bus_space_handle_t sc_aic_sh;
};
/*
* Standard priority levels for the system. 0 is lowest and 7 is highest.
* These values are the ones Atmel uses for its Linux port, which differ
@ -147,42 +139,19 @@ at91_pll_outb(int freq)
return (0x8000);
}
static void
at91_identify(driver_t *drv, device_t parent)
{
if (at91_cpu_is(AT91_T_RM9200))
at91_add_child(parent, 0, "at91rm920", 0, 0, 0, -1, 0, 0);
}
static int
at91_probe(device_t dev)
{
device_set_desc(dev, soc_info.name);
return (0);
}
static int
at91_attach(device_t dev)
{
struct at91_pmc_clock *clk;
struct at91rm92_softc *sc = device_get_softc(dev);
struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
sc->sc_st = at91sc->sc_st;
sc->sc_sh = at91sc->sc_sh;
sc->dev = dev;
if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE,
AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0)
panic("Enable to map system registers");
#if 0
/* -- XXX are these needed? */
/* Disable all interrupts for RTC (0xe24 == RTC_IDR) */
bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff);
/* Disable all interrupts for the SDRAM controller */
bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff);
#endif
static void
at91_clock_init(void)
{
struct at91_pmc_clock *clk;
/* Update USB device port clock info */
clk = at91_pmc_clock_ref("udpck");
@ -218,30 +187,12 @@ at91_attach(device_t dev)
clk->pll_div_mask = RM9200_PLL_B_DIV_MASK;
clk->set_outb = at91_pll_outb;
at91_pmc_clock_deref(clk);
return (0);
}
static device_method_t at91_methods[] = {
DEVMETHOD(device_probe, at91_probe),
DEVMETHOD(device_attach, at91_attach),
DEVMETHOD(device_identify, at91_identify),
{0, 0},
};
static driver_t at91rm92_driver = {
"at91rm920",
at91_methods,
sizeof(struct at91rm92_softc),
};
static devclass_t at91rm92_devclass;
DRIVER_MODULE(at91rm920, atmelarm, at91rm92_driver, at91rm92_devclass, 0, 0);
static struct at91_soc_data soc_data = {
.soc_delay = at91_st_delay,
.soc_reset = at91_st_cpu_reset,
.soc_clock_init = at91_clock_init,
.soc_irq_prio = at91_irq_prio,
.soc_children = at91_devs,
};

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@ -47,12 +47,6 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_pmcvar.h>
#include <arm/at91/at91_rstreg.h>
struct at91sam9_softc {
bus_space_tag_t sc_st;
bus_space_handle_t sc_sh;
bus_space_handle_t sc_matrix_sh;
};
/*
* Standard priority levels for the system. 0 is lowest and 7 is highest.
* These values are the ones Atmel uses for its Linux port
@ -146,43 +140,9 @@ at91_pll_outb(int freq)
}
static void
at91_identify(driver_t *drv, device_t parent)
{
if (soc_info.type == AT91_T_SAM9260)
at91_add_child(parent, 0, "at91sam9260", 0, 0, 0, -1, 0, 0);
}
static int
at91_probe(device_t dev)
{
device_set_desc(dev, soc_info.name);
return (0);
}
static int
at91_attach(device_t dev)
at91_clock_init(void)
{
struct at91_pmc_clock *clk;
struct at91sam9_softc *sc = device_get_softc(dev);
struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
uint32_t i;
sc->sc_st = at91sc->sc_st;
sc->sc_sh = at91sc->sc_sh;
if (bus_space_subregion(sc->sc_st, sc->sc_sh,
AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE,
&sc->sc_matrix_sh) != 0)
panic("Enable to map matrix registers");
/* activate NAND */
i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9260_EBICSA);
bus_space_write_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9260_EBICSA,
i | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* Update USB device port clock info */
clk = at91_pmc_clock_ref("udpck");
@ -227,30 +187,12 @@ at91_attach(device_t dev)
clk->pll_div_mask = SAM9260_PLL_B_DIV_MASK;
clk->set_outb = at91_pll_outb;
at91_pmc_clock_deref(clk);
return (0);
}
static device_method_t at91sam9260_methods[] = {
DEVMETHOD(device_probe, at91_probe),
DEVMETHOD(device_attach, at91_attach),
DEVMETHOD(device_identify, at91_identify),
DEVMETHOD_END
};
static driver_t at91sam9260_driver = {
"at91sam9260",
at91sam9260_methods,
sizeof(struct at91sam9_softc),
};
static devclass_t at91sam9260_devclass;
DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
NULL, NULL);
static struct at91_soc_data soc_data = {
.soc_delay = at91_pit_delay,
.soc_reset = at91_rst_cpu_reset,
.soc_clock_init = at91_clock_init,
.soc_irq_prio = at91_irq_prio,
.soc_children = at91_devs,
};

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@ -47,12 +47,6 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_pmcvar.h>
#include <arm/at91/at91_rstreg.h>
struct at91sam9_softc {
bus_space_tag_t sc_st;
bus_space_handle_t sc_sh;
bus_space_handle_t sc_matrix_sh;
};
/*
* Standard priority levels for the system. 0 is lowest and 7 is highest.
* These values are the ones Atmel uses for its Linux port
@ -153,44 +147,9 @@ at91_pll_outb(int freq)
}
static void
at91_identify(driver_t *drv, device_t parent)
{
if (at91_cpu_is(AT91_T_SAM9G20))
at91_add_child(parent, 0, "at91sam", 9, 0, 0, -1, 0, 0);
}
static int
at91_probe(device_t dev)
{
device_set_desc(dev, soc_info.name);
return (0);
}
static int
at91_attach(device_t dev)
at91_clock_init(void)
{
struct at91_pmc_clock *clk;
struct at91sam9_softc *sc = device_get_softc(dev);
struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
uint32_t i;
sc->sc_st = at91sc->sc_st;
sc->sc_sh = at91sc->sc_sh;
if (bus_space_subregion(sc->sc_st, sc->sc_sh,
AT91SAM9G20_MATRIX_BASE, AT91SAM9G20_MATRIX_SIZE,
&sc->sc_matrix_sh) != 0)
panic("Enable to map matrix registers");
/* activate NAND*/
i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9G20_EBICSA);
bus_space_write_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9G20_EBICSA,
i | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* Update USB device port clock info */
clk = at91_pmc_clock_ref("udpck");
@ -226,31 +185,14 @@ at91_attach(device_t dev)
clk->pll_div_mask = SAM9G20_PLL_B_DIV_MASK;
clk->set_outb = at91_pll_outb;
at91_pmc_clock_deref(clk);
return (0);
}
static device_method_t at91_methods[] = {
DEVMETHOD(device_probe, at91_probe),
DEVMETHOD(device_attach, at91_attach),
DEVMETHOD(device_identify, at91_identify),
{0, 0},
};
static driver_t at91sam9_driver = {
"at91sam",
at91_methods,
sizeof(struct at91sam9_softc),
};
static devclass_t at91sam9_devclass;
DRIVER_MODULE(at91sam, atmelarm, at91sam9_driver, at91sam9_devclass, 0, 0);
static struct at91_soc_data soc_data = {
.soc_delay = at91_pit_delay,
.soc_reset = at91_rst_cpu_reset,
.soc_clock_init = at91_clock_init,
.soc_irq_prio = at91_irq_prio,
.soc_childpren = at91_devs,
.soc_children = at91_devs,
};
AT91_SOC(AT91_T_SAM9G20, &soc_data);

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@ -47,10 +47,6 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_pmcvar.h>
#include <arm/at91/at91_rstreg.h>
struct at91sam9x25_softc {
int filler;
};
/*
* Standard priority levels for the system. 0 is lowest and 7 is highest.
* These values are the ones Atmel uses for its Linux port
@ -154,23 +150,7 @@ at91_pll_outb(int freq)
}
static void
at91_identify(driver_t *drv, device_t parent)
{
if (soc_info.type == AT91_T_SAM9X5 && soc_info.subtype == AT91_ST_SAM9X25)
at91_add_child(parent, 0, "at91sam9x25", 0, 0, 0, -1, 0, 0);
}
static int
at91_probe(device_t dev)
{
device_set_desc(dev, "AT91SAM9X25");
return (0);
}
static int
at91_attach(device_t dev)
at91_clock_init(void)
{
struct at91_pmc_clock *clk;
@ -208,31 +188,14 @@ at91_attach(device_t dev)
clk->pll_div_mask = SAM9X25_PLL_B_DIV_MASK;
clk->set_outb = at91_pll_outb;
at91_pmc_clock_deref(clk);
return (0);
}
static device_method_t at91sam9x25_methods[] = {
DEVMETHOD(device_probe, at91_probe),
DEVMETHOD(device_attach, at91_attach),
DEVMETHOD(device_identify, at91_identify),
{0, 0},
};
static driver_t at91sam9x25_driver = {
"at91sam9x25",
at91sam9x25_methods,
sizeof(struct at91sam9x25_softc),
};
static devclass_t at91sam9x25_devclass;
DRIVER_MODULE(at91sam9x25, atmelarm, at91sam9x25_driver, at91sam9x25_devclass, 0, 0);
static struct at91_soc_data soc_data = {
.soc_delay = at91_pit_delay,
.soc_reset = at91_rst_cpu_reset,
.soc_clock_init = at91_clock_init,
.soc_irq_prio = at91_irq_prio,
.soc_childpren = at91_devs,
.soc_children = at91_devs,
};
AT91_SOC_SUB(AT91_T_SAM9X5, AT91_ST_SAM9X25, &soc_data);

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@ -104,10 +104,12 @@ enum at91_soc_family {
typedef void (*DELAY_t)(int);
typedef void (*cpu_reset_t)(void);
typedef void (*clk_init_t)(void);
struct at91_soc_data {
DELAY_t soc_delay;
cpu_reset_t soc_reset;
clk_init_t soc_clock_init;
const int *soc_irq_prio;
const struct cpu_devs *soc_children;
};