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* Add new debug category

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* Refactor out / restructure / extend debugging information

PR:		kern/197143
Submitted by:	Andriy Voskoboinyk <s3erios@gmail.com>
This commit is contained in:
Adrian Chadd 2015-03-15 21:04:55 +00:00
parent 32e4f2f7e9
commit a6df6cfe65
3 changed files with 139 additions and 26 deletions
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69
sys/dev/wpi/if_wpi.c
View File

@ -184,6 +184,9 @@ static void wpi_tx_done(struct wpi_softc *, struct wpi_rx_desc *);
static void wpi_cmd_done(struct wpi_softc *, struct wpi_rx_desc *);
static void wpi_notif_intr(struct wpi_softc *);
static void wpi_wakeup_intr(struct wpi_softc *);
#ifdef WPI_DEBUG
static void wpi_debug_registers(struct wpi_softc *);
#endif
static void wpi_fatal_intr(struct wpi_softc *);
static void wpi_intr(void *);
static int wpi_cmd2(struct wpi_softc *, struct wpi_buf *);
@ -2198,6 +2201,69 @@ wpi_wakeup_intr(struct wpi_softc *sc)
WPI_CLRBITS(sc, WPI_GP_CNTRL, WPI_GP_CNTRL_MAC_ACCESS_REQ);
}
/*
* This function prints firmware registers
*/
#ifdef WPI_DEBUG
static void
wpi_debug_registers(struct wpi_softc *sc)
{
#define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
int i;
static const uint32_t csr_tbl[] = {
WPI_HW_IF_CONFIG,
WPI_INT,
WPI_INT_MASK,
WPI_FH_INT,
WPI_GPIO_IN,
WPI_RESET,
WPI_GP_CNTRL,
WPI_EEPROM,
WPI_EEPROM_GP,
WPI_GIO,
WPI_UCODE_GP1,
WPI_UCODE_GP2,
WPI_GIO_CHICKEN,
WPI_ANA_PLL,
WPI_DBG_HPET_MEM,
};
static const uint32_t prph_tbl[] = {
WPI_APMG_CLK_CTRL,
WPI_APMG_PS,
WPI_APMG_PCI_STT,
WPI_APMG_RFKILL,
};
DPRINTF(sc, WPI_DEBUG_REGISTER,"%s","\n");
for (i = 0; i < COUNTOF(csr_tbl); i++) {
DPRINTF(sc, WPI_DEBUG_REGISTER, " %-18s: 0x%08x ",
wpi_get_csr_string(csr_tbl[i]), WPI_READ(sc, csr_tbl[i]));
if ((i + 1) % 2 == 0)
DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
}
DPRINTF(sc, WPI_DEBUG_REGISTER, "\n\n");
if (wpi_nic_lock(sc) == 0) {
for (i = 0; i < COUNTOF(prph_tbl); i++) {
DPRINTF(sc, WPI_DEBUG_REGISTER, " %-18s: 0x%08x ",
wpi_get_prph_string(prph_tbl[i]),
wpi_prph_read(sc, prph_tbl[i]));
if ((i + 1) % 2 == 0)
DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
}
DPRINTF(sc, WPI_DEBUG_REGISTER, "\n");
wpi_nic_unlock(sc);
} else {
DPRINTF(sc, WPI_DEBUG_REGISTER,
"Cannot access internal registers.\n");
}
#undef COUNTOF
}
#endif
/*
* Dump the error log of the firmware when a firmware panic occurs. Although
* we can't debug the firmware because it is neither open source nor free, it
@ -2298,6 +2364,9 @@ wpi_intr(void *arg)
struct ieee80211com *ic = ifp->if_l2com;
device_printf(sc->sc_dev, "fatal firmware error\n");
#ifdef WPI_DEBUG
wpi_debug_registers(sc);
#endif
wpi_fatal_intr(sc);
DPRINTF(sc, WPI_DEBUG_HW,
"(%s)\n", (r1 & WPI_INT_SW_ERR) ? "(Software Error)" :

95
sys/dev/wpi/if_wpi_debug.h
View File

@ -41,6 +41,7 @@ enum {
WPI_DEBUG_EEPROM = 0x00008000, /* EEPROM info */
WPI_DEBUG_KEY = 0x00010000, /* node key management */
WPI_DEBUG_EDCA = 0x00020000, /* WME info */
WPI_DEBUG_REGISTER = 0x00080000, /* print chipset register */
WPI_DEBUG_ANY = 0xffffffff
};
@ -54,36 +55,38 @@ enum {
#define TRACE_STR_END "->%s: end\n"
#define TRACE_STR_END_ERR "->%s: end in error\n"
#define WPI_DESC(x) case x: return #x
static const char *wpi_cmd_str(int cmd)
{
switch (cmd) {
/* Notifications */
case WPI_UC_READY: return "UC_READY";
case WPI_RX_DONE: return "RX_DONE";
case WPI_START_SCAN: return "START_SCAN";
case WPI_SCAN_RESULTS: return "SCAN_RESULTS";
case WPI_STOP_SCAN: return "STOP_SCAN";
case WPI_BEACON_SENT: return "BEACON_SENT";
case WPI_RX_STATISTICS: return "RX_STATS";
case WPI_BEACON_STATISTICS: return "BEACON_STATS";
case WPI_STATE_CHANGED: return "STATE_CHANGED";
case WPI_BEACON_MISSED: return "BEACON_MISSED";
/* Notifications. */
WPI_DESC(WPI_UC_READY);
WPI_DESC(WPI_RX_DONE);
WPI_DESC(WPI_START_SCAN);
WPI_DESC(WPI_SCAN_RESULTS);
WPI_DESC(WPI_STOP_SCAN);
WPI_DESC(WPI_BEACON_SENT);
WPI_DESC(WPI_RX_STATISTICS);
WPI_DESC(WPI_BEACON_STATISTICS);
WPI_DESC(WPI_STATE_CHANGED);
WPI_DESC(WPI_BEACON_MISSED);
/* Command notifications */
case WPI_CMD_RXON: return "WPI_CMD_RXON";
case WPI_CMD_RXON_ASSOC: return "WPI_CMD_RXON_ASSOC";
case WPI_CMD_EDCA_PARAMS: return "WPI_CMD_EDCA_PARAMS";
case WPI_CMD_TIMING: return "WPI_CMD_TIMING";
case WPI_CMD_ADD_NODE: return "WPI_CMD_ADD_NODE";
case WPI_CMD_DEL_NODE: return "WPI_CMD_DEL_NODE";
case WPI_CMD_TX_DATA: return "WPI_CMD_TX_DATA";
case WPI_CMD_MRR_SETUP: return "WPI_CMD_MRR_SETUP";
case WPI_CMD_SET_LED: return "WPI_CMD_SET_LED";
case WPI_CMD_SET_POWER_MODE: return "WPI_CMD_SET_POWER_MODE";
case WPI_CMD_SCAN: return "WPI_CMD_SCAN";
case WPI_CMD_SET_BEACON: return "WPI_CMD_SET_BEACON";
case WPI_CMD_TXPOWER: return "WPI_CMD_TXPOWER";
case WPI_CMD_BT_COEX: return "WPI_CMD_BT_COEX";
/* Command notifications. */
WPI_DESC(WPI_CMD_RXON);
WPI_DESC(WPI_CMD_RXON_ASSOC);
WPI_DESC(WPI_CMD_EDCA_PARAMS);
WPI_DESC(WPI_CMD_TIMING);
WPI_DESC(WPI_CMD_ADD_NODE);
WPI_DESC(WPI_CMD_DEL_NODE);
WPI_DESC(WPI_CMD_TX_DATA);
WPI_DESC(WPI_CMD_MRR_SETUP);
WPI_DESC(WPI_CMD_SET_LED);
WPI_DESC(WPI_CMD_SET_POWER_MODE);
WPI_DESC(WPI_CMD_SCAN);
WPI_DESC(WPI_CMD_SET_BEACON);
WPI_DESC(WPI_CMD_TXPOWER);
WPI_DESC(WPI_CMD_BT_COEX);
default:
KASSERT(1, ("Unknown Command: %d\n", cmd));
@ -91,6 +94,46 @@ static const char *wpi_cmd_str(int cmd)
}
}
/*
* Translate CSR code to string
*/
static const char *wpi_get_csr_string(int csr)
{
switch (csr) {
WPI_DESC(WPI_HW_IF_CONFIG);
WPI_DESC(WPI_INT);
WPI_DESC(WPI_INT_MASK);
WPI_DESC(WPI_FH_INT);
WPI_DESC(WPI_GPIO_IN);
WPI_DESC(WPI_RESET);
WPI_DESC(WPI_GP_CNTRL);
WPI_DESC(WPI_EEPROM);
WPI_DESC(WPI_EEPROM_GP);
WPI_DESC(WPI_GIO);
WPI_DESC(WPI_UCODE_GP1);
WPI_DESC(WPI_UCODE_GP2);
WPI_DESC(WPI_GIO_CHICKEN);
WPI_DESC(WPI_ANA_PLL);
WPI_DESC(WPI_DBG_HPET_MEM);
default:
KASSERT(1, ("Unknown CSR: %d\n", csr));
return "UNKNOWN CSR";
}
}
static const char *wpi_get_prph_string(int prph)
{
switch (prph) {
WPI_DESC(WPI_APMG_CLK_CTRL);
WPI_DESC(WPI_APMG_PS);
WPI_DESC(WPI_APMG_PCI_STT);
WPI_DESC(WPI_APMG_RFKILL);
default:
KASSERT(1, ("Unknown register: %d\n", prph));
return "UNKNOWN PRPH";
}
}
#else
#define DPRINTF(sc, m, ...) do { (void) sc; } while (0)
#endif

1
sys/dev/wpi/if_wpireg.h
View File

@ -97,6 +97,7 @@
#define WPI_ALM_SCHED_TXF5MF 0x2e20
#define WPI_ALM_SCHED_SBYPASS_MODE1 0x2e2c
#define WPI_ALM_SCHED_SBYPASS_MODE2 0x2e30
#define WPI_APMG_CLK_CTRL 0x3000
#define WPI_APMG_CLK_EN 0x3004
#define WPI_APMG_CLK_DIS 0x3008
#define WPI_APMG_PS 0x300c