Correct definition of T2 mode bit of MRBE Message Page 5 Next Page
Control Register.
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@ -390,7 +390,7 @@
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#define BRGPHY_BLOCK_ADDR_MRBE 0x8350
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#define BRGPHY_MRBE_MSG_PG5_NP 0x10
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#define BRGPHY_MRBE_MSG_PG5_NP_MBRE 0x0001
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#define BRGPHY_MRBE_MSG_PG5_NP_T2 0x0001
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#define BRGPHY_MRBE_MSG_PG5_NP_T2 0x0002
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/* 5709S SerDes "IEEE Clause 73 User B0" Registers */
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#define BRGPHY_BLOCK_ADDR_CL73_USER_B0 0x8370
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