Two minor changes to the code that builds the pci map array:
1) Stop at the first map register that contains a zero value. 2) When testing for the map size work up from low values, since this works around a bug in some BusLogic SCSI card, which has the 16 upper port base address bits hardwired to zero. The config register dump printed in the bootverbose case has been slightly rearranged.
This commit is contained in:
Stefan Eßer
parent
8e6361044d
commit
a9ad937362
@ -23,7 +23,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: pci.c,v 1.73 1997/05/27 04:09:01 fsmp Exp $
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* $Id: pci.c,v 1.74 1997/05/27 19:24:36 fsmp Exp $
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*
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*/
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@ -99,11 +99,13 @@ pci_mapsize(unsigned testval)
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int ln2size;
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testval = pci_mapbase(testval);
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ln2size = 32;
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while ((testval & 0x80000000) != 0)
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{
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ln2size--;
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testval <<= 1;
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ln2size = 0;
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if (testval != 0) {
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while ((testval & 1) == 0)
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{
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ln2size++;
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testval >>= 1;
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}
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}
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return (ln2size);
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}
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@ -139,9 +141,19 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
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pcimap *map;
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int map64 = 0;
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while (maxmaps > 0
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&& pci_cfgread(cfg, PCIR_MAPS + (maxmaps -1) *4, 4) == 0)
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maxmaps--;
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for (i = 0; i < maxmaps; i++) {
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int reg = PCIR_MAPS + i*4;
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u_int32_t base;
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u_int32_t ln2range;
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base = pci_cfgread(cfg, reg, 4);
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ln2range = pci_maprange(base);
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if (base == 0 || ln2range == 0)
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maxmaps = i;
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else if (ln2range > 32)
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i++;
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}
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map = malloc(maxmaps * sizeof (pcimap), M_DEVBUF, M_WAITOK);
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if (map != NULL) {
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@ -169,16 +181,6 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
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map[i].base = base;
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map64 = 0;
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}
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if (map[i].type == 0) {
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/*
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* This indicates, that some config space register
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* was mistaken to contain a map, while it in fact
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* contains unrelated information!
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* Ignore this map and all that might have been
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* expected to follow ...
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*/
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maxmaps = i;
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}
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}
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cfg->nummaps = maxmaps;
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}
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@ -373,29 +375,28 @@ pci_freecfg(pcicfgregs *cfg)
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static void
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pci_addcfg(pcicfgregs *cfg)
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{
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#ifdef PCI_DEBUG
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if (bootverbose) {
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int i;
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printf("new pci: vendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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cfg->vendor, cfg->device, cfg->revid);
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printf("\t cmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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printf("\t class=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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cfg->class, cfg->subclass, cfg->progif, cfg->hdrtype, cfg->mfdev);
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printf("\t lattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
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#ifdef PCI_DEBUG
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printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
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cfg->lattimer, cfg->lattimer * 30,
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cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
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#endif /* PCI_DEBUG */
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if (cfg->intpin > 0)
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printf("\t intpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
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printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
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for (i = 0; i < cfg->nummaps; i++) {
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pcimap *m = &cfg->map[i];
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printf("\t map[%d]: type %x, range %2d, base %08x, size %2d\n",
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printf("\tmap[%d]: type %x, range %2d, base %08x, size %2d\n",
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i, m->type, m->ln2range, m->base, m->ln2size);
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}
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}
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#endif /* PCI_DEBUG */
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pci_drvattach(cfg); /* XXX currently defined in pci_compat.c */
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}
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@ -23,7 +23,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: pci.c,v 1.73 1997/05/27 04:09:01 fsmp Exp $
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* $Id: pci.c,v 1.74 1997/05/27 19:24:36 fsmp Exp $
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*
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*/
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@ -99,11 +99,13 @@ pci_mapsize(unsigned testval)
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int ln2size;
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testval = pci_mapbase(testval);
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ln2size = 32;
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while ((testval & 0x80000000) != 0)
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{
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ln2size--;
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testval <<= 1;
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ln2size = 0;
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if (testval != 0) {
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while ((testval & 1) == 0)
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{
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ln2size++;
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testval >>= 1;
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}
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}
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return (ln2size);
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}
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@ -139,9 +141,19 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
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pcimap *map;
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int map64 = 0;
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while (maxmaps > 0
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&& pci_cfgread(cfg, PCIR_MAPS + (maxmaps -1) *4, 4) == 0)
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maxmaps--;
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for (i = 0; i < maxmaps; i++) {
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int reg = PCIR_MAPS + i*4;
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u_int32_t base;
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u_int32_t ln2range;
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base = pci_cfgread(cfg, reg, 4);
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ln2range = pci_maprange(base);
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if (base == 0 || ln2range == 0)
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maxmaps = i;
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else if (ln2range > 32)
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i++;
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}
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map = malloc(maxmaps * sizeof (pcimap), M_DEVBUF, M_WAITOK);
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if (map != NULL) {
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@ -169,16 +181,6 @@ pci_readmaps(pcicfgregs *cfg, int maxmaps)
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map[i].base = base;
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map64 = 0;
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}
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if (map[i].type == 0) {
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/*
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* This indicates, that some config space register
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* was mistaken to contain a map, while it in fact
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* contains unrelated information!
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* Ignore this map and all that might have been
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* expected to follow ...
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*/
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maxmaps = i;
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}
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}
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cfg->nummaps = maxmaps;
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}
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@ -373,29 +375,28 @@ pci_freecfg(pcicfgregs *cfg)
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static void
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pci_addcfg(pcicfgregs *cfg)
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{
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#ifdef PCI_DEBUG
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if (bootverbose) {
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int i;
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printf("new pci: vendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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cfg->vendor, cfg->device, cfg->revid);
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printf("\t cmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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printf("\t class=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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cfg->class, cfg->subclass, cfg->progif, cfg->hdrtype, cfg->mfdev);
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printf("\t lattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
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#ifdef PCI_DEBUG
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printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
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cfg->lattimer, cfg->lattimer * 30,
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cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
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#endif /* PCI_DEBUG */
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if (cfg->intpin > 0)
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printf("\t intpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
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printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
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for (i = 0; i < cfg->nummaps; i++) {
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pcimap *m = &cfg->map[i];
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printf("\t map[%d]: type %x, range %2d, base %08x, size %2d\n",
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printf("\tmap[%d]: type %x, range %2d, base %08x, size %2d\n",
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i, m->type, m->ln2range, m->base, m->ln2size);
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}
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}
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#endif /* PCI_DEBUG */
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pci_drvattach(cfg); /* XXX currently defined in pci_compat.c */
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}
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