The message ring interrupt needs to be enabled for all cpus, not just
the ones which run the message ring handler. Some bits of the interrupt mask are part of the status register which is saved with the process context, and these bits are initialized from the cpu on which the process is created. This means that all the processes should have the same value for these interrupt mask bits, so that the interrupt mask remains the same regardless of what thread is scheduled on the cpu. Submitted by: Sriram Gorti (srgorti at netlogicmicro dot com)
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@ -341,67 +341,63 @@ xlr_mem_init(void)
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boot_map = (struct xlr_boot1_mem_map *)
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(unsigned long)xlr_boot1_info.psb_mem_map;
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for (i = 0, j = 0; i < boot_map->num_entries; i++, j += 2) {
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if (boot_map->physmem_map[i].type == BOOT1_MEM_RAM) {
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if (j == 14) {
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printf("*** ERROR *** memory map too large ***\n");
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break;
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}
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if (j == 0) {
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/* TODO FIXME */
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/* start after kernel end */
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phys_avail[0] = (vm_paddr_t)
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MIPS_KSEG0_TO_PHYS(&_end) + 0x20000;
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/* boot loader start */
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/* HACK to Use bootloaders memory region */
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/* TODO FIXME */
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if (boot_map->physmem_map[0].size == 0x0c000000) {
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boot_map->physmem_map[0].size = 0x0ff00000;
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}
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phys_avail[1] = boot_map->physmem_map[0].addr +
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boot_map->physmem_map[0].size;
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printf("First segment: addr:%p -> %p \n",
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(void *)phys_avail[0],
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(void *)phys_avail[1]);
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dump_avail[0] = phys_avail[0];
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dump_avail[1] = phys_avail[1];
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} else {
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/*
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* Can't use this code yet, because most of the fixed allocations happen from
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* the biggest physical area. If we have more than 512M memory the kernel will try
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* to map from the second are which is not in KSEG0 and not mapped
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*/
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phys_avail[j] = (vm_paddr_t)
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boot_map->physmem_map[i].addr;
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phys_avail[j + 1] = phys_avail[j] +
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boot_map->physmem_map[i].size;
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if (phys_avail[j + 1] < phys_avail[j] ) {
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/* Houston we have an issue. Memory is
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* larger than possible. Its probably in
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* 64 bit > 4Gig and we are in 32 bit mode.
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*/
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phys_avail[j + 1] = 0xfffff000;
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printf("boot map size was %jx\n",
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(intmax_t)boot_map->physmem_map[i].size);
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boot_map->physmem_map[i].size = phys_avail[j + 1]
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- phys_avail[j];
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printf("reduced to %jx\n",
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(intmax_t)boot_map->physmem_map[i].size);
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}
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printf("Next segment : addr:%p -> %p \n",
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(void *)phys_avail[j],
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(void *)phys_avail[j+1]);
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}
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dump_avail[j] = phys_avail[j];
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dump_avail[j+1] = phys_avail[j+1];
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physsz += boot_map->physmem_map[i].size;
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if (boot_map->physmem_map[i].type != BOOT1_MEM_RAM)
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continue;
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if (j == 14) {
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printf("*** ERROR *** memory map too large ***\n");
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break;
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}
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if (j == 0) {
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/* start after kernel end */
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phys_avail[0] = (vm_paddr_t)
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MIPS_KSEG0_TO_PHYS(&_end) + 0x20000;
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/* boot loader start */
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/* HACK to Use bootloaders memory region */
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if (boot_map->physmem_map[0].size == 0x0c000000) {
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boot_map->physmem_map[0].size = 0x0ff00000;
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}
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phys_avail[1] = boot_map->physmem_map[0].addr +
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boot_map->physmem_map[0].size;
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printf("First segment: addr:%p -> %p \n",
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(void *)phys_avail[0],
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(void *)phys_avail[1]);
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dump_avail[0] = phys_avail[0];
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dump_avail[1] = phys_avail[1];
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} else {
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/*
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* In 32 bit physical address mode we cannot use
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* mem > 0xffffffff
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*/
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if (boot_map->physmem_map[i].addr > 0xfffff000U) {
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printf("Memory: start %#jx size %#jx ignored"
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"(>4GB)\n",
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(intmax_t)boot_map->physmem_map[i].addr,
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(intmax_t)boot_map->physmem_map[i].size);
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continue;
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}
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if (boot_map->physmem_map[i].addr +
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boot_map->physmem_map[i].size > 0xfffff000U) {
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boot_map->physmem_map[i].size = 0xfffff000U -
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boot_map->physmem_map[i].addr;
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printf("Memory: start %#jx limited to 4GB\n",
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(intmax_t)boot_map->physmem_map[i].addr);
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}
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phys_avail[j] = (vm_paddr_t)
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boot_map->physmem_map[i].addr;
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phys_avail[j + 1] = phys_avail[j] +
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boot_map->physmem_map[i].size;
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printf("Next segment : addr:%#jx -> %#jx\n",
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(uintmax_t)phys_avail[j],
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(uintmax_t)phys_avail[j+1]);
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}
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dump_avail[j] = phys_avail[j];
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dump_avail[j+1] = phys_avail[j+1];
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physsz += boot_map->physmem_map[i].size;
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}
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/* FIXME XLR TODO */
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phys_avail[j] = phys_avail[j + 1] = 0;
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realmem = physmem = btoc(physsz);
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}
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@ -418,7 +414,6 @@ platform_start(__register_t a0 __unused,
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void (*wakeup) (void *, void *, unsigned int);
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#endif
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/* XXX FIXME the code below is not 64 bit clean */
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/* Save boot loader and other stuff from scratch regs */
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xlr_boot1_info = *(struct boot1_info *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 0);
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cpu_mask_info = read_c0_register64(MIPS_COP_0_OSSCRATCH, 1);
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@ -431,9 +426,6 @@ platform_start(__register_t a0 __unused,
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xlr_argv = (int32_t *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 5);
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xlr_envp = (int32_t *)(intptr_t)(int)read_c0_register32(MIPS_COP_0_OSSCRATCH, 6);
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/* TODO: Verify the magic number here */
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/* FIXMELATER: xlr_boot1_info.magic_number */
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/* Initialize pcpu stuff */
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mips_pcpu0_init();
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@ -530,10 +522,6 @@ platform_identify(void)
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(int)xlr_boot1_info.board_minor_version, mips_rd_prid());
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}
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/*
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* XXX Maybe return the state of the watchdog in enter, and pass it to
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* exit? Like spl().
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*/
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void
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platform_trap_enter(void)
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{
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@ -591,10 +579,9 @@ platform_init_ap(int cpuid)
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write_c0_eimr64(0ULL);
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xlr_enable_irq(IRQ_IPI);
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xlr_enable_irq(IRQ_TIMER);
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if (xlr_thr_id() == 0) {
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if (xlr_thr_id() == 0)
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xlr_msgring_cpu_init();
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xlr_enable_irq(IRQ_MSGRING);
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}
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xlr_enable_irq(IRQ_MSGRING);
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return;
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}
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