Improve interrupt and resource allocation in Marvell GPIO driver
This patch adds support for more than one interrupts in GPIO controller. It reads necessary information (such as cell size) from FDT, so there are no magic numbers. Note that interrupts are still not working, but this patch makes one good step in correct direction Submitted by: Patryk Duda <pdk@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D14754
This commit is contained in:
Marcin Wojtas
parent
1c45bd112b
commit
ad2be10ff0
@ -67,7 +67,10 @@ __FBSDID("$FreeBSD$");
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#define DEBOUNCE_CHECK_TICKS ((hz / 1000) * DEBOUNCE_CHECK_MS)
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struct mv_gpio_softc {
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struct resource * res[GPIO_MAX_INTR_COUNT + 1];
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struct resource * mem_res;
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int mem_rid;
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struct resource * irq_res[GPIO_MAX_INTR_COUNT];
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int irq_rid[GPIO_MAX_INTR_COUNT];
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void *ih_cookie[GPIO_MAX_INTR_COUNT];
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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@ -83,8 +86,6 @@ struct mv_gpio_softc {
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int *debounce_counters;
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};
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extern struct resource_spec mv_gpio_res[];
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static struct mv_gpio_softc *mv_gpio_softc = NULL;
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static uint32_t gpio_setup[MV_GPIO_MAX_NPINS];
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@ -119,6 +120,15 @@ static void mv_gpio_int_ack(uint32_t pin);
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static void mv_gpio_value_set(uint32_t pin, uint8_t val);
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static uint32_t mv_gpio_value_get(uint32_t pin, uint8_t exclude_polar);
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static void mv_gpio_intr_mask(int pin);
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static void mv_gpio_intr_unmask(int pin);
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int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
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void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
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int mv_gpio_configure(uint32_t pin, uint32_t flags, uint32_t mask);
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void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
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uint8_t mv_gpio_in(uint32_t pin);
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#define MV_GPIO_LOCK() mtx_lock_spin(&mv_gpio_softc->mutex)
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#define MV_GPIO_UNLOCK() mtx_unlock_spin(&mv_gpio_softc->mutex)
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#define MV_GPIO_ASSERT_LOCKED() mtx_assert(&mv_gpio_softc->mutex, MA_OWNED)
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@ -171,9 +181,12 @@ mv_gpio_probe(device_t dev)
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static int
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mv_gpio_attach(device_t dev)
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{
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int error, i;
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int error, i, size;
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struct mv_gpio_softc *sc;
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uint32_t dev_id, rev_id;
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pcell_t pincnt = 0;
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pcell_t irq_cells = 0;
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phandle_t iparent;
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sc = (struct mv_gpio_softc *)device_get_softc(dev);
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if (sc == NULL)
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@ -201,7 +214,42 @@ mv_gpio_attach(device_t dev)
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sc->use_high = 1;
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} else {
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device_printf(dev, "unknown chip id=0x%x\n", dev_id);
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if (OF_getencprop(ofw_bus_get_node(dev), "pin-count", &pincnt,
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sizeof(pcell_t)) >= 0 ||
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OF_getencprop(ofw_bus_get_node(dev), "ngpios", &pincnt,
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sizeof(pcell_t)) >= 0) {
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sc->pin_num = pincnt;
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device_printf(dev, "%d pins available\n", sc->pin_num);
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} else {
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device_printf(dev, "ERROR: no pin-count entry found!\n");
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return (ENXIO);
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}
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}
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/* Find root interrupt controller */
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iparent = ofw_bus_find_iparent(ofw_bus_get_node(dev));
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if (iparent == 0) {
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device_printf(dev, "No interrupt-parrent found. "
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"Error in DTB\n");
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return (ENXIO);
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} else {
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/* While at parent - store interrupt cells prop */
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if (OF_searchencprop(OF_node_from_xref(iparent),
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"#interrupt-cells", &irq_cells, sizeof(irq_cells)) == -1) {
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device_printf(dev, "DTB: Missing #interrupt-cells "
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"property in interrupt parent node\n");
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return (ENXIO);
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}
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}
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size = OF_getproplen(ofw_bus_get_node(dev), "interrupts");
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if (size != -1) {
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size = size / sizeof(pcell_t);
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size = size / irq_cells;
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sc->irq_num = size;
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device_printf(dev, "%d IRQs available\n", sc->irq_num);
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} else {
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device_printf(dev, "ERROR: no interrupts entry found!\n");
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return (ENXIO);
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}
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@ -217,15 +265,30 @@ mv_gpio_attach(device_t dev)
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mtx_init(&sc->mutex, device_get_nameunit(dev), NULL, MTX_SPIN);
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error = bus_alloc_resources(dev, mv_gpio_res, sc->res);
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if (error) {
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sc->mem_rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
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RF_ACTIVE);
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if (!sc->mem_res) {
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mtx_destroy(&sc->mutex);
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device_printf(dev, "could not allocate resources\n");
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device_printf(dev, "could not allocate memory window\n");
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return (ENXIO);
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}
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sc->bst = rman_get_bustag(sc->res[0]);
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sc->bsh = rman_get_bushandle(sc->res[0]);
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sc->bst = rman_get_bustag(sc->mem_res);
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sc->bsh = rman_get_bushandle(sc->mem_res);
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for (i = 0; i < sc->irq_num; i++) {
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sc->irq_rid[i] = i;
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sc->irq_res[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->irq_rid[i], RF_ACTIVE);
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if (!sc->irq_res[i]) {
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mtx_destroy(&sc->mutex);
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device_printf(dev,
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"could not allocate gpio%d interrupt\n", i+1);
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return (ENXIO);
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}
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}
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/* Disable all interrupts */
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bus_space_write_4(sc->bst, sc->bsh, GPIO_INT_EDGE_MASK, 0);
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@ -241,12 +304,13 @@ mv_gpio_attach(device_t dev)
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}
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for (i = 0; i < sc->irq_num; i++) {
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if (bus_setup_intr(dev, sc->res[1 + i],
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if (bus_setup_intr(dev, sc->irq_res[i],
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INTR_TYPE_MISC,
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(driver_filter_t *)mv_gpio_intr, NULL,
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sc, &sc->ih_cookie[i]) != 0) {
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mtx_destroy(&sc->mutex);
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bus_release_resources(dev, mv_gpio_res, sc->res);
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->irq_rid[i], sc->irq_res[i]);
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device_printf(dev, "could not set up intr %d\n", i);
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return (ENXIO);
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}
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@ -419,15 +483,21 @@ mv_gpio_exec_intr_handlers(uint32_t status, int high)
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static void
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mv_gpio_intr_handler(int pin)
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{
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struct intr_event *event;
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#ifdef INTRNG
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struct intr_irqsrc isrc;
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MV_GPIO_ASSERT_LOCKED();
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event = gpio_events[pin];
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if (event == NULL || TAILQ_EMPTY(&event->ie_handlers))
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#ifdef INTR_SOLO
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isrc.isrc_filter = NULL;
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#endif
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isrc.isrc_event = gpio_events[pin];
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if (isrc.isrc_event == NULL || TAILQ_EMPTY(&isrc.isrc_event->ie_handlers))
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return;
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intr_event_handle(event, NULL);
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intr_isrc_dispatch(&isrc, NULL);
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#endif
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}
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int
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@ -83,15 +83,6 @@ extern const struct decode_win *xor_wins;
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extern int idma_wins_no;
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extern int xor_wins_no;
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/* Function prototypes */
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int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
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void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
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void mv_gpio_intr_mask(int pin);
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void mv_gpio_intr_unmask(int pin);
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int mv_gpio_configure(uint32_t pin, uint32_t flags, uint32_t mask);
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void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
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uint8_t mv_gpio_in(uint32_t pin);
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int soc_decode_win(void);
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void soc_id(uint32_t *dev, uint32_t *rev);
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void soc_dump_decode_win(void);
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