oops - ath_hal_disablepcie is actually destined for another purpose,

not to disable the PCIe PHY in prepration for reset.

Extend the enablepci method to have a "poweroff" flag, which if equal
to true means the hardware is about to go to sleep.
This commit is contained in:
Adrian Chadd 2012-05-25 05:01:27 +00:00
parent 881af8c176
commit ae2a0aa428
11 changed files with 40 additions and 25 deletions

View File

@ -832,7 +832,8 @@ struct ath_hal {
HAL_BOOL bChannelChange, HAL_STATUS *status);
HAL_BOOL __ahdecl(*ah_phyDisable)(struct ath_hal *);
HAL_BOOL __ahdecl(*ah_disable)(struct ath_hal *);
void __ahdecl(*ah_configPCIE)(struct ath_hal *, HAL_BOOL restore);
void __ahdecl(*ah_configPCIE)(struct ath_hal *, HAL_BOOL restore,
HAL_BOOL power_off);
void __ahdecl(*ah_disablePCIE)(struct ath_hal *);
void __ahdecl(*ah_setPCUConfig)(struct ath_hal *);
HAL_BOOL __ahdecl(*ah_perCalibration)(struct ath_hal*,

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@ -355,8 +355,8 @@ struct ath_hal_private {
AH_PRIVATE(_ah)->ah_getNfAdjust(_ah, _c)
#define ath_hal_getNoiseFloor(_ah, _nfArray) \
AH_PRIVATE(_ah)->ah_getNoiseFloor(_ah, _nfArray)
#define ath_hal_configPCIE(_ah, _reset) \
(_ah)->ah_configPCIE(_ah, _reset)
#define ath_hal_configPCIE(_ah, _reset, _poweroff) \
(_ah)->ah_configPCIE(_ah, _reset, _poweroff)
#define ath_hal_disablePCIE(_ah) \
(_ah)->ah_disablePCIE(_ah)
#define ath_hal_setInterrupts(_ah, _mask) \

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@ -33,7 +33,8 @@ static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *,
static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah,
struct ieee80211_channel *chan);
static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_on);
static void ar5210DisablePCIE(struct ath_hal *ah);
static const struct ath_hal_private ar5210hal = {{
@ -332,7 +333,7 @@ ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
}
static void
ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
}

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@ -33,7 +33,8 @@ static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
struct ieee80211_channel *chan);
static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar5211DisablePCIE(struct ath_hal *ah);
static const struct ath_hal_private ar5211hal = {{
@ -455,7 +456,7 @@ ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
}
static void
ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
}

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@ -29,7 +29,8 @@
#define AH_5212_COMMON
#include "ar5212/ar5212.ini"
static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar5212DisablePCIE(struct ath_hal *ah);
static const struct ath_hal_private ar5212hal = {{
@ -370,7 +371,7 @@ ar5212Attach(uint16_t devid, HAL_SOFTC sc,
if (AH_PRIVATE(ah)->ah_ispcie) {
/* XXX: build flag to disable this? */
ath_hal_configPCIE(ah, AH_FALSE);
ath_hal_configPCIE(ah, AH_FALSE, AH_FALSE);
}
if (!ar5212ChipTest(ah)) {
@ -666,7 +667,7 @@ ar5212GetChannelEdges(struct ath_hal *ah,
* XXX Clean up the magic numbers.
*/
static void
ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);

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@ -30,7 +30,8 @@
#include "ar5416/ar5416.ini"
static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar5416DisablePCIE(struct ath_hal *ah);
static void ar5416WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
@ -459,13 +460,13 @@ void
ar5416AttachPCIE(struct ath_hal *ah)
{
if (AH_PRIVATE(ah)->ah_ispcie)
ath_hal_configPCIE(ah, AH_FALSE);
ath_hal_configPCIE(ah, AH_FALSE, AH_FALSE);
else
ath_hal_disablePCIE(ah);
}
static void
ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);

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@ -61,7 +61,8 @@ static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal = {
.calPostProc = ar5416AdcDcCalibration
};
static void ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar9280DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9280FillCapabilityInfo(struct ath_hal *ah);
static void ar9280WriteIni(struct ath_hal *ah,
@ -417,7 +418,7 @@ bad:
}
static void
ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);

View File

@ -66,7 +66,8 @@ static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal = {
.calPostProc = ar5416AdcDcCalibration
};
static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar9285DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
static void ar9285WriteIni(struct ath_hal *ah,
@ -364,7 +365,7 @@ bad:
}
static void
ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);

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@ -65,7 +65,8 @@ static const HAL_PERCAL_DATA ar9287_adc_init_dc_cal = {
.calPostProc = ar5416AdcDcCalibration
};
static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
HAL_BOOL power_off);
static void ar9287DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah);
static void ar9287WriteIni(struct ath_hal *ah,
@ -359,13 +360,14 @@ bad:
}
static void
ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
OS_DELAY(1000);
OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT); /* Yes, Kiwi uses the Kite PCIe PHY WA */
/* Yes, Kiwi uses the Kite PCIe PHY WA */
OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);
}
}

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@ -1319,8 +1319,14 @@ ath_suspend(struct ath_softc *sc)
* CardBus detaches the device.
*/
/* For PCIe, this matters */
ath_hal_disablepcie(sc->sc_ah);
/*
* XXX ensure none of the taskqueues are running
* XXX ensure sc_invalid is 1
* XXX ensure the calibration callout is disabled
*/
/* Disable the PCIe PHY, complete with workarounds */
ath_hal_enablepcie(sc->sc_ah, 1, 1);
}
/*
@ -1354,7 +1360,7 @@ ath_resume(struct ath_softc *sc)
__func__, ifp->if_flags);
/* Re-enable PCIe, re-enable the PCIe bus */
ath_hal_enablepcie(ah, 1);
ath_hal_enablepcie(ah, 0, 0);
/*
* Must reset the chip before we reload the

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@ -998,8 +998,8 @@ void ath_intr(void *);
/*
* PCIe suspend/resume/poweron/poweroff related macros
*/
#define ath_hal_enablepcie(_ah, _restore) \
((*(_ah)->ah_configPCIE)((_ah), (_restore)))
#define ath_hal_enablepcie(_ah, _restore, _poweroff) \
((*(_ah)->ah_configPCIE)((_ah), (_restore), (_poweroff)))
#define ath_hal_disablepcie(_ah) \
((*(_ah)->ah_disablePCIE)((_ah)))