oops - ath_hal_disablepcie is actually destined for another purpose,
not to disable the PCIe PHY in prepration for reset. Extend the enablepci method to have a "poweroff" flag, which if equal to true means the hardware is about to go to sleep.
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@ -832,7 +832,8 @@ struct ath_hal {
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HAL_BOOL bChannelChange, HAL_STATUS *status);
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HAL_BOOL __ahdecl(*ah_phyDisable)(struct ath_hal *);
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HAL_BOOL __ahdecl(*ah_disable)(struct ath_hal *);
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void __ahdecl(*ah_configPCIE)(struct ath_hal *, HAL_BOOL restore);
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void __ahdecl(*ah_configPCIE)(struct ath_hal *, HAL_BOOL restore,
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HAL_BOOL power_off);
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void __ahdecl(*ah_disablePCIE)(struct ath_hal *);
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void __ahdecl(*ah_setPCUConfig)(struct ath_hal *);
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HAL_BOOL __ahdecl(*ah_perCalibration)(struct ath_hal*,
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@ -355,8 +355,8 @@ struct ath_hal_private {
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AH_PRIVATE(_ah)->ah_getNfAdjust(_ah, _c)
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#define ath_hal_getNoiseFloor(_ah, _nfArray) \
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AH_PRIVATE(_ah)->ah_getNoiseFloor(_ah, _nfArray)
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#define ath_hal_configPCIE(_ah, _reset) \
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(_ah)->ah_configPCIE(_ah, _reset)
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#define ath_hal_configPCIE(_ah, _reset, _poweroff) \
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(_ah)->ah_configPCIE(_ah, _reset, _poweroff)
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#define ath_hal_disablePCIE(_ah) \
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(_ah)->ah_disablePCIE(_ah)
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#define ath_hal_setInterrupts(_ah, _mask) \
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@ -33,7 +33,8 @@ static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *,
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static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah,
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struct ieee80211_channel *chan);
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static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_on);
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static void ar5210DisablePCIE(struct ath_hal *ah);
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static const struct ath_hal_private ar5210hal = {{
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@ -332,7 +333,7 @@ ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
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}
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static void
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ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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}
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@ -33,7 +33,8 @@ static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
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static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
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struct ieee80211_channel *chan);
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static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar5211DisablePCIE(struct ath_hal *ah);
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static const struct ath_hal_private ar5211hal = {{
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@ -455,7 +456,7 @@ ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
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}
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static void
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ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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}
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@ -29,7 +29,8 @@
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#define AH_5212_COMMON
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#include "ar5212/ar5212.ini"
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static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar5212DisablePCIE(struct ath_hal *ah);
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static const struct ath_hal_private ar5212hal = {{
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@ -370,7 +371,7 @@ ar5212Attach(uint16_t devid, HAL_SOFTC sc,
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if (AH_PRIVATE(ah)->ah_ispcie) {
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/* XXX: build flag to disable this? */
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ath_hal_configPCIE(ah, AH_FALSE);
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ath_hal_configPCIE(ah, AH_FALSE, AH_FALSE);
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}
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if (!ar5212ChipTest(ah)) {
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@ -666,7 +667,7 @@ ar5212GetChannelEdges(struct ath_hal *ah,
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* XXX Clean up the magic numbers.
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*/
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static void
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ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar5212ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
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OS_REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
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@ -30,7 +30,8 @@
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#include "ar5416/ar5416.ini"
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static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar5416DisablePCIE(struct ath_hal *ah);
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static void ar5416WriteIni(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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@ -459,13 +460,13 @@ void
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ar5416AttachPCIE(struct ath_hal *ah)
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{
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if (AH_PRIVATE(ah)->ah_ispcie)
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ath_hal_configPCIE(ah, AH_FALSE);
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ath_hal_configPCIE(ah, AH_FALSE, AH_FALSE);
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else
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ath_hal_disablePCIE(ah);
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}
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static void
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ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
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ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
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@ -61,7 +61,8 @@ static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal = {
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.calPostProc = ar5416AdcDcCalibration
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};
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static void ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar9280DisablePCIE(struct ath_hal *ah);
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static HAL_BOOL ar9280FillCapabilityInfo(struct ath_hal *ah);
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static void ar9280WriteIni(struct ath_hal *ah,
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@ -417,7 +418,7 @@ bad:
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}
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static void
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ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
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ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
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@ -66,7 +66,8 @@ static const HAL_PERCAL_DATA ar9280_adc_init_dc_cal = {
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.calPostProc = ar5416AdcDcCalibration
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};
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static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar9285DisablePCIE(struct ath_hal *ah);
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static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
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static void ar9285WriteIni(struct ath_hal *ah,
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@ -364,7 +365,7 @@ bad:
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}
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static void
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ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
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ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
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@ -65,7 +65,8 @@ static const HAL_PERCAL_DATA ar9287_adc_init_dc_cal = {
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.calPostProc = ar5416AdcDcCalibration
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};
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static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
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static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore,
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HAL_BOOL power_off);
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static void ar9287DisablePCIE(struct ath_hal *ah);
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static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah);
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static void ar9287WriteIni(struct ath_hal *ah,
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@ -359,13 +360,14 @@ bad:
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}
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static void
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ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
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ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
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{
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if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
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ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
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OS_DELAY(1000);
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OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
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OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT); /* Yes, Kiwi uses the Kite PCIe PHY WA */
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/* Yes, Kiwi uses the Kite PCIe PHY WA */
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OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);
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}
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}
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@ -1319,8 +1319,14 @@ ath_suspend(struct ath_softc *sc)
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* CardBus detaches the device.
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*/
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/* For PCIe, this matters */
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ath_hal_disablepcie(sc->sc_ah);
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/*
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* XXX ensure none of the taskqueues are running
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* XXX ensure sc_invalid is 1
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* XXX ensure the calibration callout is disabled
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*/
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/* Disable the PCIe PHY, complete with workarounds */
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ath_hal_enablepcie(sc->sc_ah, 1, 1);
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}
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/*
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@ -1354,7 +1360,7 @@ ath_resume(struct ath_softc *sc)
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__func__, ifp->if_flags);
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/* Re-enable PCIe, re-enable the PCIe bus */
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ath_hal_enablepcie(ah, 1);
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ath_hal_enablepcie(ah, 0, 0);
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/*
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* Must reset the chip before we reload the
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@ -998,8 +998,8 @@ void ath_intr(void *);
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/*
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* PCIe suspend/resume/poweron/poweroff related macros
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*/
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#define ath_hal_enablepcie(_ah, _restore) \
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((*(_ah)->ah_configPCIE)((_ah), (_restore)))
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#define ath_hal_enablepcie(_ah, _restore, _poweroff) \
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((*(_ah)->ah_configPCIE)((_ah), (_restore), (_poweroff)))
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#define ath_hal_disablepcie(_ah) \
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((*(_ah)->ah_disablePCIE)((_ah)))
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