Fix a bug introduced between 1.1 and 1.1.5. Loading the time was moved
outside the critical region. Make it work with 2.0. It wasn't designed to be called at splclock(). Make it work with prescaling. The overflow threshold was bogus. Make it work for any HZ. Side effect of fixing prescaling. Speed it up. Allocate registers better. Reduce multiplication and division to multiplication and a shift. Speed is now 5-6 usec on a 486DX/33, was about 3 usec more. Optimize for the non-pentium case. The pentium code got moved around a bit and hasn't been tested. Change #include's to 2.0 style.
This commit is contained in:
Bruce Evans
parent
b2e3ee0a69
commit
ae406484f0
@ -31,54 +31,34 @@
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* SUCH DAMAGE.
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*
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* from: Steve McCanne's microtime code
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* $Id: microtime.s,v 1.5 1994/08/11 00:28:17 wollman Exp $
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* $Id: microtime.s,v 1.6 1994/08/13 17:45:09 wollman Exp $
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*/
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#include "machine/asmacros.h"
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#include "../isa/isa.h"
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#include "../isa/timerreg.h"
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#include <machine/asmacros.h>
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.extern _pentium_mhz
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#include <i386/isa/icu.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/timerreg.h>
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/*
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* Use a higher resolution version of microtime if HZ is not
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* overridden (i.e. it is 100Hz).
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*/
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#ifndef HZ
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ENTRY(microtime)
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pushl %edi # save registers
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pushl %esi
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pushl %ebx
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movl $_time, %ebx # get timeval ptr
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#if defined(I586_CPU)
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movl _pentium_mhz, %ecx
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orl %ecx, %ecx
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jz 0f
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#ifdef I586_CPU
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movl _pentium_mhz, %ecx
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testl %ecx, %ecx
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jne pentium_microtime
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#else
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xorl %ecx, %ecx # clear ecx
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#endif
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cli
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.byte 0x0f, 0x31 /* RDTSC */
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idivl _pentium_mhz /* get value in usec */
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movl 4(%ebx), %esi
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movl (%ebx), %edi
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sti
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jmp 4f
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#endif /* Pentium code */
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0:
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movl (%ebx), %edi # sec = time.tv_sec
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movl 4(%ebx), %esi # usec = time.tv_usec
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movb $TIMER_SEL0|TIMER_LATCH, %al # prepare to latch
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cli # disable interrupts
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cli # disable interrupts
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movl $(TIMER_SEL0|TIMER_LATCH), %eax
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outb %al, $TIMER_MODE # latch timer 0's counter
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xorl %ebx, %ebx # clear ebx
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inb $TIMER_CNTR0, %al # Read counter value, LSB first
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movb %al, %bl
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inb $TIMER_CNTR0, %al # read counter value, LSB first
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movb %al, %cl
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inb $TIMER_CNTR0, %al
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movb %al, %bh
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movb %al, %ch
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# Now check for counter overflow. This is tricky because the
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# timer chip doesn't let us atomically read the current counter
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@ -92,63 +72,110 @@ ENTRY(microtime)
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# from the IRR, and mistakenly add a correction to the "close
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# to zero" value.
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#
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# We compare the counter value to heuristic constant 11890.
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# We compare the counter value to the prepared overflow threshold.
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# If the counter value is less than this, we assume the counter
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# didn't overflow between disabling interrupts above and latching
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# the counter value. For example, we assume that the above 10 or so
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# instructions take less than 11932 - 11890 = 42 microseconds to
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# execute.
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# didn't overflow between disabling timer interrupts and latching
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# the counter value above. For example, we assume that interrupts
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# are enabled when we are called (or were disabled just a few
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# cycles before we are called and that the instructions before the
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# "cli" are fast) and that the "cli" and "outb" instructions take
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# less than 10 timer cycles to execute. The last assumption is
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# very safe.
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#
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# Otherwise, the counter might have overflowed. We check for this
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# condition by reading the interrupt request register out of the ICU.
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# If it overflowed, we add in one clock period.
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#
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# The heuristic is "very accurate" because it works 100% if
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# we're called from an ipl less than the clock. Otherwise,
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# it might not work. Currently, only gettimeofday and bpf
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# call microtime so it's not a problem.
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# The heuristic is "very accurate" because it works 100% if we're
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# called with interrupts enabled. Otherwise, it might not work.
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# Currently, only siointrts() calls us with interrupts disabled, so
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# the problem can be avoided at some cost to the general case. The
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# costs are complications in callers to disable interrupts in
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# IO_ICU1 and extra reads of the IRR forced by a conservative
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# overflow threshold.
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#
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# In 2.0, we are called at splhigh() from mi_switch(), so we have
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# to allow for the overflow bit being in ipending instead of in
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# the IRR. Our caller may have executed many instructions since
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# ipending was set, so the heuristic for the IRR is inappropriate
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# for ipending. However, we don't need another heuristic, since
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# the "cli" suffices to lock ipending.
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movl _timer0_prescale, %eax # adjust value if timer is
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addl _timer0_divisor, %eax # reprogrammed
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addl $-11932, %eax
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subl %eax, %ebx
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movl _timer0_max_count, %edx # prepare for 2 uses
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cmpl $11890, %ebx # do we have a possible overflow condition
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jle 1f
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testb $IRQ0, _ipending # is a soft timer interrupt pending?
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jne overflow
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# Do we have a possible overflow condition?
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cmpl _timer0_overflow_threshold, %ecx
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jbe 1f
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inb $IO_ICU1, %al # read IRR in ICU
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testb $1, %al # is a timer interrupt pending?
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testb $IRQ0, %al # is a hard timer interrupt pending?
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je 1f
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addl $-11932, %ebx # yes, subtract one clock period
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overflow:
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subl %edx, %ecx # some intr pending, count timer down through 0
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1:
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# Subtract counter value from max count since it is a count-down value.
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subl %ecx, %edx
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# Adjust for partial ticks.
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addl _timer0_prescaler_count, %edx
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# To divide by 1.193200, we multiply by 27465 and shift right by 15.
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#
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# The multiplier was originally calculated to be
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#
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# 2^18 * 1000000 / 1193200 = 219698.
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#
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# The frequency is 1193200 to be compatible with rounding errors in
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# the calculation of the usual maximum count. 2^18 is the largest
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# power of 2 such that multiplying `i' by it doesn't overflow for i
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# in the range of interest ([0, 11932 + 5)). We adjusted the
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# multiplier a little to minimise the average of
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#
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# fabs(i / 1.1193200 - ((multiplier * i) >> 18))
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#
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# for i in the range and then removed powers of 2 to speed up the
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# multiplication and to avoid overflow for i outside the range
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# (i may be as high as 2^17 if the timer is programmed to its
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# maximum maximum count). The absolute error is less than 1 for
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# all i in the range.
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#if 0
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imul $27645, %edx # 25 cycles on a 486
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#else
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leal (%edx,%edx,2), %eax # a = 3 2 cycles on a 486
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leal (%edx,%eax,4), %eax # a = 13 2
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movl %eax, %ecx # c = 13 1
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shl $5, %eax # a = 416 2
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addl %ecx, %eax # a = 429 1
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leal (%edx,%eax,8), %eax # a = 3433 2
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leal (%edx,%eax,8), %eax # a = 27465 2 (total 12 cycles)
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#endif /* 0 */
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shr $15, %eax
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common_microtime:
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addl _time+4, %eax # usec += time.tv_sec
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movl _time, %edx # sec = time.tv_sec
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sti # enable interrupts
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movl $11932, %eax # subtract counter value from 11932 since
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subl %ebx, %eax # it is a count-down value
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cmpl $1000000, %eax # usec valid?
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jb 1f
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subl $1000000, %eax # adjust usec
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incl %edx # bump sec
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1:
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movl 4(%esp), %ecx # load timeval pointer arg
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movl %edx, (%ecx) # tvp->tv_sec = sec
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movl %eax, 4(%ecx) # tvp->tv_usec = usec
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movl %eax, %ebx # this really is a "imull $1000, %eax, %eax"
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sall $10, %eax # instruction, but this saves us
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sall $3, %ebx # 33/23 clocks on a 486/386 CPU
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subl %ebx, %eax #
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sall $1, %ebx # /sos
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subl %ebx, %eax #
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movl $0, %edx # zero extend eax into edx for div
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movl $1193, %ecx
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idivl %ecx # convert to usecs: mult by 1000/1193
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4:
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addl %eax, %esi # add counter usecs to time.tv_usec
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cmpl $1000000, %esi # carry in timeval?
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jl 2f
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subl $1000000, %esi # adjust usec
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incl %edi # bump sec
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2:
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movl 16(%esp), %ecx # load timeval pointer arg
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movl %edi, (%ecx) # tvp->tv_sec = sec
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movl %esi, 4(%ecx) # tvp->tv_usec = usec
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popl %ebx # restore regs
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popl %esi
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popl %edi
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ret
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#endif /* normal value of HZ */
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ALIGN_TEXT
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pentium_microtime:
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cli
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.byte 0x0f, 0x31 # RDTSC
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divl %ecx # get value in usec
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jmp common_microtime
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