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Add support for RDMA from userspace with T6 cards.

Browse Source 
Submitted by:	Krishnamraju Eraparaju @ Chelsio
Sponsored by:	Chelsio Communications
This commit is contained in:
Navdeep Parhar 2017-02-23 19:21:47 +00:00
parent 3ae36eee9c
commit af67ca3780
7 changed files with 20653 additions and 64 deletions
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25
contrib/ofed/libcxgb4/src/dev.c
View File

@ -145,10 +145,10 @@ static struct ibv_context *c4iw_alloc_context(struct ibv_device *ibdev,
context->ibv_ctx.ops = c4iw_ctx_ops;
switch (rhp->chip_version) {
case CHELSIO_T6:
case CHELSIO_T5:
PDBG("%s T5/T4 device\n", __FUNCTION__);
case CHELSIO_T4:
PDBG("%s T4 device\n", __FUNCTION__);
PDBG("%s T%d device\n", __FUNCTION__, rhp->chip_version);
context->ibv_ctx.ops.async_event = c4iw_async_event;
context->ibv_ctx.ops.post_send = c4iw_post_send;
context->ibv_ctx.ops.post_recv = c4iw_post_receive;
@ -390,29 +390,26 @@ static struct ibv_device *cxgb4_driver_init(const char *uverbs_sys_path,
int abi_version)
{
char devstr[IBV_SYSFS_PATH_MAX], ibdev[16], value[128], *cp;
char t5nexstr[IBV_SYSFS_PATH_MAX];
char dev_str[IBV_SYSFS_PATH_MAX];
struct c4iw_dev *dev;
unsigned vendor, device, fw_maj, fw_min;
int i;
char devnum=0;
char devnum;
char ib_param[16];
#ifndef __linux__
if (ibv_read_sysfs_file(uverbs_sys_path, "ibdev",
ibdev, sizeof ibdev) < 0)
return NULL;
/*
* Extract the non-numeric part of ibdev
* say "t5nex0" -> devname=="t5nex", devnum=0
*/
if (strstr(ibdev,"t5nex")) {
devnum = atoi(ibdev+strlen("t5nex"));
sprintf(t5nexstr, "/dev/t5nex/%d", devnum);
if (ibdev[0] == 't' && ibdev[1] >= '4' && ibdev[1] <= '6' &&
strstr(&ibdev[2], "nex") && (devnum = atoi(&ibdev[5])) >= 0) {
snprintf(dev_str, sizeof(dev_str), "/dev/t%cnex/%d", ibdev[1],
devnum);
} else
return NULL;
if (ibv_read_sysfs_file(t5nexstr, "\%pnpinfo",
value, sizeof value) < 0)
if (ibv_read_sysfs_file(dev_str, "\%pnpinfo", value, sizeof value) < 0)
return NULL;
else {
if (strstr(value,"vendor=")) {
@ -449,7 +446,7 @@ static struct ibv_device *cxgb4_driver_init(const char *uverbs_sys_path,
#ifndef __linux__
if (ibv_read_sysfs_file(t5nexstr, "firmware_version",
if (ibv_read_sysfs_file(dev_str, "firmware_version",
value, sizeof value) < 0)
return NULL;
#else

4
contrib/ofed/libcxgb4/src/qp.c
View File

@ -393,7 +393,7 @@ int c4iw_post_send(struct ibv_qp *ibqp, struct ibv_send_wr *wr,
idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE);
}
t4_ring_sq_db(&qhp->wq, idx, dev_is_t5(qhp->rhp),
t4_ring_sq_db(&qhp->wq, idx, dev_is_t4(qhp->rhp),
len16, wqe);
qhp->wq.sq.queue[qhp->wq.sq.size].status.host_wq_pidx = \
(qhp->wq.sq.wq_pidx);
@ -457,7 +457,7 @@ int c4iw_post_receive(struct ibv_qp *ibqp, struct ibv_recv_wr *wr,
num_wrs--;
}
t4_ring_rq_db(&qhp->wq, idx, dev_is_t5(qhp->rhp),
t4_ring_rq_db(&qhp->wq, idx, dev_is_t4(qhp->rhp),
len16, wqe);
qhp->wq.rq.queue[qhp->wq.rq.size].status.host_wq_pidx = \
(qhp->wq.rq.wq_pidx);

8
contrib/ofed/libcxgb4/src/t4.h
View File

@ -484,11 +484,11 @@ static void copy_wqe_to_udb(volatile u32 *udb_offset, void *wqe)
extern int ma_wr;
extern int t5_en_wc;
static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5, u8 len16,
static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t4, u8 len16,
union t4_wr *wqe)
{
wc_wmb();
if (t5) {
if (!t4) {
if (t5_en_wc && inc == 1 && wq->sq.wc_reg_available) {
PDBG("%s: WC wq->sq.pidx = %d; len16=%d\n",
__func__, wq->sq.pidx, len16);
@ -517,11 +517,11 @@ static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5, u8 len16,
writel(V_QID(wq->sq.qid & wq->qid_mask) | V_PIDX(inc), wq->sq.udb);
}
static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t5, u8 len16,
static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t4, u8 len16,
union t4_recv_wr *wqe)
{
wc_wmb();
if (t5) {
if (!t4) {
if (t5_en_wc && inc == 1 && wq->sq.wc_reg_available) {
PDBG("%s: WC wq->rq.pidx = %d; len16=%d\n",
__func__, wq->rq.pidx, len16);

41
contrib/ofed/libcxgb4/src/t4_chip_type.h
View File

@ -1,7 +1,7 @@
/*
* This file is part of the Chelsio T4 Ethernet driver.
* This file is part of the Chelsio T4/T5/T6 Ethernet driver.
*
* Copyright (C) 2003-2014 Chelsio Communications. All rights reserved.
* Copyright (C) 2003-2016 Chelsio Communications. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
@ -30,6 +30,8 @@
#define CHELSIO_T4_FPGA 0xa
#define CHELSIO_T5 0x5
#define CHELSIO_T5_FPGA 0xb
#define CHELSIO_T6 0x6
#define CHELSIO_T6_FPGA 0xc
/*
* Translate a PCI Device ID to a base Chelsio Chip Version -- CHELSIO_T4,
@ -43,11 +45,25 @@
* Finally: This will of course need to be expanded as future chips are
* developed.
*/
#define CHELSIO_PCI_ID_CHIP_VERSION(__DeviceID) \
(CHELSIO_PCI_ID_VER(__DeviceID) == CHELSIO_T4 || \
CHELSIO_PCI_ID_VER(__DeviceID) == CHELSIO_T4_FPGA \
? CHELSIO_T4 \
: CHELSIO_T5)
static inline unsigned int
CHELSIO_PCI_ID_CHIP_VERSION(unsigned int DeviceID)
{
switch (CHELSIO_PCI_ID_VER(DeviceID)) {
case CHELSIO_T4:
case CHELSIO_T4_FPGA:
return CHELSIO_T4;
case CHELSIO_T5:
case CHELSIO_T5_FPGA:
return CHELSIO_T5;
case CHELSIO_T6:
case CHELSIO_T6_FPGA:
return CHELSIO_T6;
}
return 0;
}
/*
* Internally we code the Chelsio T4 Family "Chip Code" as a tuple:
@ -72,9 +88,13 @@ enum chip_type {
T4_LAST_REV = T4_A2,
T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
T5_FIRST_REV = T5_A0,
T5_LAST_REV = T5_A1,
T6_A0 = CHELSIO_CHIP_CODE(CHELSIO_T6, 0),
T6_FIRST_REV = T6_A0,
T6_LAST_REV = T6_A0,
};
static inline int is_t4(enum chip_type chip)
@ -88,6 +108,11 @@ static inline int is_t5(enum chip_type chip)
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
}
static inline int is_t6(enum chip_type chip)
{
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6);
}
static inline int is_fpga(enum chip_type chip)
{
return chip & CHELSIO_CHIP_FPGA;

53
contrib/ofed/libcxgb4/src/t4_pci_id_tbl.h
View File

@ -1,7 +1,7 @@
/*
* This file is part of the Chelsio T4 Ethernet driver.
* This file is part of the Chelsio T4/T5/T6 Ethernet driver.
*
* Copyright (C) 2003-2014 Chelsio Communications. All rights reserved.
* Copyright (C) 2003-2017 Chelsio Communications. All rights reserved.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
@ -44,7 +44,6 @@
* -- If defined, indicates that the OS Driver has support for Bypass
* -- Adapters.
*/
#ifdef CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
/*
* Some sanity checks ...
@ -96,10 +95,13 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
CH_PCI_ID_TABLE_ENTRY(0xa000), /* PE10K FPGA */
CH_PCI_ID_TABLE_ENTRY(0xb000), /* PF0 T5 PE10K5 FPGA */
CH_PCI_ID_TABLE_ENTRY(0xb001), /* PF0 T5 PE10K FPGA */
CH_PCI_ID_TABLE_ENTRY(0xc006), /* PF0 T6 PE10K6 FPGA */
#else
CH_PCI_ID_TABLE_FENTRY(0xa000), /* PE10K FPGA */
CH_PCI_ID_TABLE_FENTRY(0xb000), /* PF0 T5 PE10K5 FPGA */
CH_PCI_ID_TABLE_FENTRY(0xb001), /* PF0 T5 PE10K FPGA */
CH_PCI_ID_TABLE_FENTRY(0xc006), /* PF0 T6 PE10K6 FPGA */
CH_PCI_ID_TABLE_FENTRY(0xc106), /* PF1 T6 PE10K6 FPGA */
#endif
/*
@ -108,6 +110,7 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
#if ((CH_PCI_DEVICE_ID_FUNCTION == 5) || (CH_PCI_DEVICE_ID_FUNCTION == 6))
CH_PCI_ID_TABLE_ENTRY(0xa001), /* PF1 PE10K FPGA FCOE */
CH_PCI_ID_TABLE_ENTRY(0xa002), /* PE10K FPGA iSCSI */
CH_PCI_ID_TABLE_ENTRY(0xc106), /* PF1 T6 PE10K6 FPGA */
#endif
/*
@ -166,10 +169,50 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
CH_PCI_ID_TABLE_FENTRY(0x5013), /* T580-chr */
CH_PCI_ID_TABLE_FENTRY(0x5014), /* T580-so */
CH_PCI_ID_TABLE_FENTRY(0x5015), /* T502-bt */
CH_PCI_ID_TABLE_FENTRY(0x5016), /* T580-OCP-SO */
CH_PCI_ID_TABLE_FENTRY(0x5017), /* T520-OCP-SO */
CH_PCI_ID_TABLE_FENTRY(0x5018), /* T540-BT */
CH_PCI_ID_TABLE_FENTRY(0x5080), /* Custom T540-cr */
CH_PCI_ID_TABLE_FENTRY(0x5081), /* Custom T540-LL-cr */
CH_PCI_ID_TABLE_FENTRY(0x5082), /* Custom T504-cr */
CH_PCI_ID_TABLE_FENTRY(0x5083), /* Custom T540-CR */
CH_PCI_ID_TABLE_FENTRY(0x5084), /* Custom T580-cr */
CH_PCI_ID_TABLE_FENTRY(0x5085), /* Custom 3x T580-CR */
CH_PCI_ID_TABLE_FENTRY(0x5086), /* Custom 2x T580-CR */
CH_PCI_ID_TABLE_FENTRY(0x5087), /* Custom T580-CR */
CH_PCI_ID_TABLE_FENTRY(0x5088), /* Custom T570-CR */
CH_PCI_ID_TABLE_FENTRY(0x5089), /* Custom T520-CR */
CH_PCI_ID_TABLE_FENTRY(0x5090), /* Custom T540-CR */
CH_PCI_ID_TABLE_FENTRY(0x5091), /* Custom T522-CR */
CH_PCI_ID_TABLE_FENTRY(0x5092), /* Custom T520-CR */
CH_PCI_ID_TABLE_FENTRY(0x5093), /* Custom SECA */
CH_PCI_ID_TABLE_FENTRY(0x5094), /* Custom T540-CR */
CH_PCI_ID_TABLE_FENTRY(0x5095), /* Custom T540-CR-SO */
CH_PCI_ID_TABLE_FENTRY(0x5096), /* Custom T580-CR */
CH_PCI_ID_TABLE_FENTRY(0x5097), /* Custom T520-KR */
CH_PCI_ID_TABLE_FENTRY(0x5098), /* Custom 2x40G QSFP */
CH_PCI_ID_TABLE_FENTRY(0x5099), /* Custom 2x40G QSFP */
CH_PCI_ID_TABLE_FENTRY(0x509A), /* Custom T520-CR */
CH_PCI_ID_TABLE_FENTRY(0x509B), /* Custom T540-CR LOM */
CH_PCI_ID_TABLE_FENTRY(0x509c), /* Custom T520-CR SFP+ LOM */
CH_PCI_ID_TABLE_FENTRY(0x509d), /* Custom T540-CR SFP+ */
/* T6 adapter */
CH_PCI_ID_TABLE_FENTRY(0x6000),
CH_PCI_ID_TABLE_FENTRY(0x6001),
CH_PCI_ID_TABLE_FENTRY(0x6002),
CH_PCI_ID_TABLE_FENTRY(0x6003),
CH_PCI_ID_TABLE_FENTRY(0x6004),
CH_PCI_ID_TABLE_FENTRY(0x6005),
CH_PCI_ID_TABLE_FENTRY(0x6006),
CH_PCI_ID_TABLE_FENTRY(0x6007),
CH_PCI_ID_TABLE_FENTRY(0x6008),
CH_PCI_ID_TABLE_FENTRY(0x6009),
CH_PCI_ID_TABLE_FENTRY(0x600d),
CH_PCI_ID_TABLE_FENTRY(0x6010),
CH_PCI_ID_TABLE_FENTRY(0x6011),
CH_PCI_ID_TABLE_FENTRY(0x6014),
CH_PCI_ID_TABLE_FENTRY(0x6015),
CH_PCI_DEVICE_ID_TABLE_DEFINE_END;
#endif /* CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN */
#endif /* __T4_PCI_ID_TBL_H__ */

20580
contrib/ofed/libcxgb4/src/t4_regs.h
View File

File diff suppressed because it is too large Load Diff

6
contrib/ofed/libcxgb4/src/verbs.c
View File

@ -212,10 +212,10 @@ struct ibv_cq *c4iw_create_cq(struct ibv_context *context, int cqe,
if (chp->cq.ugts == MAP_FAILED)
goto err3;
if (dev_is_t5(chp->rhp))
chp->cq.ugts += 5;
else
if (dev_is_t4(chp->rhp))
chp->cq.ugts += 1;
else
chp->cq.ugts += 5;
chp->cq.sw_queue = calloc(chp->cq.size, sizeof *chp->cq.queue);
if (!chp->cq.sw_queue)
goto err4;