Merging of projects/armv6, part 5
- Driver for SMSC LAN95XX and LAN8710A ethernet controllers - Driver for LAN8710A PHY Submitted by: Ben Gray, Damjan Marion, Tim Kientzle
This commit is contained in:
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8bb9363760
commit
b011f8c450
@ -1612,6 +1612,7 @@ dev/mii/rgephy.c optional miibus | rgephy
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dev/mii/rlphy.c optional miibus | rlphy
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dev/mii/rlswitch.c optional rlswitch
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dev/mii/smcphy.c optional miibus | smcphy
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dev/mii/smscphy.c optional miibus | smscphy
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dev/mii/tdkphy.c optional miibus | tdkphy
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dev/mii/tlphy.c optional miibus | tlphy
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dev/mii/truephy.c optional miibus | truephy
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@ -2118,11 +2119,12 @@ dev/usb/net/if_ipheth.c optional ipheth
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dev/usb/net/if_kue.c optional kue
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dev/usb/net/if_mos.c optional mos
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dev/usb/net/if_rue.c optional rue
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dev/usb/net/if_smsc.c optional smsc
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dev/usb/net/if_udav.c optional udav
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dev/usb/net/if_usie.c optional usie
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dev/usb/net/ruephy.c optional rue
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dev/usb/net/usb_ethernet.c optional aue | axe | cdce | cue | kue | mos | \
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rue | udav
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rue | smsc | udav
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dev/usb/net/uhso.c optional uhso
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#
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# USB WLAN drivers
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@ -69,6 +69,7 @@ oui RDC 0x00d02d RDC Semiconductor
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oui REALTEK 0x00e04c RealTek Semicondctor
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oui SEEQ 0x00a07d Seeq Technology
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oui SIS 0x00e006 Silicon Integrated Systems
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oui SMC 0x00800f SMC
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oui TI 0x080028 Texas Instruments
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oui TSC 0x00c039 TDK Semiconductor
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oui VITESSE 0x0001c1 Vitesse Semiconductor
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@ -325,3 +326,6 @@ model xxVITESSE VSC8641 0x0003 Vitesse VSC8641 10/100/1000TX PHY
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/* XaQti Corp. PHYs */
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model xxXAQTI XMACII 0x0000 XaQti Corp. XMAC II gigabit interface
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/* SMC */
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model SMC LAN8710A 0x000F SMC LAN8710A 10/100 interface
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@ -26,7 +26,8 @@
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the internal PHY on the SMSC LAN91C111.
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* Driver for the SEEQ 80220 and 84220.
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* (Originally developed for the internal PHY on the SMSC LAN91C111.)
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*/
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#include <sys/param.h>
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237
sys/dev/mii/smscphy.c
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237
sys/dev/mii/smscphy.c
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@ -0,0 +1,237 @@
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/*-
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* Copyright (c) 2006 Benno Rice. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the SMSC LAN8710A
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include "miibus_if.h"
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static int smscphy_probe(device_t);
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static int smscphy_attach(device_t);
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static int smscphy_service(struct mii_softc *, struct mii_data *, int);
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static void smscphy_auto(struct mii_softc *, int);
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static void smscphy_status(struct mii_softc *);
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static device_method_t smscphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, smscphy_probe),
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DEVMETHOD(device_attach, smscphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static devclass_t smscphy_devclass;
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static driver_t smscphy_driver = {
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"smscphy",
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smscphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(smscphy, miibus, smscphy_driver, smscphy_devclass, 0, 0);
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static const struct mii_phydesc smscphys[] = {
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MII_PHY_DESC(SMC, LAN8710A),
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MII_PHY_END
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};
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static const struct mii_phy_funcs smscphy_funcs = {
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smscphy_service,
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smscphy_status,
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mii_phy_reset
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};
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static int
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smscphy_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, smscphys, BUS_PROBE_DEFAULT));
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}
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static int
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smscphy_attach(device_t dev)
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{
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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const struct mii_phy_funcs *mpf;
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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mpf = &smscphy_funcs;
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mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, mpf, 1);
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mii_phy_setmedia(sc);
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return (0);
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}
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static int
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smscphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife;
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int reg;
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ife = mii->mii_media.ifm_cur;
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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smscphy_auto(sc, ife->ifm_media);
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break;
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default:
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mii_phy_setmedia(sc);
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break;
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}
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break;
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case MII_TICK:
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0) {
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return (0);
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}
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
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break;
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}
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/* I have no idea why BMCR_ISO gets set. */
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reg = PHY_READ(sc, MII_BMCR);
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if (reg & BMCR_ISO) {
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PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
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}
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reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (reg & BMSR_LINK) {
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sc->mii_ticks = 0;
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break;
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}
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if (++sc->mii_ticks <= MII_ANEGTICKS) {
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break;
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}
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sc->mii_ticks = 0;
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PHY_RESET(sc);
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smscphy_auto(sc, ife->ifm_media);
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break;
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}
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/* Update the media status. */
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PHY_STATUS(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static void
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smscphy_auto(struct mii_softc *sc, int media)
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{
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uint16_t anar;
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anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
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if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
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anar |= ANAR_FC;
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PHY_WRITE(sc, MII_ANAR, anar);
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/* Apparently this helps. */
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anar = PHY_READ(sc, MII_ANAR);
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
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}
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static void
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smscphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii;
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uint32_t bmcr, bmsr, status;
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mii = sc->mii_pdata;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if ((bmsr & BMSR_LINK) != 0)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if ((bmcr & BMCR_ISO) != 0) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if ((bmcr & BMCR_LOOP) != 0)
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mii->mii_media_active |= IFM_LOOP;
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if ((bmcr & BMCR_AUTOEN) != 0) {
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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}
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status = PHY_READ(sc, 0x1F);
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if (status & 0x0008)
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mii->mii_media_active |= IFM_100_TX;
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else
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mii->mii_media_active |= IFM_10_T;
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if (status & 0x0010)
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mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
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else
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mii->mii_media_active |= IFM_HDX;
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}
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1756
sys/dev/usb/net/if_smsc.c
Normal file
1756
sys/dev/usb/net/if_smsc.c
Normal file
File diff suppressed because it is too large
Load Diff
277
sys/dev/usb/net/if_smscreg.h
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277
sys/dev/usb/net/if_smscreg.h
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@ -0,0 +1,277 @@
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/*-
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* Copyright (c) 2012
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* Ben Gray <bgray@freebsd.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_SMSCREG_H_
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#define _IF_SMSCREG_H_
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/*
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* Definitions for the SMSC LAN9514 and LAN9514 USB to ethernet controllers.
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*
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* This information was gleaned from the SMSC driver in the linux kernel, where
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* it is Copyrighted (C) 2007-2008 SMSC.
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*
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*/
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/**
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* TRANSMIT FRAMES
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* ---------------
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* Tx frames are prefixed with an 8-byte header which describes the frame
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*
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* 4 bytes 4 bytes variable
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* +------------+------------+--- . . . . . . . . . . . . ---+
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* | TX_CTRL_0 | TX_CTRL_1 | Ethernet frame data |
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* +------------+------------+--- . . . . . . . . . . . . ---+
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*
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* Where the headers have the following fields:
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*
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* TX_CTRL_0 <20:16> Data offset
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* TX_CTRL_0 <13> First segment of frame indicator
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* TX_CTRL_0 <12> Last segment of frame indicator
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* TX_CTRL_0 <10:0> Buffer size (?)
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*
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* TX_CTRL_1 <14> Perform H/W checksuming on IP packets
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* TX_CTRL_1 <13> Disable automatic ethernet CRC generation
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* TX_CTRL_1 <12> Disable padding (?)
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* TX_CTRL_1 <10:0> Packet byte length
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*
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*/
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#define SMSC_TX_CTRL_0_OFFSET(x) (((x) & 0x1FUL) << 16)
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#define SMSC_TX_CTRL_0_FIRST_SEG (0x1UL << 13)
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#define SMSC_TX_CTRL_0_LAST_SEG (0x1UL << 12)
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#define SMSC_TX_CTRL_0_BUF_SIZE(x) ((x) & 0x000007FFUL)
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#define SMSC_TX_CTRL_1_CSUM_ENABLE (0x1UL << 14)
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#define SMSC_TX_CTRL_1_CRC_DISABLE (0x1UL << 13)
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#define SMSC_TX_CTRL_1_PADDING_DISABLE (0x1UL << 12)
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#define SMSC_TX_CTRL_1_PKT_LENGTH(x) ((x) & 0x000007FFUL)
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/**
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* RECEIVE FRAMES
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* --------------
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* Rx frames are prefixed with an 4-byte status header which describes any
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* errors with the frame as well as things like the length
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*
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* 4 bytes variable
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* +------------+--- . . . . . . . . . . . . ---+
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* | RX_STAT | Ethernet frame data |
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* +------------+--- . . . . . . . . . . . . ---+
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*
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* Where the status header has the following fields:
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*
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* RX_STAT <30> Filter Fail
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* RX_STAT <29:16> Frame Length
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* RX_STAT <15> Error Summary
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* RX_STAT <13> Broadcast Frame
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* RX_STAT <12> Length Error
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* RX_STAT <11> Runt Frame
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* RX_STAT <10> Multicast Frame
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* RX_STAT <7> Frame too long
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* RX_STAT <6> Collision Seen
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* RX_STAT <5> Frame Type
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* RX_STAT <4> Receive Watchdog
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* RX_STAT <3> Mii Error
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* RX_STAT <2> Dribbling
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* RX_STAT <1> CRC Error
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*
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*/
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#define SMSC_RX_STAT_FILTER_FAIL (0x1UL << 30)
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#define SMSC_RX_STAT_FRM_LENGTH(x) (((x) >> 16) & 0x3FFFUL)
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#define SMSC_RX_STAT_ERROR (0x1UL << 15)
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#define SMSC_RX_STAT_BROADCAST (0x1UL << 13)
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#define SMSC_RX_STAT_LENGTH_ERROR (0x1UL << 12)
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#define SMSC_RX_STAT_RUNT (0x1UL << 11)
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#define SMSC_RX_STAT_MULTICAST (0x1UL << 10)
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#define SMSC_RX_STAT_FRM_TO_LONG (0x1UL << 7)
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#define SMSC_RX_STAT_COLLISION (0x1UL << 6)
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#define SMSC_RX_STAT_FRM_TYPE (0x1UL << 5)
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#define SMSC_RX_STAT_WATCHDOG (0x1UL << 4)
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#define SMSC_RX_STAT_MII_ERROR (0x1UL << 3)
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#define SMSC_RX_STAT_DRIBBLING (0x1UL << 2)
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#define SMSC_RX_STAT_CRC_ERROR (0x1UL << 1)
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/**
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* REGISTERS
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*
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*/
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#define SMSC_ID_REV 0x000
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#define SMSC_INTR_STATUS 0x008
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#define SMSC_RX_CFG 0x00C
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#define SMSC_TX_CFG 0x010
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#define SMSC_HW_CFG 0x014
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#define SMSC_PM_CTRL 0x020
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#define SMSC_LED_GPIO_CFG 0x024
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#define SMSC_GPIO_CFG 0x028
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#define SMSC_AFC_CFG 0x02C
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#define SMSC_EEPROM_CMD 0x030
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#define SMSC_EEPROM_DATA 0x034
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#define SMSC_BURST_CAP 0x038
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#define SMSC_GPIO_WAKE 0x064
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#define SMSC_INTR_CFG 0x068
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#define SMSC_BULK_IN_DLY 0x06C
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#define SMSC_MAC_CSR 0x100
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#define SMSC_MAC_ADDRH 0x104
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#define SMSC_MAC_ADDRL 0x108
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#define SMSC_HASHH 0x10C
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#define SMSC_HASHL 0x110
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#define SMSC_MII_ADDR 0x114
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||||
#define SMSC_MII_DATA 0x118
|
||||
#define SMSC_FLOW 0x11C
|
||||
#define SMSC_VLAN1 0x120
|
||||
#define SMSC_VLAN2 0x124
|
||||
#define SMSC_WUFF 0x128
|
||||
#define SMSC_WUCSR 0x12C
|
||||
#define SMSC_COE_CTRL 0x130
|
||||
|
||||
/* ID / Revision register */
|
||||
#define SMSC_ID_REV_CHIP_ID_MASK 0xFFFF0000UL
|
||||
#define SMSC_ID_REV_CHIP_REV_MASK 0x0000FFFFUL
|
||||
|
||||
#define SMSC_RX_FIFO_FLUSH (0x1UL << 0)
|
||||
|
||||
#define SMSC_TX_CFG_ON (0x1UL << 2)
|
||||
#define SMSC_TX_CFG_STOP (0x1UL << 1)
|
||||
#define SMSC_TX_CFG_FIFO_FLUSH (0x1UL << 0)
|
||||
|
||||
#define SMSC_HW_CFG_BIR (0x1UL << 12)
|
||||
#define SMSC_HW_CFG_LEDB (0x1UL << 11)
|
||||
#define SMSC_HW_CFG_RXDOFF (0x3UL << 9) /* RX pkt alignment */
|
||||
#define SMSC_HW_CFG_DRP (0x1UL << 6)
|
||||
#define SMSC_HW_CFG_MEF (0x1UL << 5)
|
||||
#define SMSC_HW_CFG_LRST (0x1UL << 3) /* Lite reset */
|
||||
#define SMSC_HW_CFG_PSEL (0x1UL << 2)
|
||||
#define SMSC_HW_CFG_BCE (0x1UL << 1)
|
||||
#define SMSC_HW_CFG_SRST (0x1UL << 0)
|
||||
|
||||
#define SMSC_PM_CTRL_PHY_RST (0x1UL << 4) /* PHY reset */
|
||||
|
||||
#define SMSC_LED_GPIO_CFG_SPD_LED (0x1UL << 24)
|
||||
#define SMSC_LED_GPIO_CFG_LNK_LED (0x1UL << 20)
|
||||
#define SMSC_LED_GPIO_CFG_FDX_LED (0x1UL << 16)
|
||||
|
||||
/* Hi watermark = 15.5Kb (~10 mtu pkts) */
|
||||
/* low watermark = 3k (~2 mtu pkts) */
|
||||
/* backpressure duration = ~ 350us */
|
||||
/* Apply FC on any frame. */
|
||||
#define AFC_CFG_DEFAULT (0x00F830A1)
|
||||
|
||||
#define SMSC_EEPROM_CMD_BUSY (0x1UL << 31)
|
||||
#define SMSC_EEPROM_CMD_MASK (0x7UL << 28)
|
||||
#define SMSC_EEPROM_CMD_READ (0x0UL << 28)
|
||||
#define SMSC_EEPROM_CMD_WRITE (0x3UL << 28)
|
||||
#define SMSC_EEPROM_CMD_ERASE (0x5UL << 28)
|
||||
#define SMSC_EEPROM_CMD_RELOAD (0x7UL << 28)
|
||||
#define SMSC_EEPROM_CMD_TIMEOUT (0x1UL << 10)
|
||||
#define SMSC_EEPROM_CMD_ADDR_MASK 0x000001FFUL
|
||||
|
||||
/* MAC Control and Status Register */
|
||||
#define SMSC_MAC_CSR_RCVOWN (0x1UL << 23) /* Half duplex */
|
||||
#define SMSC_MAC_CSR_LOOPBK (0x1UL << 21) /* Loopback */
|
||||
#define SMSC_MAC_CSR_FDPX (0x1UL << 20) /* Full duplex */
|
||||
#define SMSC_MAC_CSR_MCPAS (0x1UL << 19) /* Multicast mode */
|
||||
#define SMSC_MAC_CSR_PRMS (0x1UL << 18) /* Promiscuous mode */
|
||||
#define SMSC_MAC_CSR_INVFILT (0x1UL << 17) /* Inverse filtering */
|
||||
#define SMSC_MAC_CSR_PASSBAD (0x1UL << 16) /* Pass on bad frames */
|
||||
#define SMSC_MAC_CSR_HPFILT (0x1UL << 13) /* Hash filtering */
|
||||
#define SMSC_MAC_CSR_BCAST (0x1UL << 11) /* Broadcast */
|
||||
#define SMSC_MAC_CSR_TXEN (0x1UL << 3) /* TX enable */
|
||||
#define SMSC_MAC_CSR_RXEN (0x1UL << 2) /* RX enable */
|
||||
|
||||
/* Interrupt control register */
|
||||
#define SMSC_INTR_NTEP (0x1UL << 31)
|
||||
#define SMSC_INTR_MACRTO (0x1UL << 19)
|
||||
#define SMSC_INTR_TX_STOP (0x1UL << 17)
|
||||
#define SMSC_INTR_RX_STOP (0x1UL << 16)
|
||||
#define SMSC_INTR_PHY_INT (0x1UL << 15)
|
||||
#define SMSC_INTR_TXE (0x1UL << 14)
|
||||
#define SMSC_INTR_TDFU (0x1UL << 13)
|
||||
#define SMSC_INTR_TDFO (0x1UL << 12)
|
||||
#define SMSC_INTR_RXDF (0x1UL << 11)
|
||||
#define SMSC_INTR_GPIOS 0x000007FFUL
|
||||
|
||||
/* Phy MII interface register */
|
||||
#define SMSC_MII_WRITE (0x1UL << 1)
|
||||
#define SMSC_MII_READ (0x0UL << 1)
|
||||
#define SMSC_MII_BUSY (0x1UL << 0)
|
||||
|
||||
/* H/W checksum register */
|
||||
#define SMSC_COE_CTRL_TX_EN (0x1UL << 16) /* Tx H/W csum enable */
|
||||
#define SMSC_COE_CTRL_RX_MODE (0x1UL << 1)
|
||||
#define SMSC_COE_CTRL_RX_EN (0x1UL << 0) /* Rx H/W csum enable */
|
||||
|
||||
/* Registers on the phy, accessed via MII/MDIO */
|
||||
#define SMSC_PHY_INTR_STAT (29)
|
||||
#define SMSC_PHY_INTR_MASK (30)
|
||||
|
||||
#define SMSC_PHY_INTR_ENERGY_ON (0x1U << 7)
|
||||
#define SMSC_PHY_INTR_ANEG_COMP (0x1U << 6)
|
||||
#define SMSC_PHY_INTR_REMOTE_FAULT (0x1U << 5)
|
||||
#define SMSC_PHY_INTR_LINK_DOWN (0x1U << 4)
|
||||
|
||||
/* USB Vendor Requests */
|
||||
#define SMSC_UR_WRITE_REG 0xA0
|
||||
#define SMSC_UR_READ_REG 0xA1
|
||||
#define SMSC_UR_GET_STATS 0xA2
|
||||
|
||||
#define SMSC_CONFIG_INDEX 0 /* config number 1 */
|
||||
#define SMSC_IFACE_IDX 0
|
||||
|
||||
/*
|
||||
* USB endpoints.
|
||||
*/
|
||||
enum {
|
||||
SMSC_BULK_DT_RD,
|
||||
SMSC_BULK_DT_WR,
|
||||
/* the LAN9514 device does support interrupt endpoints, however I couldn't
|
||||
* get then to work reliably and since they are unneeded (poll the mii
|
||||
* status) they are unused.
|
||||
* SMSC_INTR_DT_WR,
|
||||
* SMSC_INTR_DT_RD,
|
||||
*/
|
||||
SMSC_N_TRANSFER,
|
||||
};
|
||||
|
||||
struct smsc_softc {
|
||||
struct usb_ether sc_ue;
|
||||
struct mtx sc_mtx;
|
||||
struct usb_xfer *sc_xfer[SMSC_N_TRANSFER];
|
||||
int sc_phyno;
|
||||
|
||||
/* The following stores the settings in the mac control (MAC_CSR) register */
|
||||
uint32_t sc_mac_csr;
|
||||
uint32_t sc_rev_id;
|
||||
|
||||
uint32_t sc_flags;
|
||||
#define SMSC_FLAG_LINK 0x0001
|
||||
#define SMSC_FLAG_LAN9514 0x1000 /* LAN9514 */
|
||||
};
|
||||
|
||||
#define SMSC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
|
||||
#define SMSC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
|
||||
#define SMSC_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t)
|
||||
|
||||
#endif /* _IF_SMSCREG_H_ */
|
@ -3855,6 +3855,7 @@ product SMC 2862WG 0xee13 EZ Connect Wireless Adapter
|
||||
product SMC2 2020HUB 0x2020 USB Hub
|
||||
product SMC2 2514HUB 0x2514 USB Hub
|
||||
product SMC3 2662WUSB 0xa002 2662W-AR Wireless
|
||||
product SMC2 LAN9514_ETH 0xec00 USB/Ethernet
|
||||
|
||||
/* SOHOware products */
|
||||
product SOHOWARE NUB100 0x9100 10/100 USB Ethernet
|
||||
|
@ -8,7 +8,8 @@ SRCS+= ciphy.c device_if.h
|
||||
SRCS+= e1000phy.c gentbi.c icsphy.c ip1000phy.c jmphy.c lxtphy.c
|
||||
SRCS+= miibus_if.c miibus_if.h mii.c miidevs.h mii_bitbang.c mii_physubr.c
|
||||
SRCS+= mlphy.c nsgphy.c nsphy.c nsphyter.c pci_if.h pnaphy.c qsphy.c
|
||||
SRCS+= rdcphy.c rgephy.c rlphy.c smcphy.c tdkphy.c tlphy.c truephy.c
|
||||
SRCS+= rdcphy.c rgephy.c rlphy.c smcphy.c
|
||||
SRCS+= smscphy.c tdkphy.c tlphy.c truephy.c
|
||||
SRCS+= ukphy.c ukphy_subr.c
|
||||
SRCS+= xmphy.c
|
||||
|
||||
|
37
sys/modules/usb/smsc/Makefile
Normal file
37
sys/modules/usb/smsc/Makefile
Normal file
@ -0,0 +1,37 @@
|
||||
#
|
||||
# $FreeBSD$
|
||||
#
|
||||
# Copyright (c) 2011 Ben Gray. All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
# SUCH DAMAGE.
|
||||
#
|
||||
|
||||
S= ${.CURDIR}/../../..
|
||||
|
||||
.PATH: $S/dev/usb/net
|
||||
|
||||
KMOD= if_smsc
|
||||
SRCS= opt_bus.h opt_usb.h device_if.h bus_if.h usb_if.h usbdevs.h \
|
||||
miibus_if.h opt_inet.h \
|
||||
if_smsc.c
|
||||
|
||||
.include <bsd.kmod.mk>
|
Loading…
Reference in New Issue
Block a user