Merge ^/head r356920 through r356930.
This commit is contained in:
commit
b14637d118
@ -157,6 +157,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("_ARCH_A2Q");
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Builder.defineMacro("_ARCH_QP");
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}
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if (ArchDefs & ArchDefineE500)
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Builder.defineMacro("__NO_LWSYNC__");
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if (getTriple().getVendor() == llvm::Triple::BGQ) {
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Builder.defineMacro("__bg__");
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@ -312,6 +314,11 @@ bool PPCTargetInfo::initFeatureMap(
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.Case("pwr8", true)
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.Default(false);
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Features["spe"] = llvm::StringSwitch<bool>(CPU)
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.Case("8548", true)
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.Case("e500", true)
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.Default(false);
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if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
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return false;
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@ -449,16 +456,16 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
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}
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static constexpr llvm::StringLiteral ValidCPUNames[] = {
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{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
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{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
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{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
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{"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"},
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{"a2"}, {"a2q"}, {"e500mc"}, {"e5500"}, {"power3"},
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{"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"pwr5"},
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{"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"power6x"},
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{"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"pwr8"},
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{"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, {"powerpc64"},
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{"ppc64"}, {"powerpc64le"}, {"ppc64le"},
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{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
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{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
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{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
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{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
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{"g5"}, {"a2"}, {"a2q"}, {"e500"}, {"e500mc"},
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{"e5500"}, {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"},
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{"power5"}, {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"},
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{"pwr6"}, {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"},
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{"power8"}, {"pwr8"}, {"power9"}, {"pwr9"}, {"powerpc"},
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{"ppc"}, {"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"ppc64le"},
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};
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bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
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@ -44,7 +44,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
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ArchDefinePwr8 = 1 << 12,
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ArchDefinePwr9 = 1 << 13,
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ArchDefineA2 = 1 << 14,
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ArchDefineA2q = 1 << 15
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ArchDefineA2q = 1 << 15,
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ArchDefineE500 = 1 << 16
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} ArchDefineTypes;
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@ -85,8 +86,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
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// Note: GCC recognizes the following additional cpus:
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// 401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
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// 821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
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// titan, rs64.
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// 821, 823, 8540, e300c2, e300c3, e500mc64, e6500, 860, cell, titan, rs64.
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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@ -145,6 +145,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
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ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
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ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
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ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
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.Cases("8548", "e500", ArchDefineE500)
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.Default(ArchDefineNone);
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}
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return CPUKnown;
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@ -52,10 +52,12 @@ std::string ppc::getPPCTargetCPU(const ArgList &Args) {
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.Case("7450", "7450")
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.Case("G4+", "g4+")
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.Case("750", "750")
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.Case("8548", "e500")
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.Case("970", "970")
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.Case("G5", "g5")
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.Case("a2", "a2")
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.Case("a2q", "a2q")
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.Case("e500", "e500")
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.Case("e500mc", "e500mc")
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.Case("e5500", "e5500")
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.Case("power3", "pwr3")
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@ -100,6 +102,9 @@ const char *ppc::getPPCAsmModeForCPU(StringRef Name) {
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void ppc::getPPCTargetFeatures(const Driver &D, const llvm::Triple &Triple,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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if (Triple.getSubArch() == llvm::Triple::PPCSubArch_spe)
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Features.push_back("+spe");
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handleTargetFeaturesGroup(Args, Features, options::OPT_m_ppc_Features_Group);
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ppc::FloatABI FloatABI = ppc::getPPCFloatABI(D, Args);
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@ -128,7 +128,9 @@ class Triple {
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KalimbaSubArch_v4,
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KalimbaSubArch_v5,
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MipsSubArch_r6
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MipsSubArch_r6,
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PPCSubArch_spe
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};
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enum VendorType {
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UnknownVendor,
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@ -389,7 +389,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
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// FIXME: Do we need to support these?
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.Cases("i786", "i886", "i986", Triple::x86)
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.Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
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.Cases("powerpc", "ppc", "ppc32", Triple::ppc)
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.Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
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.Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
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.Cases("powerpc64le", "ppc64le", Triple::ppc64le)
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.Case("xscale", Triple::arm)
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@ -563,6 +563,9 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
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(SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
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return Triple::MipsSubArch_r6;
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if (SubArchName == "powerpcspe")
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return Triple::PPCSubArch_spe;
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StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
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// For now, this is the small part. Early return.
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@ -378,7 +378,7 @@ def : ProcessorModel<"g5", G5Model,
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def : ProcessorModel<"e500", PPCE500Model,
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[DirectiveE500,
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FeatureICBT, FeatureBookE,
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FeatureISEL, FeatureMFTB]>;
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FeatureISEL, FeatureMFTB, FeatureSPE]>;
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def : ProcessorModel<"e500mc", PPCE500mcModel,
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[DirectiveE500mc,
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FeatureSTFIWX, FeatureICBT, FeatureBookE,
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@ -126,6 +126,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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// If cross-compiling with -march=ppc64le without -mcpu
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if (TargetTriple.getArch() == Triple::ppc64le)
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CPUName = "ppc64le";
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else if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
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CPUName = "e500";
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else
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CPUName = "generic";
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}
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@ -32,7 +32,7 @@
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.\" @(#)qsort.3 8.1 (Berkeley) 6/4/93
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.\" $FreeBSD$
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.\"
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.Dd January 14, 2020
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.Dd January 20, 2020
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.Dt QSORT 3
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.Os
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.Sh NAME
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@ -343,6 +343,13 @@ with
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.Fn qsort_s
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to work around this problem.
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.Pp
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.Fn qsort_s
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is part of the
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.Em optional
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Annex K portion of
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.St -isoC-2011
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and may not be portable to other standards-conforming platforms.
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.Pp
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Previous versions of
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.Fn qsort
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did not permit the comparison routine itself to call
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@ -193,6 +193,7 @@ meta [label="Koichiro Iwao\nmeta@FreeBSD.org\n2018/03/19"]
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mezz [label="Jeremy Messenger\nmezz@FreeBSD.org\n2004/04/30"]
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mfechner [label="Matthias Fechner\nmfechner@FreeBSD.org\n2018/03/01"]
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mharo [label="Michael Haro\nmharo@FreeBSD.org\n1999/04/13"]
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mikael [label="Mikael Urankar\nmikael@FreeBSD.org\n2020/01/16"]
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milki [label="Jonathan Chu\nmilki@FreeBSD.org\n2013/12/15"]
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misha [label="Mikhail Pchelin\nmisha@FreeBSD.org\n2016/11/15"]
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miwi [label="Martin Wilke\nmiwi@FreeBSD.org\n2006/06/04"]
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@ -540,6 +541,8 @@ lwhsu -> yzlin
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maho -> stephen
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maho -> tota
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manu -> mikael
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marcus -> ahze
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marcus -> bland
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marcus -> eik
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@ -1701,7 +1701,6 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, struct componentname *cnp,
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uint32_t hash;
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int flag;
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int len;
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bool held_dvp;
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u_long lnumcache;
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CTR3(KTR_VFS, "cache_enter(%p, %p, %s)", dvp, vp, cnp->cn_nameptr);
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@ -1738,13 +1737,6 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, struct componentname *cnp,
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ndd = NULL;
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ncp_ts = NULL;
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held_dvp = false;
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if (LIST_EMPTY(&dvp->v_cache_src) && flag != NCF_ISDOTDOT) {
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vhold(dvp);
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counter_u64_add(numcachehv, 1);
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held_dvp = true;
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}
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/*
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* Calculate the hash key and setup as much of the new
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* namecache entry as possible before acquiring the lock.
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@ -1834,21 +1826,8 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, struct componentname *cnp,
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if (flag != NCF_ISDOTDOT) {
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if (LIST_EMPTY(&dvp->v_cache_src)) {
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if (!held_dvp) {
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vhold(dvp);
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counter_u64_add(numcachehv, 1);
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}
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} else {
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if (held_dvp) {
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/*
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* This will not take the interlock as someone
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* else already holds the vnode on account of
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* the namecache and we hold locks preventing
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* this from changing.
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*/
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vdrop(dvp);
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counter_u64_add(numcachehv, -1);
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}
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vhold(dvp);
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counter_u64_add(numcachehv, 1);
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}
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LIST_INSERT_HEAD(&dvp->v_cache_src, ncp, nc_src);
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}
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@ -1883,10 +1862,6 @@ cache_enter_time(struct vnode *dvp, struct vnode *vp, struct componentname *cnp,
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out_unlock_free:
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cache_enter_unlock(&cel);
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cache_free(ncp);
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if (held_dvp) {
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vdrop(dvp);
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counter_u64_add(numcachehv, -1);
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}
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return;
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}
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@ -1141,58 +1141,15 @@ OLD_DIRS+=usr/tests/usr.bin/calendar
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.endif
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.if ${MK_CASPER} == no
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OLD_FILES+=etc/casper/system.dns
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OLD_FILES+=etc/casper/system.grp
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OLD_FILES+=etc/casper/system.pwd
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OLD_FILES+=etc/casper/system.random
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OLD_FILES+=etc/casper/system.sysctl
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OLD_DIRS+=etc/casper
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OLD_FILES+=etc/rc.d/casperd
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OLD_LIBS+=lib/libcapsicum.so.0
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OLD_LIBS+=lib/libcasper.so.0
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OLD_FILES+=libexec/casper/dns
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OLD_FILES+=libexec/casper/grp
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OLD_FILES+=libexec/casper/pwd
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OLD_FILES+=libexec/casper/random
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OLD_FILES+=libexec/casper/sysctl
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OLD_FILES+=sbin/casper
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OLD_FILES+=sbin/casperd
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OLD_FILES+=usr/include/libcapsicum.h
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OLD_FILES+=usr/include/libcapsicum_dns.h
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OLD_FILES+=usr/include/libcapsicum_grp.h
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OLD_FILES+=usr/include/libcapsicum_pwd.h
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OLD_FILES+=usr/include/libcapsicum_random.h
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OLD_FILES+=usr/include/libcapsicum_service.h
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OLD_FILES+=usr/include/libcapsicum_sysctl.h
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OLD_FILES+=usr/include/libcasper.h
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OLD_FILES+=usr/lib/libcapsicum.a
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OLD_FILES+=usr/lib/libcapsicum.so
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OLD_FILES+=usr/lib/libcapsicum_p.a
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OLD_FILES+=usr/lib/libcasper.a
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OLD_FILES+=usr/lib/libcasper.so
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OLD_FILES+=usr/lib/libcasper_p.a
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OLD_FILES+=usr/lib32/libcapsicum.a
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OLD_FILES+=usr/lib32/libcapsicum.so
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OLD_LIBS+=usr/lib32/libcapsicum.so.0
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OLD_FILES+=usr/lib32/libcapsicum_p.a
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OLD_FILES+=usr/lib32/libcasper.a
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OLD_FILES+=usr/lib32/libcasper.so
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OLD_LIBS+=usr/lib32/libcasper.so.0
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OLD_FILES+=usr/lib32/libcasper_p.a
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OLD_FILES+=usr/share/man/man3/cap_clone.3.gz
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OLD_FILES+=usr/share/man/man3/cap_close.3.gz
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OLD_FILES+=usr/share/man/man3/cap_init.3.gz
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OLD_FILES+=usr/share/man/man3/cap_limit_get.3.gz
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OLD_FILES+=usr/share/man/man3/cap_limit_set.3.gz
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OLD_FILES+=usr/share/man/man3/cap_recv_nvlist.3.gz
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OLD_FILES+=usr/share/man/man3/cap_send_nvlist.3.gz
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OLD_FILES+=usr/share/man/man3/cap_service_open.3.gz
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OLD_FILES+=usr/share/man/man3/cap_sock.3.gz
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OLD_FILES+=usr/share/man/man3/cap_unwrap.3.gz
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OLD_FILES+=usr/share/man/man3/cap_wrap.3.gz
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OLD_FILES+=usr/share/man/man3/cap_xfer_nvlist.3.gz
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OLD_FILES+=usr/share/man/man3/libcapsicum.3.gz
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OLD_FILES+=usr/share/man/man8/casperd.8.gz
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OLD_LIBS+=lib/libcasper.so.1
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OLD_LIBS+=lib/casper/libcap_dns.so.2
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OLD_LIBS+=lib/casper/libcap_fileargs.so.1
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OLD_LIBS+=lib/casper/libcap_grp.so.1
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OLD_LIBS+=lib/casper/libcap_net.so.1
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OLD_LIBS+=lib/casper/libcap_pwd.so.1
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OLD_LIBS+=lib/casper/libcap_sysctl.so.1
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OLD_LIBS+=lib/casper/libcap_sysctl.so.2
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OLD_LIBS+=lib/casper/libcap_syslog.so.1
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.endif
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.if ${MK_CCD} == no
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