Move out the files from src/sys/isa/ic/ to src/sys/dev/ic/, so they
can be made userland-visible as <dev/ic/...>. Also, those files are not supposed to contain any bus-specific details at all, so placing them under .../isa/ has been a misnomer from the beginning. The files in src/sys/dev/ic/ have been repo-copied from their old location (this commit is a forced null commit there to record this message).
This commit is contained in:
parent
341762c6f1
commit
b794010414
@ -39,7 +39,7 @@
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*/
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/* uses NEC765 controller */
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#include <isa/ic/nec765.h>
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#include <dev/ic/nec765.h>
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/* registers */
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#define FDOUT 2 /* Digital Output Register (W) */
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@ -88,9 +88,9 @@
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#include <isa/sioreg.h>
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#ifdef COM_ESP
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#include <isa/ic/esp.h>
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#include <dev/ic/esp.h>
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#endif
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#include <isa/ic/ns16550.h>
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#include <dev/ic/ns16550.h>
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#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
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@ -43,7 +43,7 @@
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#include <isa/isavar.h>
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#include <isa/sioreg.h>
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#include <isa/ic/ns16550.h>
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#include <dev/ic/ns16550.h>
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static devclass_t midi_devclass;
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@ -47,7 +47,7 @@
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*/
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#include <isa/sioreg.h>
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#include <isa/ic/ns16550.h>
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#include <dev/ic/ns16550.h>
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#include <dev/sound/midi/midi.h>
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/* XXX What about a PCI uart? */
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@ -39,7 +39,7 @@
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*/
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/* uses NEC765 controller */
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#include <isa/ic/nec765.h>
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#include <dev/ic/nec765.h>
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/* registers */
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#define FDOUT 2 /* Digital Output Register (W) */
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@ -1,76 +0,0 @@
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/*-
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* Copyright (c) 1995 Sean Eric Fagan.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IC_ESP_H_
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#define _IC_ESP_H_
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/*
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* Definitions for Hayes ESP serial cards.
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*/
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/*
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* CMD1 and CMD2 are the command ports, offsets from <esp_iobase>.
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*/
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#define ESP_CMD1 4
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#define ESP_CMD2 5
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/*
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* STAT1 and STAT2 are to get return values and status bytes;
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* they overload CMD1 and CMD2.
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*/
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#define ESP_STATUS1 ESP_CMD1
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#define ESP_STATUS2 ESP_CMD2
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/*
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* Commands. Commands are given by writing the command value to
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* ESP_CMD1 and then writing or reading some number of bytes from
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* ESP_CMD2 or ESP_STATUS2.
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*/
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#define ESP_GETTEST 0x01 /* self-test command (1 byte + extras) */
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#define ESP_GETDIPS 0x02 /* get on-board DIP switches (1 byte) */
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#define ESP_SETFLOWTYPE 0x08 /* set type of flow-control (2 bytes) */
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#define ESP_SETRXFLOW 0x0a /* set Rx FIFO flow control levels (4 bytes) */
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#define ESP_SETMODE 0x10 /* set board mode (1 byte) */
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/* Mode bits (ESP_SETMODE). */
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#define ESP_MODE_FIFO 0x02 /* act like a 16550 (compatibility mode) */
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#define ESP_MODE_RTS 0x04 /* use RTS hardware flow control */
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#define ESP_MODE_SCALE 0x80 /* scale FIFO trigger levels */
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/* Flow control type bits (ESP_SETFLOWTYPE). */
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#define ESP_FLOW_RTS 0x04 /* cmd1: local Rx sends RTS flow control */
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#define ESP_FLOW_CTS 0x10 /* cmd2: local transmitter responds to CTS */
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/* Used by ESP_SETRXFLOW. */
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#define HIBYTE(w) (((w) >> 8) & 0xff)
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#define LOBYTE(w) ((w) & 0xff)
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#endif /* !_IC_ESP_H_ */
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@ -1,142 +0,0 @@
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)nec765.h 7.1 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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/*
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* Nec 765 floppy disc controller definitions
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*/
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/* Main status register */
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#define NE7_DAB 0x01 /* Diskette drive A is seeking, thus busy */
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#define NE7_DBB 0x02 /* Diskette drive B is seeking, thus busy */
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#define NE7_CB 0x10 /* Diskette Controller Busy */
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#define NE7_NDM 0x20 /* Diskette Controller in Non Dma Mode */
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#define NE7_DIO 0x40 /* Diskette Controller Data register I/O */
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#define NE7_RQM 0x80 /* Diskette Controller ReQuest for Master */
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/* Status register ST0 */
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#define NE7_ST0BITS "\020\010invld\007abnrml\006seek_cmplt\005equ_chck\004drive_notrdy\003top_head"
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#define NE7_ST0_IC 0xc0 /* interrupt completion code */
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#define NE7_ST0_IC_RC 0xc0 /* terminated due to ready changed, n/a */
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#define NE7_ST0_IC_IV 0x80 /* invalid command; must reset FDC */
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#define NE7_ST0_IC_AT 0x40 /* abnormal termination, check error stat */
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#define NE7_ST0_IC_NT 0x00 /* normal termination */
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#define NE7_ST0_SE 0x20 /* seek end */
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#define NE7_ST0_EC 0x10 /* equipment check, recalibrated but no trk0 */
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#define NE7_ST0_NR 0x08 /* not ready (n/a) */
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#define NE7_ST0_HD 0x04 /* upper head selected */
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#define NE7_ST0_DR 0x03 /* drive code */
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/* Status register ST1 */
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#define NE7_ST1BITS "\020\010end_of_cyl\006bad_crc\005data_overrun\003sec_not_fnd\002write_protect\001no_am"
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#define NE7_ST1_EN 0x80 /* end of cylinder, access past last record */
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#define NE7_ST1_DE 0x20 /* data error, CRC fail in ID or data */
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#define NE7_ST1_OR 0x10 /* DMA overrun, DMA failed to do i/o quickly */
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#define NE7_ST1_ND 0x04 /* no data, sector not found or CRC in ID f. */
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#define NE7_ST1_NW 0x02 /* not writeable, attempt to violate WP */
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#define NE7_ST1_MA 0x01 /* missing address mark (in ID or data field)*/
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/* Status register ST2 */
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#define NE7_ST2BITS "\020\007ctrl_mrk\006bad_crc\005wrong_cyl\004scn_eq\003scn_not_fnd\002bad_cyl\001no_dam"
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#define NE7_ST2_CM 0x40 /* control mark; found deleted data */
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#define NE7_ST2_DD 0x20 /* data error in data field, CRC fail */
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#define NE7_ST2_WC 0x10 /* wrong cylinder, ID field mismatches cmd */
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#define NE7_ST2_SH 0x08 /* scan equal hit */
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#define NE7_ST2_SN 0x04 /* scan not satisfied */
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#define NE7_ST2_BC 0x02 /* bad cylinder, cylinder marked 0xff */
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#define NE7_ST2_MD 0x01 /* missing address mark in data field */
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/* Status register ST3 */
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#define NE7_ST3BITS "\020\010fault\007write_protect\006drdy\005tk0\004two_side\003side_sel\002"
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#define NE7_ST3_FT 0x80 /* fault; PC: n/a */
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#define NE7_ST3_WP 0x40 /* write protected */
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#define NE7_ST3_RD 0x20 /* ready; PC: always true */
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#define NE7_ST3_T0 0x10 /* track 0 */
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#define NE7_ST3_TS 0x08 /* two-sided; PC: n/a */
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#define NE7_ST3_HD 0x04 /* upper head select */
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#define NE7_ST3_US 0x03 /* unit select */
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/* Commands */
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/*
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* the top three bits -- where appropriate -- are set as follows:
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*
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* 0x80 - MT multi-track; allow both sides to be handled in single cmd
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* 0x40 - MFM modified frequency modulation; use MFM encoding
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* 0x20 - SK skip; skip sectors marked as "deleted"
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*/
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#define NE7CMD_READTRK 0x42 /* read whole track */
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#define NE7CMD_SPECIFY 3 /* specify drive parameters - requires unit
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parameters byte */
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#define NE7CMD_SENSED 4 /* sense drive - requires unit select byte */
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#define NE7CMD_WRITE 0xc5 /* write - requires eight additional bytes */
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#define NE7CMD_READ 0xe6 /* read - requires eight additional bytes */
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#define NE7CMD_RECAL 7 /* recalibrate drive - requires
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unit select byte */
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#define NE7CMD_SENSEI 8 /* sense controller interrupt status */
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#define NE7CMD_WRITEDEL 0xc9 /* write deleted data */
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#define NE7CMD_READID 0x4a /* read ID field */
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#define NE7CMD_READDEL 0xec /* read deleted data */
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#define NE7CMD_FORMAT 0x4d /* format - requires five additional bytes */
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#define NE7CMD_SEEK 0x0f /* seek drive - requires unit select byte
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and new cyl byte */
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#define NE7CMD_SCNEQU 0xf1 /* scan equal */
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#define NE7CMD_SCNLE 0xf9 /* scan less or equal */
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#define NE7CMD_SCNGE 0xfd /* scan greater or equal */
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/*
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* Enhanced controller commands:
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*/
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#define NE7CMD_VERSION 0x10 /* version (ok for all controllers) */
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#define I8207X_CONFIGURE 0x13 /* configure enhanced features */
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/*
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* "specify" definitions
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*
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* acronyms (times are relative to a FDC clock of 8 MHz):
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* srt - step rate; PC usually 3 ms
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* hut - head unload time; PC usually maximum of 240 ms
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* hlt - head load time; PC usually minimum of 2 ms
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* nd - no DMA flag; PC usually not set (0)
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*/
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#define NE7_SPEC_1(srt, hut) (((16 - (srt)) << 4) | (((hut) / 16)))
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#define NE7_SPEC_2(hlt, nd) (((hlt) & 0xFE) | ((nd) & 1))
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@ -1,64 +0,0 @@
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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||||
* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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/*
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* NS16550 UART registers
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*/
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#ifdef PC98
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#define com_data 0x000 /* data register (R/W) */
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#define com_dlbl 0x000 /* divisor latch low (W) */
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#define com_dlbh 0x100 /* divisor latch high (W) */
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#define com_ier 0x100 /* interrupt enable (W) */
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#define com_iir 0x200 /* interrupt identification (R) */
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#define com_fifo 0x200 /* FIFO control (W) */
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#define com_lctl 0x300 /* line control register (R/W) */
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#define com_cfcr 0x300 /* line control register (R/W) */
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#define com_mcr 0x400 /* modem control register (R/W) */
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#define com_lsr 0x500 /* line status register (R/W) */
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#define com_msr 0x600 /* modem status register (R/W) */
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#else /* IBM-PC */
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#define com_data 0 /* data register (R/W) */
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#define com_dlbl 0 /* divisor latch low (W) */
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#define com_dlbh 1 /* divisor latch high (W) */
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#define com_ier 1 /* interrupt enable (W) */
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#define com_iir 2 /* interrupt identification (R) */
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#define com_fifo 2 /* FIFO control (W) */
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#define com_lctl 3 /* line control register (R/W) */
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#define com_cfcr 3 /* line control register (R/W) */
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#define com_mcr 4 /* modem control register (R/W) */
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#define com_lsr 5 /* line status register (R/W) */
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#define com_msr 6 /* modem status register (R/W) */
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#endif /* PC98 */
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@ -88,9 +88,9 @@
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#include <isa/sioreg.h>
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#ifdef COM_ESP
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#include <isa/ic/esp.h>
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#include <dev/ic/esp.h>
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#endif
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#include <isa/ic/ns16550.h>
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#include <dev/ic/ns16550.h>
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#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
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@ -39,7 +39,7 @@
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*/
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/* uses NEC765 controller */
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#include <isa/ic/nec765.h>
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#include <dev/ic/nec765.h>
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#ifdef PC98
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/* registers */
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@ -39,7 +39,7 @@
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*/
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/* uses NEC765 controller */
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#include <isa/ic/nec765.h>
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#include <dev/ic/nec765.h>
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#ifdef PC98
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/* registers */
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|
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