Move out the files from src/sys/isa/ic/ to src/sys/dev/ic/, so they

can be made userland-visible as <dev/ic/...>.  Also, those files are
not supposed to contain any bus-specific details at all, so placing
them under .../isa/ has been a misnomer from the beginning.

The files in src/sys/dev/ic/ have been repo-copied from their old
location (this commit is a forced null commit there to record this
message).
This commit is contained in:
Joerg Wunsch 2001-06-04 21:04:14 +00:00
parent 341762c6f1
commit b794010414
11 changed files with 10 additions and 292 deletions

View File

@ -39,7 +39,7 @@
*/
/* uses NEC765 controller */
#include <isa/ic/nec765.h>
#include <dev/ic/nec765.h>
/* registers */
#define FDOUT 2 /* Digital Output Register (W) */

View File

@ -88,9 +88,9 @@
#include <isa/sioreg.h>
#ifdef COM_ESP
#include <isa/ic/esp.h>
#include <dev/ic/esp.h>
#endif
#include <isa/ic/ns16550.h>
#include <dev/ic/ns16550.h>
#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */

View File

@ -43,7 +43,7 @@
#include <isa/isavar.h>
#include <isa/sioreg.h>
#include <isa/ic/ns16550.h>
#include <dev/ic/ns16550.h>
static devclass_t midi_devclass;

View File

@ -47,7 +47,7 @@
*/
#include <isa/sioreg.h>
#include <isa/ic/ns16550.h>
#include <dev/ic/ns16550.h>
#include <dev/sound/midi/midi.h>
/* XXX What about a PCI uart? */

View File

@ -39,7 +39,7 @@
*/
/* uses NEC765 controller */
#include <isa/ic/nec765.h>
#include <dev/ic/nec765.h>
/* registers */
#define FDOUT 2 /* Digital Output Register (W) */

View File

@ -1,76 +0,0 @@
/*-
* Copyright (c) 1995 Sean Eric Fagan.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _IC_ESP_H_
#define _IC_ESP_H_
/*
* Definitions for Hayes ESP serial cards.
*/
/*
* CMD1 and CMD2 are the command ports, offsets from <esp_iobase>.
*/
#define ESP_CMD1 4
#define ESP_CMD2 5
/*
* STAT1 and STAT2 are to get return values and status bytes;
* they overload CMD1 and CMD2.
*/
#define ESP_STATUS1 ESP_CMD1
#define ESP_STATUS2 ESP_CMD2
/*
* Commands. Commands are given by writing the command value to
* ESP_CMD1 and then writing or reading some number of bytes from
* ESP_CMD2 or ESP_STATUS2.
*/
#define ESP_GETTEST 0x01 /* self-test command (1 byte + extras) */
#define ESP_GETDIPS 0x02 /* get on-board DIP switches (1 byte) */
#define ESP_SETFLOWTYPE 0x08 /* set type of flow-control (2 bytes) */
#define ESP_SETRXFLOW 0x0a /* set Rx FIFO flow control levels (4 bytes) */
#define ESP_SETMODE 0x10 /* set board mode (1 byte) */
/* Mode bits (ESP_SETMODE). */
#define ESP_MODE_FIFO 0x02 /* act like a 16550 (compatibility mode) */
#define ESP_MODE_RTS 0x04 /* use RTS hardware flow control */
#define ESP_MODE_SCALE 0x80 /* scale FIFO trigger levels */
/* Flow control type bits (ESP_SETFLOWTYPE). */
#define ESP_FLOW_RTS 0x04 /* cmd1: local Rx sends RTS flow control */
#define ESP_FLOW_CTS 0x10 /* cmd2: local transmitter responds to CTS */
/* Used by ESP_SETRXFLOW. */
#define HIBYTE(w) (((w) >> 8) & 0xff)
#define LOBYTE(w) ((w) & 0xff)
#endif /* !_IC_ESP_H_ */

View File

@ -1,142 +0,0 @@
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)nec765.h 7.1 (Berkeley) 5/9/91
* $FreeBSD$
*/
/*
* Nec 765 floppy disc controller definitions
*/
/* Main status register */
#define NE7_DAB 0x01 /* Diskette drive A is seeking, thus busy */
#define NE7_DBB 0x02 /* Diskette drive B is seeking, thus busy */
#define NE7_CB 0x10 /* Diskette Controller Busy */
#define NE7_NDM 0x20 /* Diskette Controller in Non Dma Mode */
#define NE7_DIO 0x40 /* Diskette Controller Data register I/O */
#define NE7_RQM 0x80 /* Diskette Controller ReQuest for Master */
/* Status register ST0 */
#define NE7_ST0BITS "\020\010invld\007abnrml\006seek_cmplt\005equ_chck\004drive_notrdy\003top_head"
#define NE7_ST0_IC 0xc0 /* interrupt completion code */
#define NE7_ST0_IC_RC 0xc0 /* terminated due to ready changed, n/a */
#define NE7_ST0_IC_IV 0x80 /* invalid command; must reset FDC */
#define NE7_ST0_IC_AT 0x40 /* abnormal termination, check error stat */
#define NE7_ST0_IC_NT 0x00 /* normal termination */
#define NE7_ST0_SE 0x20 /* seek end */
#define NE7_ST0_EC 0x10 /* equipment check, recalibrated but no trk0 */
#define NE7_ST0_NR 0x08 /* not ready (n/a) */
#define NE7_ST0_HD 0x04 /* upper head selected */
#define NE7_ST0_DR 0x03 /* drive code */
/* Status register ST1 */
#define NE7_ST1BITS "\020\010end_of_cyl\006bad_crc\005data_overrun\003sec_not_fnd\002write_protect\001no_am"
#define NE7_ST1_EN 0x80 /* end of cylinder, access past last record */
#define NE7_ST1_DE 0x20 /* data error, CRC fail in ID or data */
#define NE7_ST1_OR 0x10 /* DMA overrun, DMA failed to do i/o quickly */
#define NE7_ST1_ND 0x04 /* no data, sector not found or CRC in ID f. */
#define NE7_ST1_NW 0x02 /* not writeable, attempt to violate WP */
#define NE7_ST1_MA 0x01 /* missing address mark (in ID or data field)*/
/* Status register ST2 */
#define NE7_ST2BITS "\020\007ctrl_mrk\006bad_crc\005wrong_cyl\004scn_eq\003scn_not_fnd\002bad_cyl\001no_dam"
#define NE7_ST2_CM 0x40 /* control mark; found deleted data */
#define NE7_ST2_DD 0x20 /* data error in data field, CRC fail */
#define NE7_ST2_WC 0x10 /* wrong cylinder, ID field mismatches cmd */
#define NE7_ST2_SH 0x08 /* scan equal hit */
#define NE7_ST2_SN 0x04 /* scan not satisfied */
#define NE7_ST2_BC 0x02 /* bad cylinder, cylinder marked 0xff */
#define NE7_ST2_MD 0x01 /* missing address mark in data field */
/* Status register ST3 */
#define NE7_ST3BITS "\020\010fault\007write_protect\006drdy\005tk0\004two_side\003side_sel\002"
#define NE7_ST3_FT 0x80 /* fault; PC: n/a */
#define NE7_ST3_WP 0x40 /* write protected */
#define NE7_ST3_RD 0x20 /* ready; PC: always true */
#define NE7_ST3_T0 0x10 /* track 0 */
#define NE7_ST3_TS 0x08 /* two-sided; PC: n/a */
#define NE7_ST3_HD 0x04 /* upper head select */
#define NE7_ST3_US 0x03 /* unit select */
/* Commands */
/*
* the top three bits -- where appropriate -- are set as follows:
*
* 0x80 - MT multi-track; allow both sides to be handled in single cmd
* 0x40 - MFM modified frequency modulation; use MFM encoding
* 0x20 - SK skip; skip sectors marked as "deleted"
*/
#define NE7CMD_READTRK 0x42 /* read whole track */
#define NE7CMD_SPECIFY 3 /* specify drive parameters - requires unit
parameters byte */
#define NE7CMD_SENSED 4 /* sense drive - requires unit select byte */
#define NE7CMD_WRITE 0xc5 /* write - requires eight additional bytes */
#define NE7CMD_READ 0xe6 /* read - requires eight additional bytes */
#define NE7CMD_RECAL 7 /* recalibrate drive - requires
unit select byte */
#define NE7CMD_SENSEI 8 /* sense controller interrupt status */
#define NE7CMD_WRITEDEL 0xc9 /* write deleted data */
#define NE7CMD_READID 0x4a /* read ID field */
#define NE7CMD_READDEL 0xec /* read deleted data */
#define NE7CMD_FORMAT 0x4d /* format - requires five additional bytes */
#define NE7CMD_SEEK 0x0f /* seek drive - requires unit select byte
and new cyl byte */
#define NE7CMD_SCNEQU 0xf1 /* scan equal */
#define NE7CMD_SCNLE 0xf9 /* scan less or equal */
#define NE7CMD_SCNGE 0xfd /* scan greater or equal */
/*
* Enhanced controller commands:
*/
#define NE7CMD_VERSION 0x10 /* version (ok for all controllers) */
#define I8207X_CONFIGURE 0x13 /* configure enhanced features */
/*
* "specify" definitions
*
* acronyms (times are relative to a FDC clock of 8 MHz):
* srt - step rate; PC usually 3 ms
* hut - head unload time; PC usually maximum of 240 ms
* hlt - head load time; PC usually minimum of 2 ms
* nd - no DMA flag; PC usually not set (0)
*/
#define NE7_SPEC_1(srt, hut) (((16 - (srt)) << 4) | (((hut) / 16)))
#define NE7_SPEC_2(hlt, nd) (((hlt) & 0xFE) | ((nd) & 1))

View File

@ -1,64 +0,0 @@
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91
* $FreeBSD$
*/
/*
* NS16550 UART registers
*/
#ifdef PC98
#define com_data 0x000 /* data register (R/W) */
#define com_dlbl 0x000 /* divisor latch low (W) */
#define com_dlbh 0x100 /* divisor latch high (W) */
#define com_ier 0x100 /* interrupt enable (W) */
#define com_iir 0x200 /* interrupt identification (R) */
#define com_fifo 0x200 /* FIFO control (W) */
#define com_lctl 0x300 /* line control register (R/W) */
#define com_cfcr 0x300 /* line control register (R/W) */
#define com_mcr 0x400 /* modem control register (R/W) */
#define com_lsr 0x500 /* line status register (R/W) */
#define com_msr 0x600 /* modem status register (R/W) */
#else /* IBM-PC */
#define com_data 0 /* data register (R/W) */
#define com_dlbl 0 /* divisor latch low (W) */
#define com_dlbh 1 /* divisor latch high (W) */
#define com_ier 1 /* interrupt enable (W) */
#define com_iir 2 /* interrupt identification (R) */
#define com_fifo 2 /* FIFO control (W) */
#define com_lctl 3 /* line control register (R/W) */
#define com_cfcr 3 /* line control register (R/W) */
#define com_mcr 4 /* modem control register (R/W) */
#define com_lsr 5 /* line status register (R/W) */
#define com_msr 6 /* modem status register (R/W) */
#endif /* PC98 */

View File

@ -88,9 +88,9 @@
#include <isa/sioreg.h>
#ifdef COM_ESP
#include <isa/ic/esp.h>
#include <dev/ic/esp.h>
#endif
#include <isa/ic/ns16550.h>
#include <dev/ic/ns16550.h>
#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */

View File

@ -39,7 +39,7 @@
*/
/* uses NEC765 controller */
#include <isa/ic/nec765.h>
#include <dev/ic/nec765.h>
#ifdef PC98
/* registers */

View File

@ -39,7 +39,7 @@
*/
/* uses NEC765 controller */
#include <isa/ic/nec765.h>
#include <dev/ic/nec765.h>
#ifdef PC98
/* registers */