Overhaul bus_dma(9) usage in driver:
- Don't use a single big DMA block for all rings. Create separate DMA area for each ring instead. Currently the following DMA areas are created: Event ring, standard RX ring, jumbo RX ring, RX return ring, hardware MAC statistics and producer/consumer status area. For Tigon II, mini RX ring and TX ring are additionally created. - Added missing bus_dmamap_sync(9) in various TX/RX paths. - TX ring is no longer created for Tigon 1 such that it saves more resources on Tigon 1. - Data sheet is not clear about alignment requirement of each ring so use 32 bytes alignment for normal DMA area but use 64 bytes alignment for jumbo RX ring where the extended RX descriptor size is 64 bytes. - For each TX/RX buffers use separate DMA tag(e.g. the size of a DMA segment, total size of DMA segments etc). - Tigon allows separate DMA area for event producer, RX return producer and TX consumer which is really cool feature. This means TX and RX path could be independently run in parallel. However ti(4) uses a single driver lock so it's meaningless to have separate DMA area for these producer/consumer such that this change creates a single status DMA area. - It seems Tigon has no limits on DMA address space and I also don't see any problem with that but old comments in driver indicates there could be issues on descriptors being located in 64bit region. Introduce a tunable, dev.ti.%d.dac, to disable using 64bit DMA in driver. The default is 0 which means it would use full 64bit DMA. If there are DMA issues, users can disable it by setting the tunable to 0. - Do not increase watchdog timer in ti_txeof(). Previously driver increased the watchdog timer whenever there are queued TX frames. - When stat ticks is set to 0, skip processing ti_stats_update(), avoiding bus_dmamap_sync(9) and updating if_collisions counter. - MTU does not include FCS bytes, replace it with ETHER_VLAN_ENCAP_LEN. With these changes, ti(4) should work on PAE environments. Many thanks to Jay Borkenhagen for remote hardware access.
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@ -400,6 +400,8 @@
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#define TI_RETURN_RING_CNT 2048
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#define TI_MAXTXSEGS 32
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#define TI_RING_ALIGN 32
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#define TI_JUMBO_RING_ALIGN 64
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/*
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* Possible TX ring sizes.
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@ -602,6 +604,10 @@ struct ti_rx_desc {
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uint32_t ti_opaque;
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};
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#define TI_STD_RX_RING_SZ (sizeof(struct ti_rx_desc) * TI_STD_RX_RING_CNT)
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#define TI_MINI_RX_RING_SZ (sizeof(struct ti_rx_desc) * TI_MINI_RX_RING_CNT)
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#define TI_RX_RETURN_RING_SZ (sizeof(struct ti_rx_desc) * TI_RETURN_RING_CNT)
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struct ti_rx_desc_ext {
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ti_hostaddr ti_addr1;
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ti_hostaddr ti_addr2;
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@ -653,6 +659,14 @@ struct ti_rx_desc_ext {
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uint32_t ti_opaque;
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};
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#ifdef TI_SF_BUF_JUMBO
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#define TI_JUMBO_RX_RING_SZ \
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(sizeof(struct ti_rx_desc_ext) * TI_JUMBO_RX_RING_CNT)
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#else
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#define TI_JUMBO_RX_RING_SZ \
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(sizeof(struct ti_rx_desc) * TI_JUMBO_RX_RING_CNT)
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#endif
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/*
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* Transmit descriptors are, mercifully, very small.
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*/
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@ -674,6 +688,8 @@ struct ti_tx_desc {
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#endif
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};
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#define TI_TX_RING_SZ (sizeof(struct ti_tx_desc) * TI_TX_RING_CNT)
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/*
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* NOTE! On the Alpha, we have an alignment constraint.
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* The first thing in the packet is a 14-byte Ethernet header.
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@ -845,6 +861,7 @@ struct ti_event_desc {
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uint32_t ti_eventx;
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uint32_t ti_rsvd;
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};
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#define TI_EVENT_RING_SZ (sizeof(struct ti_event_desc) * TI_EVENT_RING_CNT)
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#define TI_EVENT_EVENT(e) (((((e)->ti_eventx)) >> 24) & 0xff)
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#define TI_EVENT_CODE(e) (((((e)->ti_eventx)) >> 12) & 0xfff)
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@ -895,26 +912,12 @@ struct ti_txdesc {
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STAILQ_HEAD(ti_txdq, ti_txdesc);
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/*
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* Ring structures. Most of these reside in host memory and we tell
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* the NIC where they are via the ring control blocks. The exceptions
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* are the tx and command rings, which live in NIC memory and which
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* we access via the shared memory window.
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*/
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struct ti_ring_data {
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struct ti_rx_desc ti_rx_std_ring[TI_STD_RX_RING_CNT];
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#ifndef TI_SF_BUF_JUMBO
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struct ti_rx_desc ti_rx_jumbo_ring[TI_JUMBO_RX_RING_CNT];
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#else
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struct ti_rx_desc_ext ti_rx_jumbo_ring[TI_JUMBO_RX_RING_CNT];
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#endif
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struct ti_rx_desc ti_rx_mini_ring[TI_MINI_RX_RING_CNT];
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struct ti_rx_desc ti_rx_return_ring[TI_RETURN_RING_CNT];
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struct ti_event_desc ti_event_ring[TI_EVENT_RING_CNT];
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struct ti_tx_desc ti_tx_ring[TI_TX_RING_CNT];
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struct ti_status {
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/*
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* Make sure producer structures are aligned on 32-byte cache
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* line boundaries.
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* line boundaries. We can create separate DMA area for each
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* producer/consumer area but it wouldn't get much benefit
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* since driver use a global driver lock.
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*/
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struct ti_producer ti_ev_prodidx_r;
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uint32_t ti_pad0[6];
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@ -922,10 +925,36 @@ struct ti_ring_data {
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uint32_t ti_pad1[6];
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struct ti_producer ti_tx_considx_r;
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uint32_t ti_pad2[6];
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struct ti_gib ti_info;
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};
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#define TI_RD_OFF(x) offsetof(struct ti_ring_data, x)
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/*
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* Ring structures. Most of these reside in host memory and we tell
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* the NIC where they are via the ring control blocks. The exceptions
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* are the tx and command rings, which live in NIC memory and which
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* we access via the shared memory window.
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*/
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struct ti_ring_data {
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struct ti_gib *ti_info;
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bus_addr_t ti_info_paddr;
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struct ti_status *ti_status;
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bus_addr_t ti_status_paddr;
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struct ti_rx_desc *ti_rx_std_ring;
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bus_addr_t ti_rx_std_ring_paddr;
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#ifdef TI_SF_BUF_JUMBO
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struct ti_rx_desc_ext *ti_rx_jumbo_ring;
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#else
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struct ti_rx_desc *ti_rx_jumbo_ring;
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#endif
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bus_addr_t ti_rx_jumbo_ring_paddr;
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struct ti_rx_desc *ti_rx_mini_ring;
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bus_addr_t ti_rx_mini_ring_paddr;
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struct ti_rx_desc *ti_rx_return_ring;
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bus_addr_t ti_rx_return_ring_paddr;
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struct ti_event_desc *ti_event_ring;
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bus_addr_t ti_event_ring_paddr;
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struct ti_tx_desc *ti_tx_ring;
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bus_addr_t ti_tx_ring_paddr;
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};
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/*
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* Mbuf pointers. We need these to keep track of the virtual addresses
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@ -933,15 +962,36 @@ struct ti_ring_data {
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* not the other way around.
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*/
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struct ti_chain_data {
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bus_dma_tag_t ti_parent_tag;
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bus_dma_tag_t ti_gib_tag;
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bus_dmamap_t ti_gib_map;
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bus_dma_tag_t ti_event_ring_tag;
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bus_dmamap_t ti_event_ring_map;
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bus_dma_tag_t ti_status_tag;
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bus_dmamap_t ti_status_map;
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bus_dma_tag_t ti_tx_ring_tag;
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bus_dmamap_t ti_tx_ring_map;
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bus_dma_tag_t ti_tx_tag;
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struct ti_txdesc ti_txdesc[TI_TX_RING_CNT];
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struct ti_txdq ti_txfreeq;
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struct ti_txdq ti_txbusyq;
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bus_dma_tag_t ti_rx_return_ring_tag;
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bus_dmamap_t ti_rx_return_ring_map;
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bus_dma_tag_t ti_rx_std_ring_tag;
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bus_dmamap_t ti_rx_std_ring_map;
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bus_dma_tag_t ti_rx_std_tag;
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struct mbuf *ti_rx_std_chain[TI_STD_RX_RING_CNT];
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bus_dmamap_t ti_rx_std_maps[TI_STD_RX_RING_CNT];
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bus_dmamap_t ti_rx_std_sparemap;
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bus_dma_tag_t ti_rx_jumbo_ring_tag;
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bus_dmamap_t ti_rx_jumbo_ring_map;
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bus_dma_tag_t ti_rx_jumbo_tag;
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struct mbuf *ti_rx_jumbo_chain[TI_JUMBO_RX_RING_CNT];
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bus_dmamap_t ti_rx_jumbo_maps[TI_JUMBO_RX_RING_CNT];
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bus_dmamap_t ti_rx_jumbo_sparemap;
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bus_dma_tag_t ti_rx_mini_ring_tag;
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bus_dmamap_t ti_rx_mini_ring_map;
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bus_dma_tag_t ti_rx_mini_tag;
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struct mbuf *ti_rx_mini_chain[TI_MINI_RX_RING_CNT];
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bus_dmamap_t ti_rx_mini_maps[TI_MINI_RX_RING_CNT];
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bus_dmamap_t ti_rx_mini_sparemap;
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@ -982,18 +1032,12 @@ struct ti_softc {
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uint8_t ti_copper; /* 1000baseTX card */
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uint8_t ti_linkstat; /* Link state */
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int ti_hdrsplit; /* enable header splitting */
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bus_dma_tag_t ti_parent_dmat;
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bus_dma_tag_t ti_jumbo_dmat;
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bus_dma_tag_t ti_mbuftx_dmat;
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bus_dma_tag_t ti_mbufrx_dmat;
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bus_dma_tag_t ti_rdata_dmat;
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bus_dmamap_t ti_rdata_dmamap;
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bus_addr_t ti_rdata_phys;
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struct ti_ring_data *ti_rdata; /* rings */
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int ti_dac;
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struct ti_ring_data ti_rdata; /* rings */
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struct ti_chain_data ti_cdata; /* mbufs */
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#define ti_ev_prodidx ti_rdata->ti_ev_prodidx_r
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#define ti_return_prodidx ti_rdata->ti_return_prodidx_r
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#define ti_tx_considx ti_rdata->ti_tx_considx_r
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#define ti_ev_prodidx ti_rdata.ti_status->ti_ev_prodidx_r
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#define ti_return_prodidx ti_rdata.ti_status->ti_return_prodidx_r
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#define ti_tx_considx ti_rdata.ti_status->ti_tx_considx_r
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int ti_tx_saved_prodidx;
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int ti_tx_saved_considx;
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int ti_rx_saved_considx;
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