First cut at code for handling "spurious INTerrupts".
First cut at code for handling CPU stop/restart. Notes: not working properly yet.
This commit is contained in:
Steve Passe
parent
e154505673
commit
b956b5370c
@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $
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* $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $
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*/
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@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \
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addl $4+4,%esp ; \
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iret
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/*
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* Handle TLB shootdowns.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xinvltlb
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_Xinvltlb:
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pushl %eax
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#ifdef COUNT_XINVLTLB_HITS
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ss
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movl _cpuid, %eax
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ss
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incl _xhits(,%eax,4)
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#endif /* COUNT_XINVLTLB_HITS */
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movl %cr3, %eax /* invalidate the TLB */
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movl %eax, %cr3
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movl $lapic_eoi, %eax
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ss /* stack segment, avoid %ds load */
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %eax
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iret
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/*
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* Handle "spurious INTerrupts".
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* Notes:
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* This is different than the "spurious INTerrupt" generated by an
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* 8259 PIC for missing INTs. See the APIC documentation for details.
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* This routine should NOT do an 'EOI' cycle.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xspuriousint
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_Xspuriousint:
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pushl %eax
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pushl %ds /* save current data segment */
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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ASMPOSTCODE_HI(0xc0)
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#endif
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#ifdef COUNT_SPURIOUS_INTS
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incl _sihits
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#endif
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/* No EOI cycle used here */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#ifdef TEST_CPUSTOP
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -196,50 +243,42 @@ _Xcpustop:
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pushl %eax
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pushl %ds /* save current data segment */
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#ifdef DEBUG_CPUSTOP
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movb $0x50, %al
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outb %al, $POST_ADDR
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#endif
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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/** XXX still trying to make this !^#$#% thing work... */
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movl _cpuid, %eax
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incl _cshits(,%eax,4)
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#else /** !^#$#% */
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ASMPOSTCODE_HI(0x10)
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movl _cpuid, %eax /* id */
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lock
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btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x51, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x20);
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1:
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btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
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jnc 1b
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#ifdef DEBUG_CPUSTOP
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movb $0x52, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x30)
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lock
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btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x53, %al
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outb %al, $POST_ADDR
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#endif
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ASMPOSTCODE_HI(0x40)
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#endif /** !^#$#% */
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movl $lapic_eoi, %eax
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#endif /* TEST_CPUSTOP */
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@ -327,6 +366,22 @@ _ivectors:
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iactive:
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.long 0
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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_xhits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* COUNT_XINVLTLB_HITS */
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#ifdef COUNT_SPURIOUS_INTS
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.globl _sihits
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_sihits:
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.long 0
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#endif /* COUNT_SPURIOUS_INTS */
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#ifdef TEST_CPUSTOP
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.globl _stopped_cpus
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_stopped_cpus:
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@ -335,6 +390,13 @@ _stopped_cpus:
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.globl _started_cpus
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_started_cpus:
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.long 0
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.globl _cshits
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_cshits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* TEST_CPUSTOP */
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $
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* $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $
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*/
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@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \
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addl $4+4,%esp ; \
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iret
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/*
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* Handle TLB shootdowns.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xinvltlb
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_Xinvltlb:
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pushl %eax
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#ifdef COUNT_XINVLTLB_HITS
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ss
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movl _cpuid, %eax
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ss
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incl _xhits(,%eax,4)
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#endif /* COUNT_XINVLTLB_HITS */
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movl %cr3, %eax /* invalidate the TLB */
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movl %eax, %cr3
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movl $lapic_eoi, %eax
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ss /* stack segment, avoid %ds load */
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %eax
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iret
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/*
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* Handle "spurious INTerrupts".
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* Notes:
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* This is different than the "spurious INTerrupt" generated by an
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* 8259 PIC for missing INTs. See the APIC documentation for details.
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* This routine should NOT do an 'EOI' cycle.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xspuriousint
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_Xspuriousint:
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pushl %eax
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pushl %ds /* save current data segment */
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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ASMPOSTCODE_HI(0xc0)
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#endif
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#ifdef COUNT_SPURIOUS_INTS
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incl _sihits
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#endif
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/* No EOI cycle used here */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#ifdef TEST_CPUSTOP
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -196,50 +243,42 @@ _Xcpustop:
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pushl %eax
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pushl %ds /* save current data segment */
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#ifdef DEBUG_CPUSTOP
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movb $0x50, %al
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outb %al, $POST_ADDR
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#endif
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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/** XXX still trying to make this !^#$#% thing work... */
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movl _cpuid, %eax
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incl _cshits(,%eax,4)
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#else /** !^#$#% */
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ASMPOSTCODE_HI(0x10)
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movl _cpuid, %eax /* id */
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lock
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btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x51, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x20);
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1:
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btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
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jnc 1b
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#ifdef DEBUG_CPUSTOP
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movb $0x52, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x30)
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lock
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btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x53, %al
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outb %al, $POST_ADDR
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#endif
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ASMPOSTCODE_HI(0x40)
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#endif /** !^#$#% */
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movl $lapic_eoi, %eax
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#endif /* TEST_CPUSTOP */
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@ -327,6 +366,22 @@ _ivectors:
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iactive:
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.long 0
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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_xhits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* COUNT_XINVLTLB_HITS */
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#ifdef COUNT_SPURIOUS_INTS
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.globl _sihits
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_sihits:
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.long 0
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#endif /* COUNT_SPURIOUS_INTS */
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#ifdef TEST_CPUSTOP
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.globl _stopped_cpus
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_stopped_cpus:
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@ -335,6 +390,13 @@ _stopped_cpus:
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.globl _started_cpus
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_started_cpus:
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.long 0
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.globl _cshits
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_cshits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* TEST_CPUSTOP */
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.1 1997/06/26 17:52:12 smp Exp smp $
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* $Id: apic_vector.s,v 1.3 1997/07/06 23:29:00 smp Exp smp $
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*/
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@ -167,20 +167,67 @@ __CONCAT(Xresume,irq_num): ; \
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addl $4+4,%esp ; \
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iret
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/*
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* Handle TLB shootdowns.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xinvltlb
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_Xinvltlb:
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pushl %eax
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#ifdef COUNT_XINVLTLB_HITS
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ss
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movl _cpuid, %eax
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ss
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incl _xhits(,%eax,4)
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#endif /* COUNT_XINVLTLB_HITS */
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movl %cr3, %eax /* invalidate the TLB */
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movl %eax, %cr3
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movl $lapic_eoi, %eax
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ss /* stack segment, avoid %ds load */
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %eax
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iret
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/*
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* Handle "spurious INTerrupts".
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* Notes:
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* This is different than the "spurious INTerrupt" generated by an
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* 8259 PIC for missing INTs. See the APIC documentation for details.
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* This routine should NOT do an 'EOI' cycle.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xspuriousint
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_Xspuriousint:
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pushl %eax
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pushl %ds /* save current data segment */
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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ASMPOSTCODE_HI(0xc0)
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#endif
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#ifdef COUNT_SPURIOUS_INTS
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incl _sihits
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#endif
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/* No EOI cycle used here */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#ifdef TEST_CPUSTOP
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -196,50 +243,42 @@ _Xcpustop:
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pushl %eax
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pushl %ds /* save current data segment */
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#ifdef DEBUG_CPUSTOP
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movb $0x50, %al
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outb %al, $POST_ADDR
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#endif
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movl $KDSEL, %eax
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movl %ax, %ds /* use KERNEL data segment */
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#if 1
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/** XXX still trying to make this !^#$#% thing work... */
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movl _cpuid, %eax
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incl _cshits(,%eax,4)
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#else /** !^#$#% */
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ASMPOSTCODE_HI(0x10)
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movl _cpuid, %eax /* id */
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lock
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btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x51, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x20);
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1:
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btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
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jnc 1b
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#ifdef DEBUG_CPUSTOP
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movb $0x52, %al
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outb %al, $POST_ADDR
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movl _cpuid, %eax /* RESTORE id */
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#endif
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ASMPOSTCODE_HI(0x30)
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lock
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btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
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#ifdef DEBUG_CPUSTOP
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movb $0x53, %al
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outb %al, $POST_ADDR
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#endif
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ASMPOSTCODE_HI(0x40)
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#endif /** !^#$#% */
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movl $lapic_eoi, %eax
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movl $0, (%eax) /* End Of Interrupt to APIC */
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popl %ds /* restore previous data segment */
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popl %eax
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iret
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#endif /* TEST_CPUSTOP */
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@ -327,6 +366,22 @@ _ivectors:
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iactive:
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.long 0
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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_xhits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* COUNT_XINVLTLB_HITS */
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#ifdef COUNT_SPURIOUS_INTS
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.globl _sihits
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_sihits:
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.long 0
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#endif /* COUNT_SPURIOUS_INTS */
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#ifdef TEST_CPUSTOP
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.globl _stopped_cpus
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_stopped_cpus:
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@ -335,6 +390,13 @@ _stopped_cpus:
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.globl _started_cpus
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_started_cpus:
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.long 0
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.globl _cshits
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_cshits:
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.long 0
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.long 0
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.long 0
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.long 0
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#endif /* TEST_CPUSTOP */
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