Sync with sys/i386/isa/clock.c revision 1.117.
This commit is contained in:
KATO Takenori
parent
f1aca9c33f
commit
b96ae93234
@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.48 1998/03/07 15:43:43 kato Exp $
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* $Id: clock.c,v 1.49 1998/03/15 13:35:42 kato Exp $
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*/
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/*
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@ -73,6 +73,10 @@
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#include <machine/ipl.h>
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#include <machine/limits.h>
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#include <machine/md_var.h>
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#if NAPM > 0
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#include <machine/apm_bios.h>
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#include <i386/apm/apm_setup.h>
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#endif
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#ifdef APIC_IO
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#include <machine/segments.h>
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#endif
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@ -843,13 +847,6 @@ startrtclock()
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else
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tsc_present = 0;
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#ifdef SMP
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tsc_present = 0;
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#endif
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#if NAPM > 0
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tsc_present = 0;
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#endif
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#ifndef PC98
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -916,10 +913,36 @@ startrtclock()
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printf("TSC clock: %u Hz (Method B)\n", tsc_freq);
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#endif
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}
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#if !defined(SMP)
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/*
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* We can not use the TSC in SMP mode, until we figure out a
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* cheap (impossible), reliable and precise (yeah right!) way
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* to synchronize the TSCs of all the CPUs.
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* Curse Intel for leaving the counter out of the I/O APIC.
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*/
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#if NAPM > 0
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/*
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* We can not use the TSC if we found an APM bios. Too many
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* of them lie about their ability&intention to fiddle the CPU
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* clock for us to rely on this. Precise timekeeping on an
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* APM'ed machine is at best a fools pursuit anyway, since
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* any and all of the time spent in various SMM code can't
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* be reliably accounted for. Reading the RTC is your only
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* source of reliable time info. The i8254 looses too of course
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* but we need to have some kind of time...
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*/
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if (apm_version != APMINI_CANTFIND)
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return;
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#endif /* NAPM > 0 */
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if (tsc_present && tsc_freq != 0) {
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tsc_timecounter[0].frequency = tsc_freq;
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init_timecounter(tsc_timecounter);
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}
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#endif /* !defined(SMP) */
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}
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#ifdef PC98
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.48 1998/03/07 15:43:43 kato Exp $
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* $Id: clock.c,v 1.49 1998/03/15 13:35:42 kato Exp $
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*/
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/*
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@ -73,6 +73,10 @@
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#include <machine/ipl.h>
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#include <machine/limits.h>
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#include <machine/md_var.h>
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#if NAPM > 0
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#include <machine/apm_bios.h>
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#include <i386/apm/apm_setup.h>
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#endif
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#ifdef APIC_IO
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#include <machine/segments.h>
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#endif
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@ -843,13 +847,6 @@ startrtclock()
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else
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tsc_present = 0;
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#ifdef SMP
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tsc_present = 0;
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#endif
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#if NAPM > 0
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tsc_present = 0;
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#endif
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#ifndef PC98
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -916,10 +913,36 @@ startrtclock()
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printf("TSC clock: %u Hz (Method B)\n", tsc_freq);
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#endif
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}
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#if !defined(SMP)
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/*
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* We can not use the TSC in SMP mode, until we figure out a
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* cheap (impossible), reliable and precise (yeah right!) way
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* to synchronize the TSCs of all the CPUs.
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* Curse Intel for leaving the counter out of the I/O APIC.
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*/
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#if NAPM > 0
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/*
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* We can not use the TSC if we found an APM bios. Too many
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* of them lie about their ability&intention to fiddle the CPU
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* clock for us to rely on this. Precise timekeeping on an
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* APM'ed machine is at best a fools pursuit anyway, since
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* any and all of the time spent in various SMM code can't
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* be reliably accounted for. Reading the RTC is your only
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* source of reliable time info. The i8254 looses too of course
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* but we need to have some kind of time...
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*/
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if (apm_version != APMINI_CANTFIND)
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return;
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#endif /* NAPM > 0 */
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if (tsc_present && tsc_freq != 0) {
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tsc_timecounter[0].frequency = tsc_freq;
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init_timecounter(tsc_timecounter);
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}
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#endif /* !defined(SMP) */
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}
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#ifdef PC98
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.48 1998/03/07 15:43:43 kato Exp $
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* $Id: clock.c,v 1.49 1998/03/15 13:35:42 kato Exp $
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*/
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/*
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@ -73,6 +73,10 @@
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#include <machine/ipl.h>
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#include <machine/limits.h>
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#include <machine/md_var.h>
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#if NAPM > 0
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#include <machine/apm_bios.h>
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#include <i386/apm/apm_setup.h>
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#endif
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#ifdef APIC_IO
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#include <machine/segments.h>
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#endif
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@ -843,13 +847,6 @@ startrtclock()
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else
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tsc_present = 0;
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#ifdef SMP
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tsc_present = 0;
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#endif
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#if NAPM > 0
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tsc_present = 0;
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#endif
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#ifndef PC98
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writertc(RTC_STATUSA, rtc_statusa);
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writertc(RTC_STATUSB, RTCSB_24HR);
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@ -916,10 +913,36 @@ startrtclock()
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printf("TSC clock: %u Hz (Method B)\n", tsc_freq);
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#endif
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}
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#if !defined(SMP)
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/*
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* We can not use the TSC in SMP mode, until we figure out a
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* cheap (impossible), reliable and precise (yeah right!) way
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||||
* to synchronize the TSCs of all the CPUs.
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* Curse Intel for leaving the counter out of the I/O APIC.
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*/
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#if NAPM > 0
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/*
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* We can not use the TSC if we found an APM bios. Too many
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* of them lie about their ability&intention to fiddle the CPU
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* clock for us to rely on this. Precise timekeeping on an
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* APM'ed machine is at best a fools pursuit anyway, since
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* any and all of the time spent in various SMM code can't
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* be reliably accounted for. Reading the RTC is your only
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* source of reliable time info. The i8254 looses too of course
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* but we need to have some kind of time...
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*/
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if (apm_version != APMINI_CANTFIND)
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return;
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#endif /* NAPM > 0 */
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if (tsc_present && tsc_freq != 0) {
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tsc_timecounter[0].frequency = tsc_freq;
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init_timecounter(tsc_timecounter);
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}
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#endif /* !defined(SMP) */
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}
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#ifdef PC98
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