Add support for the Silicon Image SiI 3124 and SiI 3132.
HW donated by: Adriaan de Groot
This commit is contained in:
Søren Schmidt
parent
262dfd7fae
commit
b9842b47e6
@ -159,6 +159,13 @@ static int ata_sii_allocate(device_t dev);
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static int ata_sii_status(device_t dev);
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static void ata_sii_reset(device_t dev);
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static void ata_sii_setmode(device_t dev, int mode);
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static int ata_siiprb_allocate(device_t dev);
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static int ata_siiprb_status(device_t dev);
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static int ata_siiprb_begin_transaction(struct ata_request *request);
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static int ata_siiprb_end_transaction(struct ata_request *request);
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static void ata_siiprb_reset(device_t dev);
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static void ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);
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static void ata_siiprb_dmainit(device_t dev);
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static int ata_sis_chipinit(device_t dev);
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static int ata_sis_allocate(device_t dev);
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static void ata_sis_reset(device_t dev);
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@ -2976,20 +2983,16 @@ ata_nvidia_status(device_t dev)
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int shift = ch->unit << (ctlr->chip->cfg2 & NVQ ? 4 : 2);
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u_int32_t istatus = ATA_INL(ctlr->r_res2, offset);
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/* do we have any device action ? */
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if (istatus & (0x0f << shift)) {
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/* clear interrupt(s) */
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ATA_OUTB(ctlr->r_res2, offset,
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(0x0f << shift) | (ctlr->chip->cfg2 & NVQ ? 0x00f000f0 : 0));
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/* do we have any PHY events ? */
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/* do we have any PHY events ? */
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if (istatus & (0x0c << shift))
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ata_sata_phy_check_events(dev);
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/* do we have any device action ? */
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return (istatus & (0x01 << shift));
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}
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return 0;
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/* clear interrupt(s) */
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ATA_OUTB(ctlr->r_res2, offset,
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(0x0f << shift) | (ctlr->chip->cfg2 & NVQ ? 0x00f000f0 : 0));
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/* do we have any device action ? */
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return (istatus & (0x01 << shift));
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}
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static void
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@ -4165,6 +4168,8 @@ ata_sii_ident(device_t dev)
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{ ATA_SII3512, 0x00, SIIMEMIO, SIIBUG, ATA_SA150, "SiI 3512" },
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{ ATA_SII3112, 0x00, SIIMEMIO, SIIBUG, ATA_SA150, "SiI 3112" },
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{ ATA_SII3112_1, 0x00, SIIMEMIO, SIIBUG, ATA_SA150, "SiI 3112" },
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{ ATA_SII3124, 0x00, SIIPRBIO, SII4CH, ATA_SA300, "SiI 3124" },
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{ ATA_SII3132, 0x00, SIIPRBIO, 0, ATA_SA300, "SiI 3132" },
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{ ATA_SII0680, 0x00, SIIMEMIO, SIISETCLK, ATA_UDMA6, "SiI 0680" },
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{ ATA_CMD649, 0x00, 0, SIIINTR, ATA_UDMA5, "CMD 649" },
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{ ATA_CMD648, 0x00, 0, SIIINTR, ATA_UDMA4, "CMD 648" },
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@ -4192,6 +4197,36 @@ ata_sii_chipinit(device_t dev)
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return ENXIO;
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switch (ctlr->chip->cfg1) {
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case SIIPRBIO:
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ctlr->r_type1 = SYS_RES_MEMORY;
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ctlr->r_rid1 = PCIR_BAR(0);
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if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1,
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&ctlr->r_rid1, RF_ACTIVE)))
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return ENXIO;
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ctlr->r_rid2 = PCIR_BAR(2);
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ctlr->r_type2 = SYS_RES_MEMORY;
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if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
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&ctlr->r_rid2, RF_ACTIVE))){
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bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1,ctlr->r_res1);
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return ENXIO;
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}
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ctlr->allocate = ata_siiprb_allocate;
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ctlr->reset = ata_siiprb_reset;
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ctlr->dmainit = ata_siiprb_dmainit;
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ctlr->setmode = ata_sata_setmode;
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ctlr->channels = (ctlr->chip->cfg2 == SII4CH) ? 4 : 2;
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/* reset controller */
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ATA_OUTL(ctlr->r_res1, 0x0040, 0x80000000);
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DELAY(10000);
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ATA_OUTL(ctlr->r_res1, 0x0040, 0x0000000f);
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/* enable PCI interrupt */
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pci_write_config(dev, PCIR_COMMAND,
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pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
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break;
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case SIIMEMIO:
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ctlr->r_type2 = SYS_RES_MEMORY;
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ctlr->r_rid2 = PCIR_BAR(5);
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@ -4388,13 +4423,10 @@ ata_sii_status(device_t dev)
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int offset0 = ((ch->unit & 1) << 3) + ((ch->unit & 2) << 8);
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int offset1 = ((ch->unit & 1) << 6) + ((ch->unit & 2) << 8);
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/* check for PHY related interrupts on SATA capable HW */
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/* do we have any PHY events ? */
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if (ctlr->chip->max_dma >= ATA_SA150 &&
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(ATA_INL(ctlr->r_res2, 0x10 + offset0) & 0x00000010)) {
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/* do we have any PHY events ? */
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(ATA_INL(ctlr->r_res2, 0x10 + offset0) & 0x00000010))
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ata_sata_phy_check_events(dev);
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}
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if (ATA_INL(ctlr->r_res2, 0xa0 + offset1) & 0x00000800)
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return ata_pci_status(dev);
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@ -4475,6 +4507,307 @@ ata_sii_setmode(device_t dev, int mode)
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}
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struct ata_siiprb_dma_prdentry {
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u_int64_t addr;
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u_int32_t count;
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u_int32_t control;
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} __packed;
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struct ata_siiprb_ata_command {
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u_int32_t reserved0;
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struct ata_siiprb_dma_prdentry prd[126];
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} __packed;
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struct ata_siiprb_atapi_command {
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u_int8_t cdb[16];
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struct ata_siiprb_dma_prdentry prd[125];
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} __packed;
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struct ata_siiprb_command {
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u_int16_t control;
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u_int16_t protocol_override;
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u_int32_t transfer_count;
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u_int8_t fis[20];
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union {
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struct ata_siiprb_ata_command ata;
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struct ata_siiprb_atapi_command atapi;
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} u;
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} __packed;
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static int
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ata_siiprb_allocate(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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int offset = ch->unit * 0x2000;
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/* set the SATA resources */
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ch->r_io[ATA_SSTATUS].res = ctlr->r_res2;
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ch->r_io[ATA_SSTATUS].offset = 0x1f04 + offset;
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ch->r_io[ATA_SERROR].res = ctlr->r_res2;
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ch->r_io[ATA_SERROR].offset = 0x1f08 + offset;
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ch->r_io[ATA_SCONTROL].res = ctlr->r_res2;
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ch->r_io[ATA_SCONTROL].offset = 0x1f00 + offset;
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ch->r_io[ATA_SACTIVE].res = ctlr->r_res2;
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ch->r_io[ATA_SACTIVE].offset = 0x1f0c + offset;
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ch->hw.begin_transaction = ata_siiprb_begin_transaction;
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ch->hw.end_transaction = ata_siiprb_end_transaction;
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ch->hw.status = ata_siiprb_status;
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ch->hw.command = NULL; /* not used here */
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return 0;
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}
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static int
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ata_siiprb_status(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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int offset = ch->unit * 0x2000;
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if ((ATA_INL(ctlr->r_res1, 0x0044) & (1 << ch->unit))) {
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u_int32_t istatus = ATA_INL(ctlr->r_res2, 0x1008 + offset);
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/* do we have any PHY events ? */
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ata_sata_phy_check_events(dev);
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/* clear interrupt(s) */
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ATA_OUTL(ctlr->r_res2, 0x1008 + offset, istatus);
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/* do we have any device action ? */
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return (istatus & 0x00000001);
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}
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return 0;
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}
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static int
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ata_siiprb_begin_transaction(struct ata_request *request)
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{
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struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
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struct ata_siiprb_command *prb;
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int offset = ch->unit * 0x2000;
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u_int64_t prb_bus;
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int tag = 0, dummy;
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/* check for 48 bit access and convert if needed */
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ata_modify_if_48bit(request);
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/* get a piece of the workspace for this request */
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prb = (struct ata_siiprb_command *)
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(ch->dma->work + (sizeof(struct ata_siiprb_command) * tag));
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/* set basic prd options ata/atapi etc etc */
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bzero(prb, sizeof(struct ata_siiprb_command));
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/* setup the FIS for this request */
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if (!ata_request2fis_h2d(request, &prb->fis[0])) {
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device_printf(request->dev, "setting up SATA FIS failed\n");
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request->result = EIO;
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return ATA_OP_FINISHED;
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}
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/* if request moves data setup and load SG list */
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if (request->flags & (ATA_R_READ | ATA_R_WRITE)) {
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struct ata_siiprb_dma_prdentry *prd;
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if (request->flags & ATA_R_ATAPI)
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prd = &prb->u.atapi.prd[0];
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else
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prd = &prb->u.ata.prd[0];
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if (ch->dma->load(ch->dev, request->data, request->bytecount,
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request->flags & ATA_R_READ, prd, &dummy)) {
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device_printf(request->dev, "setting up DMA failed\n");
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request->result = EIO;
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return ATA_OP_FINISHED;
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}
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}
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/* activate the prb */
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prb_bus = ch->dma->work_bus + (sizeof(struct ata_siiprb_command) * tag);
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ATA_OUTL(ctlr->r_res2,
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0x1c00 + offset + (tag * sizeof(u_int64_t)), prb_bus);
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ATA_OUTL(ctlr->r_res2,
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0x1c04 + offset + (tag * sizeof(u_int64_t)), prb_bus>>32);
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/* start the timeout */
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callout_reset(&request->callout, request->timeout * hz,
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(timeout_t*)ata_timeout, request);
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return ATA_OP_CONTINUES;
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}
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static int
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ata_siiprb_end_transaction(struct ata_request *request)
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{
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struct ata_pci_controller *ctlr=device_get_softc(GRANDPARENT(request->dev));
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struct ata_channel *ch = device_get_softc(device_get_parent(request->dev));
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struct ata_siiprb_command *prb;
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int offset = ch->unit * 0x2000;
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int error, tag = 0;
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/* kill the timeout */
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callout_stop(&request->callout);
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prb = (struct ata_siiprb_command *)
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((u_int8_t *)rman_get_virtual(ctlr->r_res2) + (tag << 7) + offset);
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/* if error status get details */
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request->status = prb->fis[2];
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if (request->status & ATA_S_ERROR)
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request->error = prb->fis[3];
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/* update progress */
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if (!(request->status & ATA_S_ERROR) && !(request->flags & ATA_R_TIMEOUT))
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request->donecount = prb->transfer_count;
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/* any controller errors flagged ? */
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if ((error = ATA_INL(ctlr->r_res2, 0x1024 + offset))) {
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printf("ata_siiprb_end_transaction %s error=%08x\n",
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ata_cmd2str(request), error);
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}
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/* release SG list etc */
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ch->dma->unload(ch->dev);
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return ATA_OP_FINISHED;
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}
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static void
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ata_siiprb_reset(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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int offset = ch->unit * 0x2000;
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struct ata_siiprb_command *prb;
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u_int64_t prb_bus;
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u_int32_t status, signature;
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int timeout, tag = 0;
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/* reset channel HW */
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ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000001);
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DELAY(1000);
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ATA_OUTL(ctlr->r_res2, 0x1004 + offset, 0x00000001);
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DELAY(10000);
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/* poll for channel ready */
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for (timeout = 0; timeout < 1000; timeout++) {
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if ((status = ATA_INL(ctlr->r_res2, 0x1000 + offset)) & 0x00040000)
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break;
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DELAY(1000);
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}
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if (timeout >= 1000) {
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device_printf(ch->dev, "channel HW reset timeout reset failure\n");
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ch->devices = 0;
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goto finish;
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}
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if (bootverbose)
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device_printf(ch->dev, "channel HW reset time=%dms\n", timeout * 1);
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/* reset phy */
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if (!ata_sata_phy_reset(dev)) {
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if (bootverbose)
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device_printf(ch->dev, "phy reset found no device\n");
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ch->devices = 0;
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goto finish;
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}
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/* get a piece of the workspace for a soft reset request */
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prb = (struct ata_siiprb_command *)
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(ch->dma->work + (sizeof(struct ata_siiprb_command) * tag));
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bzero(prb, sizeof(struct ata_siiprb_command));
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prb->control = htole16(0x0080);
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/* activate the soft reset prb */
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prb_bus = ch->dma->work_bus + (sizeof(struct ata_siiprb_command) * tag);
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ATA_OUTL(ctlr->r_res2,
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0x1c00 + offset + (tag * sizeof(u_int64_t)), prb_bus);
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ATA_OUTL(ctlr->r_res2,
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0x1c04 + offset + (tag * sizeof(u_int64_t)), prb_bus>>32);
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/* poll for channel ready */
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for (timeout = 0; timeout < 1000; timeout++) {
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DELAY(1000);
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if ((status = ATA_INL(ctlr->r_res2, 0x1008 + offset)) & 0x00010000)
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break;
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}
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if (timeout >= 1000) {
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device_printf(ch->dev, "reset timeout - no device found\n");
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ch->devices = 0;
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goto finish;
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}
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if (bootverbose)
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device_printf(ch->dev, "soft reset exec time=%dms status=%08x\n",
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timeout, status);
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/* find out whats there */
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prb = (struct ata_siiprb_command *)
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((u_int8_t *)rman_get_virtual(ctlr->r_res2) + (tag << 7) + offset);
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signature =
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prb->fis[12]|(prb->fis[4]<<8)|(prb->fis[5]<<16)|(prb->fis[6]<<24);
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if (bootverbose)
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device_printf(ch->dev, "signature=%08x\n", signature);
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switch (signature) {
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case 0xeb140101:
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ch->devices = ATA_ATAPI_MASTER;
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device_printf(ch->dev, "SATA ATAPI devices not supported yet\n");
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ch->devices = 0;
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break;
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case 0x96690101:
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ch->devices = ATA_PORTMULTIPLIER;
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device_printf(ch->dev, "Portmultipliers not supported yet\n");
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ch->devices = 0;
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break;
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case 0x00000101:
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ch->devices = ATA_ATA_MASTER;
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break;
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default:
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ch->devices = 0;
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}
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finish:
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/* clear interrupt(s) */
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ATA_OUTL(ctlr->r_res2, 0x1008 + offset, 0x000008ff);
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/* require explicit interrupt ack */
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ATA_OUTL(ctlr->r_res2, 0x1000 + offset, 0x00000008);
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/* 64bit mode */
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ATA_OUTL(ctlr->r_res2, 0x1004 + offset, 0x00000400);
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/* enable interrupts wanted */
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ATA_OUTL(ctlr->r_res2, 0x1010 + offset, 0x000000ff);
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}
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static void
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ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct ata_dmasetprd_args *args = xsc;
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struct ata_siiprb_dma_prdentry *prd = args->dmatab;
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int i;
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if ((args->error = error))
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return;
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for (i = 0; i < nsegs; i++) {
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prd[i].addr = htole64(segs[i].ds_addr);
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prd[i].count = htole32(segs[i].ds_len);
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}
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prd[i - 1].control = htole32(ATA_DMA_EOT);
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}
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static void
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ata_siiprb_dmainit(device_t dev)
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{
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struct ata_channel *ch = device_get_softc(dev);
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ata_dmainit(dev);
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if (ch->dma) {
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/* note start and stop are not used here */
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ch->dma->setprd = ata_siiprb_dmasetprd;
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}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Silicon Integrated Systems Corp. (SiS) chipset support functions
|
||||
*/
|
||||
|
||||
@ -281,6 +281,8 @@ struct ata_connect_task {
|
||||
#define ATA_SII3512 0x35121095
|
||||
#define ATA_SII3112 0x31121095
|
||||
#define ATA_SII3112_1 0x02401095
|
||||
#define ATA_SII3124 0x31241095
|
||||
#define ATA_SII3132 0x31321095
|
||||
#define ATA_SII0680 0x06801095
|
||||
#define ATA_CMD646 0x06461095
|
||||
#define ATA_CMD648 0x06481095
|
||||
@ -393,6 +395,7 @@ struct ata_connect_task {
|
||||
#define SWKSMIO 3
|
||||
|
||||
#define SIIMEMIO 1
|
||||
#define SIIPRBIO 2
|
||||
#define SIIINTR 0x01
|
||||
#define SIISETCLK 0x02
|
||||
#define SIIBUG 0x04
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user