Add driver for Display Control Unit (DCU4).
This commit is contained in:
Ruslan Bukin
parent
63281952f0
commit
bb8bc226d3
@ -137,3 +137,10 @@ device axe # ASIX Electronics USB Ethernet
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device bpf # Berkeley packet filter
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device sound
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# Framebuffer
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device vt
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device kbdmux
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options SC_DFLT_FONT # compile font in
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makeoptions SC_DFLT_FONT=cp437
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device ukbd
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@ -21,6 +21,8 @@ arm/freescale/vybrid/vf_anadig.c standard
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arm/freescale/vybrid/vf_iomuxc.c standard
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arm/freescale/vybrid/vf_mscm.c standard
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arm/freescale/vybrid/vf_src.c standard
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arm/freescale/vybrid/vf_tcon.c optional vt
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arm/freescale/vybrid/vf_dcu4.c optional vt
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arm/freescale/vybrid/vf_nfc.c optional nand
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arm/freescale/vybrid/vf_ehci.c optional ehci
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arm/freescale/vybrid/vf_gpio.c optional gpio
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359
sys/arm/freescale/vybrid/vf_dcu4.c
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359
sys/arm/freescale/vybrid/vf_dcu4.c
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@ -0,0 +1,359 @@
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/*-
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Vybrid Family Display Control Unit (DCU4)
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* Chapter 55, Vybrid Reference Manual, Rev. 5, 07/2013
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <sys/fbio.h>
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#include <sys/consio.h>
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#include <sys/eventhandler.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/vt/vt.h>
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#include <dev/vt/colors/vt_termcolors.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include "fb_if.h"
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#include <arm/freescale/vybrid/vf_common.h>
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#define DCU_CTRLDESCCURSOR1 0x000 /* Control Descriptor Cursor 1 */
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#define DCU_CTRLDESCCURSOR2 0x004 /* Control Descriptor Cursor 2 */
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#define DCU_CTRLDESCCURSOR3 0x008 /* Control Descriptor Cursor 3 */
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#define DCU_CTRLDESCCURSOR4 0x00C /* Control Descriptor Cursor 4 */
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#define DCU_DCU_MODE 0x010 /* DCU4 Mode */
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#define DCU_MODE_M 0x3
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#define DCU_MODE_S 0
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#define DCU_MODE_NORMAL 0x1
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#define DCU_MODE_TEST 0x2
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#define DCU_MODE_COLBAR 0x3
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#define RASTER_EN (1 << 14) /* Raster scan of pixel data */
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#define DCU_BGND 0x014 /* Background */
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#define DCU_DISP_SIZE 0x018 /* Display Size */
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#define DELTA_M 0x7ff
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#define DELTA_Y_S 16
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#define DELTA_X_S 0
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#define DCU_HSYN_PARA 0x01C /* Horizontal Sync Parameter */
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#define BP_H_SHIFT 22
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#define PW_H_SHIFT 11
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#define FP_H_SHIFT 0
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#define DCU_VSYN_PARA 0x020 /* Vertical Sync Parameter */
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#define BP_V_SHIFT 22
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#define PW_V_SHIFT 11
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#define FP_V_SHIFT 0
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#define DCU_SYNPOL 0x024 /* Synchronize Polarity */
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#define INV_HS (1 << 0)
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#define INV_VS (1 << 1)
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#define DCU_THRESHOLD 0x028 /* Threshold */
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#define LS_BF_VS_SHIFT 16
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#define OUT_BUF_HIGH_SHIFT 8
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#define OUT_BUF_LOW_SHIFT 0
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#define DCU_INT_STATUS 0x02C /* Interrupt Status */
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#define DCU_INT_MASK 0x030 /* Interrupt Mask */
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#define DCU_COLBAR_1 0x034 /* COLBAR_1 */
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#define DCU_COLBAR_2 0x038 /* COLBAR_2 */
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#define DCU_COLBAR_3 0x03C /* COLBAR_3 */
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#define DCU_COLBAR_4 0x040 /* COLBAR_4 */
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#define DCU_COLBAR_5 0x044 /* COLBAR_5 */
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#define DCU_COLBAR_6 0x048 /* COLBAR_6 */
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#define DCU_COLBAR_7 0x04C /* COLBAR_7 */
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#define DCU_COLBAR_8 0x050 /* COLBAR_8 */
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#define DCU_DIV_RATIO 0x054 /* Divide Ratio */
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#define DCU_SIGN_CALC_1 0x058 /* Sign Calculation 1 */
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#define DCU_SIGN_CALC_2 0x05C /* Sign Calculation 2 */
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#define DCU_CRC_VAL 0x060 /* CRC Value */
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#define DCU_PDI_STATUS 0x064 /* PDI Status */
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#define DCU_PDI_STA_MSK 0x068 /* PDI Status Mask */
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#define DCU_PARR_ERR_STATUS1 0x06C /* Parameter Error Status 1 */
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#define DCU_PARR_ERR_STATUS2 0x070 /* Parameter Error Status 2 */
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#define DCU_PARR_ERR_STATUS3 0x07C /* Parameter Error Status 3 */
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#define DCU_MASK_PARR_ERR_ST1 0x080 /* Mask Parameter Error Status 1 */
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#define DCU_MASK_PARR_ERR_ST2 0x084 /* Mask Parameter Error Status 2 */
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#define DCU_MASK_PARR_ERR_ST3 0x090 /* Mask Parameter Error Status 3 */
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#define DCU_THRESHOLD_INP_BUF_1 0x094 /* Threshold Input 1 */
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#define DCU_THRESHOLD_INP_BUF_2 0x098 /* Threshold Input 2 */
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#define DCU_THRESHOLD_INP_BUF_3 0x09C /* Threshold Input 3 */
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#define DCU_LUMA_COMP 0x0A0 /* LUMA Component */
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#define DCU_CHROMA_RED 0x0A4 /* Red Chroma Components */
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#define DCU_CHROMA_GREEN 0x0A8 /* Green Chroma Components */
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#define DCU_CHROMA_BLUE 0x0AC /* Blue Chroma Components */
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#define DCU_CRC_POS 0x0B0 /* CRC Position */
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#define DCU_LYR_INTPOL_EN 0x0B4 /* Layer Interpolation Enable */
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#define DCU_LYR_LUMA_COMP 0x0B8 /* Layer Luminance Component */
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#define DCU_LYR_CHRM_RED 0x0BC /* Layer Chroma Red */
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#define DCU_LYR_CHRM_GRN 0x0C0 /* Layer Chroma Green */
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#define DCU_LYR_CHRM_BLUE 0x0C4 /* Layer Chroma Blue */
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#define DCU_COMP_IMSIZE 0x0C8 /* Compression Image Size */
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#define DCU_UPDATE_MODE 0x0CC /* Update Mode */
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#define READREG (1 << 30)
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#define MODE (1 << 31)
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#define DCU_UNDERRUN 0x0D0 /* Underrun */
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#define DCU_GLBL_PROTECT 0x100 /* Global Protection */
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#define DCU_SFT_LCK_BIT_L0 0x104 /* Soft Lock Bit Layer 0 */
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#define DCU_SFT_LCK_BIT_L1 0x108 /* Soft Lock Bit Layer 1 */
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#define DCU_SFT_LCK_DISP_SIZE 0x10C /* Soft Lock Display Size */
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#define DCU_SFT_LCK_HS_VS_PARA 0x110 /* Soft Lock Hsync/Vsync Parameter */
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#define DCU_SFT_LCK_POL 0x114 /* Soft Lock POL */
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#define DCU_SFT_LCK_L0_TRANSP 0x118 /* Soft Lock L0 Transparency */
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#define DCU_SFT_LCK_L1_TRANSP 0x11C /* Soft Lock L1 Transparency */
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/* Control Descriptor */
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#define DCU_CTRLDESCL(n, m) 0x200 + (0x40 * n) + 0x4 * (m - 1)
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#define DCU_CTRLDESCLn_1(n) DCU_CTRLDESCL(n, 1)
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#define DCU_CTRLDESCLn_2(n) DCU_CTRLDESCL(n, 2)
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#define DCU_CTRLDESCLn_3(n) DCU_CTRLDESCL(n, 3)
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#define TRANS_SHIFT 20
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#define DCU_CTRLDESCLn_4(n) DCU_CTRLDESCL(n, 4)
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#define BPP_MASK 0xf /* Bit per pixel Mask */
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#define BPP_SHIFT 16 /* Bit per pixel Shift */
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#define BPP24 0x5
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#define EN_LAYER (1 << 31) /* Enable the layer */
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#define DCU_CTRLDESCLn_5(n) DCU_CTRLDESCL(n, 5)
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#define DCU_CTRLDESCLn_6(n) DCU_CTRLDESCL(n, 6)
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#define DCU_CTRLDESCLn_7(n) DCU_CTRLDESCL(n, 7)
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#define DCU_CTRLDESCLn_8(n) DCU_CTRLDESCL(n, 8)
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#define DCU_CTRLDESCLn_9(n) DCU_CTRLDESCL(n, 9)
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#define DISPLAY_WIDTH 480
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#define DISPLAY_HEIGHT 272
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struct dcu_softc {
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struct resource *res[2];
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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void *ih;
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device_t dev;
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device_t sc_fbd; /* fbd child */
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struct fb_info sc_info;
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};
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static struct resource_spec dcu_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static int
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dcu_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,mvf600-dcu4"))
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return (ENXIO);
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device_set_desc(dev, "Vybrid Family Display Control Unit (DCU4)");
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return (BUS_PROBE_DEFAULT);
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}
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static void
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dcu_intr(void *arg)
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{
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struct dcu_softc *sc;
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int reg;
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sc = arg;
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/* Ack interrupts */
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reg = READ4(sc, DCU_INT_STATUS);
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WRITE4(sc, DCU_INT_STATUS, reg);
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/* TODO interrupt handler */
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}
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static int
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dcu_init(struct dcu_softc *sc)
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{
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int reg;
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/* Configure DCU */
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reg = ((sc->sc_info.fb_height) << DELTA_Y_S);
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reg |= (sc->sc_info.fb_width / 16);
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WRITE4(sc, DCU_DISP_SIZE, reg);
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/* TODO: export panel info to FDT */
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reg = (2 << BP_H_SHIFT);
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reg |= (41 << PW_H_SHIFT);
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reg |= (2 << FP_H_SHIFT);
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WRITE4(sc, DCU_HSYN_PARA, reg);
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reg = (2 << BP_V_SHIFT);
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reg |= (10 << PW_V_SHIFT);
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reg |= (2 << FP_V_SHIFT);
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WRITE4(sc, DCU_VSYN_PARA, reg);
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WRITE4(sc, DCU_BGND, 0);
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WRITE4(sc, DCU_DIV_RATIO, 30);
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reg = (INV_VS | INV_HS);
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WRITE4(sc, DCU_SYNPOL, reg);
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reg = (0x3 << LS_BF_VS_SHIFT);
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reg |= (0x78 << OUT_BUF_HIGH_SHIFT);
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reg |= (0 << OUT_BUF_LOW_SHIFT);
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WRITE4(sc, DCU_THRESHOLD, reg);
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/* Mask all the interrupts */
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WRITE4(sc, DCU_INT_MASK, 0xffffffff);
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/* Setup first layer */
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reg = (sc->sc_info.fb_width | (sc->sc_info.fb_height << 16));
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WRITE4(sc, DCU_CTRLDESCLn_1(0), reg);
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WRITE4(sc, DCU_CTRLDESCLn_2(0), 0x0);
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WRITE4(sc, DCU_CTRLDESCLn_3(0), sc->sc_info.fb_pbase);
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reg = (BPP24 << BPP_SHIFT);
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reg |= EN_LAYER;
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reg |= (0xFF << TRANS_SHIFT); /* completely opaque */
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WRITE4(sc, DCU_CTRLDESCLn_4(0), reg);
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WRITE4(sc, DCU_CTRLDESCLn_5(0), 0xffffff);
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WRITE4(sc, DCU_CTRLDESCLn_6(0), 0x0);
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WRITE4(sc, DCU_CTRLDESCLn_7(0), 0x0);
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WRITE4(sc, DCU_CTRLDESCLn_8(0), 0x0);
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WRITE4(sc, DCU_CTRLDESCLn_9(0), 0x0);
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/* Enable DCU in normal mode */
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reg = READ4(sc, DCU_DCU_MODE);
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reg &= ~(DCU_MODE_M << DCU_MODE_S);
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reg |= (DCU_MODE_NORMAL << DCU_MODE_S);
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reg |= (RASTER_EN);
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WRITE4(sc, DCU_DCU_MODE, reg);
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WRITE4(sc, DCU_UPDATE_MODE, READREG);
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return (0);
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}
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static int
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dcu_attach(device_t dev)
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{
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struct dcu_softc *sc;
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int err;
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sc = device_get_softc(dev);
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if (bus_alloc_resources(dev, dcu_spec, sc->res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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/* Memory interface */
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sc->bst = rman_get_bustag(sc->res[0]);
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sc->bsh = rman_get_bushandle(sc->res[0]);
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/* Setup interrupt handler */
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err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, dcu_intr, sc, &sc->ih);
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if (err) {
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device_printf(dev, "Unable to alloc interrupt resource.\n");
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return (ENXIO);
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}
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/* Bypass timing control (used for raw lcd panels) */
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tcon_bypass();
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sc->sc_info.fb_width = DISPLAY_WIDTH;
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sc->sc_info.fb_height = DISPLAY_HEIGHT;
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sc->sc_info.fb_stride = sc->sc_info.fb_width * 3;
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sc->sc_info.fb_bpp = sc->sc_info.fb_depth = 24;
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sc->sc_info.fb_size = sc->sc_info.fb_height * sc->sc_info.fb_stride;
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sc->sc_info.fb_vbase = (intptr_t)contigmalloc(sc->sc_info.fb_size,
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M_DEVBUF, M_ZERO, 0, ~0, PAGE_SIZE, 0);
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sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase);
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#if 0
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printf("%dx%d [%d]\n", sc->sc_info.fb_width, sc->sc_info.fb_height,
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sc->sc_info.fb_stride);
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printf("pbase == 0x%08x\n", sc->sc_info.fb_pbase);
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#endif
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memset((int8_t *)sc->sc_info.fb_vbase, 0x0, sc->sc_info.fb_size);
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dcu_init(sc);
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sc->sc_info.fb_name = device_get_nameunit(dev);
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/* Ask newbus to attach framebuffer device to me. */
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sc->sc_fbd = device_add_child(dev, "fbd", device_get_unit(dev));
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if (sc->sc_fbd == NULL)
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device_printf(dev, "Can't attach fbd device\n");
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if (device_probe_and_attach(sc->sc_fbd) != 0) {
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device_printf(sc->dev, "Failed to attach fbd device\n");
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}
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return (0);
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}
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static struct fb_info *
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dcu4_fb_getinfo(device_t dev)
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{
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struct dcu_softc *sc = device_get_softc(dev);
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return (&sc->sc_info);
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}
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static device_method_t dcu_methods[] = {
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DEVMETHOD(device_probe, dcu_probe),
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DEVMETHOD(device_attach, dcu_attach),
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/* Framebuffer service methods */
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DEVMETHOD(fb_getinfo, dcu4_fb_getinfo),
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{ 0, 0 }
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};
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static driver_t dcu_driver = {
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"fb",
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dcu_methods,
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sizeof(struct dcu_softc),
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};
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static devclass_t dcu_devclass;
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DRIVER_MODULE(fb, simplebus, dcu_driver, dcu_devclass, 0, 0);
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137
sys/arm/freescale/vybrid/vf_tcon.c
Normal file
137
sys/arm/freescale/vybrid/vf_tcon.c
Normal file
@ -0,0 +1,137 @@
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/*-
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Vybrid Family Timing Controller (TCON)
|
||||
* Chapter 58, Vybrid Reference Manual, Rev. 5, 07/2013
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/rman.h>
|
||||
#include <sys/timeet.h>
|
||||
#include <sys/timetc.h>
|
||||
#include <sys/watchdog.h>
|
||||
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/openfirm.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/fdt.h>
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/intr.h>
|
||||
|
||||
#include <arm/freescale/vybrid/vf_common.h>
|
||||
|
||||
#define TCON0_CTRL1 0x00
|
||||
|
||||
struct tcon_softc {
|
||||
struct resource *res[1];
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
};
|
||||
|
||||
struct tcon_softc *tcon_sc;
|
||||
|
||||
static struct resource_spec tcon_spec[] = {
|
||||
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
|
||||
{ -1, 0 }
|
||||
};
|
||||
|
||||
uint32_t
|
||||
tcon_bypass(void)
|
||||
{
|
||||
struct tcon_softc *sc;
|
||||
|
||||
if (tcon_sc == NULL)
|
||||
return (1);
|
||||
|
||||
sc = tcon_sc;
|
||||
|
||||
WRITE4(tcon_sc, TCON0_CTRL1, (1 << 29));
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
tcon_probe(device_t dev)
|
||||
{
|
||||
|
||||
if (!ofw_bus_status_okay(dev))
|
||||
return (ENXIO);
|
||||
|
||||
if (!ofw_bus_is_compatible(dev, "fsl,mvf600-tcon"))
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "Vybrid Family Timing Controller (TCON)");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
static int
|
||||
tcon_attach(device_t dev)
|
||||
{
|
||||
struct tcon_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
if (bus_alloc_resources(dev, tcon_spec, sc->res)) {
|
||||
device_printf(dev, "could not allocate resources\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
/* Memory interface */
|
||||
sc->bst = rman_get_bustag(sc->res[0]);
|
||||
sc->bsh = rman_get_bushandle(sc->res[0]);
|
||||
|
||||
tcon_sc = sc;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t tcon_methods[] = {
|
||||
DEVMETHOD(device_probe, tcon_probe),
|
||||
DEVMETHOD(device_attach, tcon_attach),
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t tcon_driver = {
|
||||
"tcon",
|
||||
tcon_methods,
|
||||
sizeof(struct tcon_softc),
|
||||
};
|
||||
|
||||
static devclass_t tcon_devclass;
|
||||
|
||||
DRIVER_MODULE(tcon, simplebus, tcon_driver, tcon_devclass, 0, 0);
|
||||
Loading…
Reference in New Issue
Block a user