diff --git a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
index 1fdece7eb8dc..7e1ad1988ebb 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
@@ -91,7 +91,7 @@ __FBSDID("$FreeBSD$");
  * HS mode still can be enabled with the tunable.
  */
 static int bcm2835_sdhci_min_freq = 400000;
-static int bcm2835_sdhci_hs = 0;
+static int bcm2835_sdhci_hs = 1;
 static int bcm2835_sdhci_pio_mode = 0;
 
 TUNABLE_INT("hw.bcm2835.sdhci.min_freq", &bcm2835_sdhci_min_freq);
@@ -235,6 +235,7 @@ bcm_sdhci_attach(device_t dev)
 	sc->sc_slot.caps |= (default_freq << SDHCI_CLOCK_BASE_SHIFT);
 	sc->sc_slot.quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK 
 		| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
+		| SDHCI_QUIRK_DONT_SET_HISPD_BIT
 		| SDHCI_QUIRK_MISSING_CAPS;
  
 	sdhci_init_slot(dev, &sc->sc_slot, 0);
diff --git a/sys/dev/sdhci/sdhci.c b/sys/dev/sdhci/sdhci.c
index 272a8f4ed03c..03bbeffa3f7e 100644
--- a/sys/dev/sdhci/sdhci.c
+++ b/sys/dev/sdhci/sdhci.c
@@ -696,7 +696,8 @@ sdhci_generic_update_ios(device_t brdev, device_t reqdev)
 		slot->hostctrl |= SDHCI_CTRL_4BITBUS;
 	else
 		slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
-	if (ios->timing == bus_timing_hs)
+	if (ios->timing == bus_timing_hs && 
+	    !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
 		slot->hostctrl |= SDHCI_CTRL_HISPD;
 	else
 		slot->hostctrl &= ~SDHCI_CTRL_HISPD;
diff --git a/sys/dev/sdhci/sdhci.h b/sys/dev/sdhci/sdhci.h
index 80479b76b868..b7d196039d0f 100644
--- a/sys/dev/sdhci/sdhci.h
+++ b/sys/dev/sdhci/sdhci.h
@@ -61,6 +61,8 @@
 #define	SDHCI_QUIRK_DONT_SHIFT_RESPONSE			(1<<13)
 /* Wait to see reset bit asserted before waiting for de-asserted  */
 #define	SDHCI_QUIRK_WAITFOR_RESET_ASSERTED		(1<<14)
+/* Leave controller in standard mode when putting card in HS mode. */
+#define	SDHCI_QUIRK_DONT_SET_HISPD_BIT			(1<<15)
 
 /*
  * Controller registers