Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.
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c97492d0e0
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@ -153,22 +153,27 @@ Lunmapped:
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ldr r2, =(KERNVIRTADDR - KERNPHYSADDR)
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sub r0, r1, r2
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adr r4, mmu_init_table
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b 3f
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/*
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* Map PA == VA
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*/
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ldr r5, =(PHYSADDR)
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mov r1, r5
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mov r2, r5
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/* Map 64MiB, preserved over calls to build_pagetables */
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mov r3, #64
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bl build_pagetables
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2:
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str r3, [r0, r2]
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add r2, r2, #4
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add r3, r3, #(L1_S_SIZE)
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adds r1, r1, #-1
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bhi 2b
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3:
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ldmia r4!, {r1,r2,r3} /* # of sections, VA, PA|attr */
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cmp r1, #0
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adrne r5, 2b
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bicne r5, r5, #0xf0000000
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orrne r5, r5, #PHYSADDR
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movne pc, r5
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/* Create the kernel map to jump to */
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mov r1, r5
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ldr r2, =(KERNBASE)
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bl build_pagetables
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#if defined(SOCDEV_PA) && defined(SOCDEV_VA)
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/* Create the custom map */
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ldr r1, =SOCDEV_VA
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ldr r2, =SOCDEV_PA
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bl build_pagetables
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#endif
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#if defined(SMP)
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orr r0, r0, #2 /* Set TTB shared memory flag */
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@ -238,6 +243,40 @@ virt_done:
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adr r0, .Lmainreturned
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b _C_LABEL(panic)
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/* NOTREACHED */
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END(btext)
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END(_start)
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/*
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* Builds the page table
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* r0 - The table base address
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* r1 - The physical address (trashed)
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* r2 - The virtual address (trashed)
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* r3 - The number of 1MiB sections
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* r4 - Trashed
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*
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* Addresses must be 1MiB aligned
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*/
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build_pagetables:
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/* Set the required page attributed */
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ldr r4, =(L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
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#if defined(SMP)
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orr r4, #(L1_SHARED)
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#endif
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orr r1, r4
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/* Move the virtual address to the correct bit location */
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lsr r2, #(L1_S_SHIFT - 2)
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mov r4, r3
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1:
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str r1, [r0, r2]
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add r2, r2, #4
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add r1, r1, #(L1_S_SIZE)
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adds r4, r4, #-1
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bhi 1b
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RET
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#define MMU_INIT(va,pa,n_sec,attr) \
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.word n_sec ; \
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.word 4*((va)>>L1_S_SHIFT) ; \
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@ -257,27 +296,7 @@ Lstartup_pagetable:
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Lstartup_pagetable_secondary:
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.word temp_pagetable
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#endif
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END(btext)
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END(_start)
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mmu_init_table:
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/* fill all table VA==PA */
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/* map SDRAM VA==PA, WT cacheable */
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#if !defined(SMP)
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MMU_INIT(PHYSADDR, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
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/* map VA 0xc0000000..0xc3ffffff to PA */
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MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
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#if defined(SOCDEV_PA) && defined(SOCDEV_VA)
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/* Map in 0x04000000 worth of the SoC's devices for bootstrap debugging */
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MMU_INIT(SOCDEV_VA, SOCDEV_PA, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
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#endif
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#else
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MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
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/* map VA 0xc0000000..0xc3ffffff to PA */
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MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
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MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
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#endif /* SMP */
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.word 0 /* end of table */
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.Lstart:
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.word _edata
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.word _ebss
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