Add more bit definitions to PCI express device control and device

status register.

Reviewed by:	jhb
This commit is contained in:
Pyun YongHyeon 2010-02-01 20:50:49 +00:00
parent 29e1e1a3a7
commit bde52fe26d

View File

@ -605,9 +605,17 @@
#define PCIR_EXPRESS_DEVICE_CAP 0x4
#define PCIM_EXP_CAP_MAX_PAYLOAD 0x0007
#define PCIR_EXPRESS_DEVICE_CTL 0x8
#define PCIM_EXP_CTL_RELAXED_ORD_ENABLE 0x0010
#define PCIM_EXP_CTL_MAX_PAYLOAD 0x00e0
#define PCIM_EXP_CTL_NOSNOOP_ENABLE 0x0800
#define PCIM_EXP_CTL_MAX_READ_REQUEST 0x7000
#define PCIR_EXPRESS_DEVICE_STA 0xa
#define PCIM_EXP_STA_CORRECTABLE_ERROR 0x0001
#define PCIM_EXP_STA_NON_FATAL_ERROR 0x0002
#define PCIM_EXP_STA_FATAL_ERROR 0x0004
#define PCIM_EXP_STA_UNSUPPORTED_REQ 0x0008
#define PCIM_EXP_STA_AUX_POWER 0x0010
#define PCIM_EXP_STA_TRANSACTION_PND 0x0020
#define PCIR_EXPRESS_LINK_CAP 0xc
#define PCIM_LINK_CAP_MAX_SPEED 0x0000000f
#define PCIM_LINK_CAP_MAX_WIDTH 0x000003f0