Process one NMI interrupt per handler invocation as the processor
'buffers' pending NMIs from multiple interrupting PMCs and delivers them serially. Reported by: Olivier Crameri <olivier.crameri@epfl.ch> MFC after: 3 days
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@ -693,9 +693,14 @@ amd_intr(int cpu, uintptr_t eip, int usermode)
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* and which has a valid 'struct pmc' association
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*
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* If found, we call a helper to process the interrupt.
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*
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* If multiple PMCs interrupt at the same time, the AMD64
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* processor appears to deliver as many NMIs as there are
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* outstanding PMC interrupts. Thus we need to only process
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* one interrupt at a time.
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*/
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for (i = 0; i < AMD_NPMCS-1; i++) {
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for (i = 0; retval == 0 && i < AMD_NPMCS-1; i++) {
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ri = i + 1; /* row index; TSC is at ri == 0 */
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@ -712,6 +717,8 @@ amd_intr(int cpu, uintptr_t eip, int usermode)
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continue;
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}
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retval = 1; /* found an interrupting PMC */
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/* stop the PMC, reload count */
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evsel = AMD_PMC_EVSEL_0 + i;
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perfctr = AMD_PMC_PERFCTR_0 + i;
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@ -726,12 +733,10 @@ amd_intr(int cpu, uintptr_t eip, int usermode)
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wrmsr(evsel, config & ~AMD_PMC_ENABLE);
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wrmsr(perfctr, AMD_RELOAD_COUNT_TO_PERFCTR_VALUE(v));
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/* restart if there was no error during logging */
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/* restart the counter if there was no error during logging */
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error = pmc_process_interrupt(cpu, pm, eip, usermode);
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if (error == 0)
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wrmsr(evsel, config | AMD_PMC_ENABLE);
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retval = 1; /* found an interrupting PMC */
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}
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atomic_add_int(retval ? &pmc_stats.pm_intr_processed :
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