Break out the PLL setup into an overridable method.
The only method right now is ar5416InitPLL() which handles multiple chipsets; this can now be overridden by newer chipset HAL code.
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@ -103,6 +103,10 @@ struct ath_hal_5416 {
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const struct ieee80211_channel *chan,
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int16_t *pTxPowerIndexOffset);
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/* baseband operations */
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void (*ah_initPLL) (struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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u_int ah_globaltxtimeout; /* global tx timeout */
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u_int ah_gpioMask;
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int ah_hangs; /* h/w hangs state */
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@ -248,6 +252,8 @@ extern void ar5416EepromSetAddac(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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extern uint16_t ar5416GetMaxEdgePower(uint16_t freq,
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CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz);
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extern void ar5416InitPLL(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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/* TX power setup related routines in ar5416_reset.c */
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extern void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah,
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@ -181,6 +181,9 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc,
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AH5416(ah)->ah_writeIni = ar5416WriteIni;
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AH5416(ah)->ah_spurMitigate = ar5416SpurMitigate;
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/* Internal baseband ops */
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AH5416(ah)->ah_initPLL = ar5416InitPLL;
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/* Internal calibration ops */
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AH5416(ah)->ah_cal_initcal = ar5416InitCalHardware;
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@ -54,7 +54,6 @@ static void ar5416SetDeltaSlope(struct ath_hal *, const struct ieee80211_channel
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static HAL_BOOL ar5416SetResetPowerOn(struct ath_hal *ah);
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static HAL_BOOL ar5416SetReset(struct ath_hal *ah, int type);
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static void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan);
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static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah,
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struct ar5416eeprom *pEepData,
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const struct ieee80211_channel *chan, int16_t *ratesArray,
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@ -513,7 +512,7 @@ ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *chan)
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/* Turn on PLL on 5416 */
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HALDEBUG(ah, HAL_DEBUG_RESET, "%s %s channel\n",
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__func__, IEEE80211_IS_CHAN_5GHZ(chan) ? "5GHz" : "2GHz");
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ar5416InitPLL(ah, chan);
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AH5416(ah)->ah_initPLL(ah, chan);
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/* Activate the PHY (includes baseband activate and synthesizer on) */
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OS_REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
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@ -655,7 +654,7 @@ ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan)
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if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE))
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return AH_FALSE;
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ar5416InitPLL(ah, chan);
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AH5416(ah)->ah_initPLL(ah, chan);
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/*
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* Perform warm reset before the mode/PLL/turbo registers
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@ -1221,7 +1220,7 @@ ar5416SetReset(struct ath_hal *ah, int type)
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OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS);
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}
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ar5416InitPLL(ah, AH_NULL);
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AH5416(ah)->ah_initPLL(ah, AH_NULL);
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return AH_TRUE;
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}
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@ -1278,7 +1277,7 @@ ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht)
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#define IS_5GHZ_FAST_CLOCK_EN(ah, chan) AH_FALSE
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#endif
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static void
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void
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ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
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{
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uint32_t pll;
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