Add support for the StrataFlash on 2348 boards:

o add bus shim for cfi driver
o add static mapping for CS0 (we map all 16M as the cfi driver doesn't
  support demand mapping)

Note this needs some tweaking to work for 2358 boards which is why the
CAMBRIA config is not touched.
This commit is contained in:
Sam Leffler 2009-02-03 19:16:04 +00:00
parent e73090b5d3
commit c3b85cf91f
6 changed files with 21 additions and 2 deletions

View File

@ -66,13 +66,15 @@ options BOOTP_COMPAT
device pci
device uart
device ixpwdog # watchdog timer
device cfi # flash support
# I2C Bus
device iicbus
device iicbb
device iic
device ixpiic # I2C bus glue
device ixpwdog # watchdog timer
device ds1672 # DS1672 on I2C bus
device ad7418 # AD7418 on I2C bus

View File

@ -29,6 +29,10 @@ hint.npe.1.mac="C"
hint.npe.1.mii="B"
hint.npe.1.phy=1
# FLASH
hint.cfi.0.at="ixp0"
hint.cfi.0.addr=0x50000000
# CF IDE controller
hint.ata_avila.0.at="ixp0"

View File

@ -154,6 +154,10 @@ static const struct pmap_devmap ixp425_devmap[] = {
{ IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
/* CFI Flash on the Expansion Bus */
{ IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },
/* IXP425 PCI Configuration */
{ IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, },

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@ -15,6 +15,7 @@ arm/xscale/ixp425/uart_cpu_ixp425.c optional uart
arm/xscale/ixp425/uart_bus_ixp425.c optional uart
arm/xscale/ixp425/ixp425_a4x_space.c optional uart
arm/xscale/ixp425/ixp425_a4x_io.S optional uart
dev/cfi/cfi_bus_ixp4xx.c optional cfi
dev/uart/uart_dev_ns8250.c optional uart
#
# NPE-based Ethernet support (requires qmgr also).

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@ -329,6 +329,8 @@ static const struct {
{ IXP425_IO_HWBASE, IXP425_IO_SIZE, IXP425_IO_VBASE },
{ IXP425_PCI_HWBASE, IXP425_PCI_SIZE, IXP425_PCI_VBASE },
{ IXP425_PCI_MEM_HWBASE,IXP425_PCI_MEM_SIZE, IXP425_PCI_MEM_VBASE },
{ IXP425_EXP_BUS_CS0_HWBASE, IXP425_EXP_BUS_CS0_SIZE,
IXP425_EXP_BUS_CS0_VBASE },
/* NB: needed only for uart_cpu_getdev */
{ IXP425_UART0_HWBASE, IXP425_REG_SIZE, IXP425_UART0_VBASE },
{ IXP425_UART1_HWBASE, IXP425_REG_SIZE, IXP425_UART1_VBASE },

View File

@ -76,6 +76,10 @@
* Global cache clean area
* FF00 0000 ---------------------------
*
* FE00 0000 ---------------------------
* 16M CFI Flash (on ext bus)
* FD00 0000 ---------------------------
*
* FC00 0000 ---------------------------
* PCI Data (memory space)
* F800 0000 --------------------------- IXP425_PCI_MEM_VBASE
@ -649,6 +653,9 @@
#define IXP425_EXP_BUS_CSx_VBASE(i) \
(IXP425_MAC_B_VBASE + (i)*IXP425_MAC_B_SIZE)
#define IXP425_EXP_BUS_CS0_HWBASE IXP425_EXP_BUS_CSx_HWBASE(0)
#define IXP425_EXP_BUS_CS0_VBASE 0xFD000000UL
#define IXP425_EXP_BUS_CS0_SIZE 0x01000000 /* NB: 16M */
#define IXP425_EXP_BUS_CS1_HWBASE IXP425_EXP_BUS_CSx_HWBASE(1)
#define IXP425_EXP_BUS_CS1_VBASE IXP425_EXP_BUS_CSx_VBASE(1)
#define IXP425_EXP_BUS_CS1_SIZE 0x1000
@ -663,7 +670,6 @@
#define IXP425_EXP_BUS_CS4_SIZE 0x1000
/* NB: not mapped (yet) */
#define IXP425_EXP_BUS_CS0_HWBASE IXP425_EXP_BUS_CSx_HWBASE(0)
#define IXP425_EXP_BUS_CS5_HWBASE IXP425_EXP_BUS_CSx_HWBASE(5)
#define IXP425_EXP_BUS_CS6_HWBASE IXP425_EXP_BUS_CSx_HWBASE(6)
#define IXP425_EXP_BUS_CS7_HWBASE IXP425_EXP_BUS_CSx_HWBASE(7)