u32 -> uint32_t.
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@ -58,7 +58,7 @@
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#define ar9462_2p1_pciephy_clkreq_disable_L1 ar9462_2p0_pciephy_clkreq_disable_L1
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static const u32 ar9462_2p1_mac_core[][2] = {
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static const uint32_t ar9462_2p1_mac_core[][2] = {
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/* Addr allmodes */
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{0x00000008, 0x00000000},
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{0x00000030, 0x000e0085},
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@ -221,7 +221,7 @@ static const u32 ar9462_2p1_mac_core[][2] = {
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{0x000083d0, 0x000301ff},
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};
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static const u32 ar9462_2p1_baseband_postamble[][5] = {
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static const uint32_t ar9462_2p1_baseband_postamble[][5] = {
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/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
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{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
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{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a01ae},
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@ -280,7 +280,7 @@ static const u32 ar9462_2p1_baseband_postamble[][5] = {
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{0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
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};
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static const u32 ar9462_2p1_soc_preamble[][2] = {
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static const uint32_t ar9462_2p1_soc_preamble[][2] = {
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/* Addr allmodes */
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{0x000040a4, 0x00a0c9c9},
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{0x00007020, 0x00000000},
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