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o The f_max is really at91_master_clock / 2, not 30MHz, so compute it as such.

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o Only set 4-bit caps on those boards that have 4-bit caps (this means that
  because we don't set wire4 yet, this forces us to always use 1-bit bus).
o Don't test wire4 when setting up the bus width, since bad things will
  happen if we do.

# This likely won't fix the busted at91 sd card support, but these are
# needful changes for correctness.
This commit is contained in:
Warner Losh 2009-01-21 17:39:11 +00:00
parent 38d1bc2312
commit c5fb414e0a
1 changed files with 6 additions and 3 deletions
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9
sys/arm/at91/at91_mci.c
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@ -199,9 +199,12 @@ at91_mci_attach(device_t dev)
goto out; goto out;
} }
sc->host.f_min = 375000; sc->host.f_min = 375000;
sc->host.f_max = 30000000; sc->host.f_max = at91_master_clock / 2; /* Typically 30MHz */
sc->host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; sc->host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340;
sc->host.caps = MMC_CAP_4_BIT_DATA; if (sc->wire4)
sc->host.caps = MMC_CAP_4_BIT_DATA;
else
sc->host.caps = 0;
child = device_add_child(dev, "mmc", 0); child = device_add_child(dev, "mmc", 0);
device_set_ivars(dev, &sc->host); device_set_ivars(dev, &sc->host);
err = bus_generic_attach(dev); err = bus_generic_attach(dev);
@ -294,7 +297,7 @@ at91_mci_update_ios(device_t brdev, device_t reqdev)
else else
clkdiv = (at91_master_clock / ios->clock) / 2; clkdiv = (at91_master_clock / ios->clock) / 2;
} }
if (ios->bus_width == bus_width_4 && sc->wire4) if (ios->bus_width == bus_width_4)
WR4(sc, MCI_SDCR, RD4(sc, MCI_SDCR) | MCI_SDCR_SDCBUS); WR4(sc, MCI_SDCR, RD4(sc, MCI_SDCR) | MCI_SDCR_SDCBUS);
else else
WR4(sc, MCI_SDCR, RD4(sc, MCI_SDCR) & ~MCI_SDCR_SDCBUS); WR4(sc, MCI_SDCR, RD4(sc, MCI_SDCR) & ~MCI_SDCR_SDCBUS);