Style and minor changes:
- Merge lsi64854.c rev. 1.25 from NetBSD: nuke trailing whitespace. - Update NetBSD RCS IDs according to what was actually already merged. - Remove dv_name from the lsi64854_softc and use device_printf() instead. - Use __func__ instead of hardcoded function names in error messages. - Use ulmin() instead of min() for comparing the DMA sizes as the values involved actually are represented by 64bit unsigned instead of 32bit unsigned. As far as I can't tell this doesn't make a difference in practice though. - Some style(9) fixes (mainly indentation). - Remove unnecessary braces.
This commit is contained in:
Marius Strobl
parent
e90e8e4b97
commit
c64c7a0f7a
@ -25,7 +25,7 @@
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*
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*/
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/* $NetBSD: lsi64854.c,v 1.22 2002/10/01 07:07:03 petrov Exp $ */
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/* $NetBSD: lsi64854.c,v 1.25 2005/02/27 00:27:02 perry Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -87,10 +87,10 @@ __FBSDID("$FreeBSD$");
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#include <dev/esp/ncr53c9xvar.h>
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void lsi64854_reset(struct lsi64854_softc *);
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int lsi64854_setup(struct lsi64854_softc *, caddr_t *, size_t *,
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int, size_t *);
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int lsi64854_setup_pp(struct lsi64854_softc *, caddr_t *, size_t *,
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int, size_t *);
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int lsi64854_setup(struct lsi64854_softc *, caddr_t *, size_t *, int,
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size_t *);
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int lsi64854_setup_pp(struct lsi64854_softc *, caddr_t *, size_t *, int,
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size_t *);
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#ifdef DEBUG
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#define LDB_SCSI 1
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@ -118,8 +118,6 @@ lsi64854_attach(struct lsi64854_softc *sc)
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{
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uint32_t csr;
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sc->dv_name = device_get_nameunit(sc->sc_dev);
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/* Indirect functions */
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switch (sc->sc_channel) {
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case L64854_CHANNEL_SCSI:
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@ -133,37 +131,37 @@ lsi64854_attach(struct lsi64854_softc *sc)
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sc->setup = lsi64854_setup_pp;
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break;
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default:
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printf("%s: unknown channel\n", sc->dv_name);
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device_printf(sc->sc_dev, "unknown channel\n");
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}
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sc->reset = lsi64854_reset;
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/* Allocate a dmamap */
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if (bus_dma_tag_create(sc->sc_parent_dmat, /* parent */
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1, 0, /* algnment, boundary */
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BUS_SPACE_MAXADDR, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MAX_DMA_SZ, /* maxsize */
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1, /* nsegments */
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MAX_DMA_SZ, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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NULL, NULL, /* lockfunc, lockarg */
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&sc->sc_buffer_dmat)) {
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printf("%s: can't allocate buffer DMA tag\n", sc->dv_name);
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if (bus_dma_tag_create(
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sc->sc_parent_dmat, /* parent */
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1, 0, /* alignment, boundary */
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BUS_SPACE_MAXADDR, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MAX_DMA_SZ, /* maxsize */
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1, /* nsegments */
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MAX_DMA_SZ, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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NULL, NULL, /* lockfunc, lockarg */
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&sc->sc_buffer_dmat)) {
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device_printf(sc->sc_dev, "cannot allocate buffer DMA tag\n");
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return;
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}
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if (bus_dmamap_create(sc->sc_buffer_dmat, 0, &sc->sc_dmamap) != 0) {
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printf("%s: DMA map create failed\n", sc->dv_name);
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device_printf(sc->sc_dev, "DMA map create failed\n");
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return;
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}
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csr = L64854_GCSR(sc);
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sc->sc_rev = csr & L64854_DEVID;
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if (sc->sc_rev == DMAREV_HME) {
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if (sc->sc_rev == DMAREV_HME)
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return;
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}
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printf(": DMA rev ");
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device_printf(sc->sc_dev, "DMA rev. ");
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switch (sc->sc_rev) {
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case DMAREV_0:
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printf("0");
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@ -256,7 +254,7 @@ lsi64854_reset(struct lsi64854_softc *sc)
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DMA_FLUSH(sc, 1);
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csr = L64854_GCSR(sc);
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DPRINTF(LDB_ANY, ("lsi64854_reset: csr 0x%x\n", csr));
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DPRINTF(LDB_ANY, ("%s: csr 0x%x\n", __func__, csr));
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/*
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* XXX is sync needed?
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@ -292,19 +290,18 @@ lsi64854_reset(struct lsi64854_softc *sc)
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case DMAREV_HME:
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case DMAREV_2:
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csr &= ~L64854_BURST_SIZE;
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if (sc->sc_burst == 32) {
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if (sc->sc_burst == 32)
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csr |= L64854_BURST_32;
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} else if (sc->sc_burst == 16) {
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else if (sc->sc_burst == 16)
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csr |= L64854_BURST_16;
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} else {
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else
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csr |= L64854_BURST_0;
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}
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break;
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case DMAREV_ESC:
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csr |= D_ESC_AUTODRAIN; /* Auto-drain */
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if (sc->sc_burst == 32) {
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if (sc->sc_burst == 32)
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csr &= ~D_ESC_BURST;
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} else
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else
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csr |= D_ESC_BURST;
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break;
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default:
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@ -318,7 +315,7 @@ lsi64854_reset(struct lsi64854_softc *sc)
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}
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sc->sc_active = 0;
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DPRINTF(LDB_ANY, ("lsi64854_reset: done, csr 0x%x\n", csr));
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DPRINTF(LDB_ANY, ("%s: done, csr 0x%x\n", __func__, csr));
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}
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static void
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@ -329,22 +326,21 @@ lsi64854_map_scsi(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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sc = (struct lsi64854_softc *)arg;
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if (nseg != 1)
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panic("%s: cannot map %d segments\n", sc->dv_name, nseg);
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panic("%s: cannot map %d segments\n", __func__, nseg);
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bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap, sc->sc_datain ?
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BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
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bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
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sc->sc_datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR,
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segs[0].ds_addr);
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segs[0].ds_addr);
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}
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#define DMAMAX(a) (MAX_DMA_SZ - ((a) & (MAX_DMA_SZ-1)))
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#define DMAMAX(a) (MAX_DMA_SZ - ((a) & (MAX_DMA_SZ-1)))
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/*
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* setup a DMA transfer
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*/
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int
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lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
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int datain, size_t *dmasize)
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int datain, size_t *dmasize)
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{
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uint32_t csr;
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@ -363,28 +359,26 @@ lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
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* and we cannot cross a 16Mb boundary.
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*/
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*dmasize = sc->sc_dmasize =
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min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
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ulmin(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
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DPRINTF(LDB_ANY, ("dma_setup: dmasize = %ld\n", (long)sc->sc_dmasize));
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DPRINTF(LDB_ANY, ("%s: dmasize=%ld\n", __func__, (long)sc->sc_dmasize));
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/*
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* XXX what length?
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* XXX what length?
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*/
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if (sc->sc_rev == DMAREV_HME) {
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L64854_SCSR(sc, sc->sc_dmactl | L64854_RESET);
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L64854_SCSR(sc, sc->sc_dmactl);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT, *dmasize);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT,
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*dmasize);
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}
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/* Program the DMA address */
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if (sc->sc_dmasize) {
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if (sc->sc_dmasize)
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if (bus_dmamap_load(sc->sc_buffer_dmat, sc->sc_dmamap,
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*sc->sc_dmaaddr, sc->sc_dmasize,
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lsi64854_map_scsi, sc, 0) != 0)
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panic("%s: cannot allocate DVMA address", sc->dv_name);
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}
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*sc->sc_dmaaddr, sc->sc_dmasize, lsi64854_map_scsi, sc, 0))
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panic("%s: cannot allocate DVMA address", __func__);
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if (sc->sc_rev == DMAREV_ESC) {
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/* DMA ESC chip bug work-around */
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@ -393,7 +387,7 @@ lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
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if ((eaddr & PAGE_MASK_8K) != 0)
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bcnt = roundup(bcnt, PAGE_SIZE_8K);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT,
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bcnt);
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bcnt);
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}
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/* Setup DMA control register */
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@ -405,9 +399,8 @@ lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
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csr &= ~L64854_WRITE;
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csr |= L64854_INT_EN;
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if (sc->sc_rev == DMAREV_HME) {
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if (sc->sc_rev == DMAREV_HME)
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csr |= (D_DSBL_SCSI_DRN | D_EN_DMA);
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}
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L64854_SCSR(sc, csr);
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@ -431,12 +424,12 @@ lsi64854_scsi_intr(void *arg)
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csr = L64854_GCSR(sc);
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DPRINTF(LDB_SCSI, ("%s: dmaintr: addr 0x%x, csr %b\n", sc->dv_name,
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bus_space_read_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR),
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csr, DDMACSR_BITS));
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DPRINTF(LDB_SCSI, ("%s: addr 0x%x, csr %b\n", __func__,
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bus_space_read_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR), csr,
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DDMACSR_BITS));
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if (csr & (D_ERR_PEND|D_SLAVE_ERR)) {
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printf("%s: error: csr=%b\n", sc->dv_name, csr, DDMACSR_BITS);
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device_printf(sc->sc_dev, "error: csr=%b\n", csr, DDMACSR_BITS);
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csr &= ~D_EN_DMA; /* Stop DMA */
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/* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
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csr |= D_INVALIDATE|D_SLAVE_ERR;
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@ -446,7 +439,7 @@ lsi64854_scsi_intr(void *arg)
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/* This is an "assertion" :) */
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if (sc->sc_active == 0)
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panic("dmaintr: DMA wasn't active");
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panic("%s: DMA wasn't active", __func__);
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DMA_DRAIN(sc, 0);
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@ -457,12 +450,11 @@ lsi64854_scsi_intr(void *arg)
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if (sc->sc_dmasize == 0) {
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/* A "Transfer Pad" operation completed */
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DPRINTF(LDB_SCSI, ("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n",
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NCR_READ_REG(nsc, NCR_TCL) |
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(NCR_READ_REG(nsc, NCR_TCM) << 8),
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NCR_READ_REG(nsc, NCR_TCL),
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NCR_READ_REG(nsc, NCR_TCM)));
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return 0;
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DPRINTF(LDB_SCSI, ("%s: discarded %d bytes (tcl=%d, tcm=%d)\n",
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__func__, NCR_READ_REG(nsc, NCR_TCL) |
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(NCR_READ_REG(nsc, NCR_TCM) << 8),
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NCR_READ_REG(nsc, NCR_TCL), NCR_READ_REG(nsc, NCR_TCM)));
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return (0);
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}
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resid = 0;
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@ -474,7 +466,8 @@ lsi64854_scsi_intr(void *arg)
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*/
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if (!(csr & D_WRITE) &&
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(resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
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DPRINTF(LDB_SCSI, ("dmaintr: empty esp FIFO of %d ", resid));
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DPRINTF(LDB_SCSI, ("%s: empty esp FIFO of %d ", __func__,
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resid));
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if (nsc->sc_rev == NCR_VARIANT_FAS366 &&
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(NCR_READ_REG(nsc, NCR_CFG3) & NCRFASCFG3_EWIDE))
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resid <<= 1;
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@ -486,10 +479,9 @@ lsi64854_scsi_intr(void *arg)
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* out of the NCR53C9X counter registers.
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*/
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resid += (NCR_READ_REG(nsc, NCR_TCL) |
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(NCR_READ_REG(nsc, NCR_TCM) << 8) |
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((nsc->sc_cfg2 & NCRCFG2_FE)
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? (NCR_READ_REG(nsc, NCR_TCH) << 16)
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: 0));
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(NCR_READ_REG(nsc, NCR_TCM) << 8) |
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((nsc->sc_cfg2 & NCRCFG2_FE) ?
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(NCR_READ_REG(nsc, NCR_TCH) << 16) : 0));
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if (resid == 0 && sc->sc_dmasize == 65536 &&
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(nsc->sc_cfg2 & NCRCFG2_FE) == 0)
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@ -505,25 +497,22 @@ lsi64854_scsi_intr(void *arg)
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* if the ESP is reselected while using DMA to select
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* another target. As such, don't print the warning.
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*/
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printf("%s: xfer (%d) > req (%d)\n", sc->dv_name, trans,
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sc->sc_dmasize);
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device_printf(sc->sc_dev, "xfer (%d) > req (%d)\n", trans,
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sc->sc_dmasize);
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#endif
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trans = sc->sc_dmasize;
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}
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DPRINTF(LDB_SCSI, ("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
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NCR_READ_REG(nsc, NCR_TCL),
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NCR_READ_REG(nsc, NCR_TCM),
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(nsc->sc_cfg2 & NCRCFG2_FE)
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? NCR_READ_REG(nsc, NCR_TCH) : 0,
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trans, resid));
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DPRINTF(LDB_SCSI, ("%s: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
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__func__, NCR_READ_REG(nsc, NCR_TCL), NCR_READ_REG(nsc, NCR_TCM),
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(nsc->sc_cfg2 & NCRCFG2_FE) ? NCR_READ_REG(nsc, NCR_TCH) : 0,
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trans, resid));
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#if 0 /* XXX */
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if (sc->sc_dmamap->dm_nsegs > 0) {
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bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
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(csr & D_WRITE) != 0
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? BUS_DMASYNC_POSTREAD
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: BUS_DMASYNC_POSTWRITE);
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(csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
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}
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#endif
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@ -532,15 +521,14 @@ lsi64854_scsi_intr(void *arg)
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*sc->sc_dmaaddr += trans;
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#if 0 /* this is not normal operation just yet */
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if (*sc->sc_dmalen == 0 ||
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nsc->sc_phase != nsc->sc_prevphase)
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return 0;
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if (*sc->sc_dmalen == 0 || nsc->sc_phase != nsc->sc_prevphase)
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return (0);
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/* and again */
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dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE);
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return 1;
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return (1);
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#endif
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return 0;
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return (0);
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}
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/*
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@ -560,7 +548,7 @@ lsi64854_enet_intr(void *arg)
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rv = ((csr & E_INT_PEND) != 0) ? 1 : 0;
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if (csr & (E_ERR_PEND|E_SLAVE_ERR)) {
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printf("%s: error: csr=%b\n", sc->dv_name, csr, EDMACSR_BITS);
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device_printf(sc->sc_dev, "error: csr=%b\n", csr, EDMACSR_BITS);
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csr &= ~L64854_EN_DMA; /* Stop DMA */
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/* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
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csr |= E_INVALIDATE|E_SLAVE_ERR;
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@ -589,16 +577,15 @@ lsi64854_map_pp(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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sc = (struct lsi64854_softc *)arg;
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if (nsegs != 1)
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panic("%s: cannot map %d segments\n", sc->dv_name, nsegs);
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panic("%s: cannot map %d segments\n", __func__, nsegs);
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bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap, sc->sc_datain
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? BUS_DMASYNC_PREREAD
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: BUS_DMASYNC_PREWRITE);
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bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap, sc->sc_datain ?
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BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR,
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segs[0].ds_addr);
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segs[0].ds_addr);
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bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT,
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sc->sc_dmasize);
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sc->sc_dmasize);
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}
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/*
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@ -606,7 +593,7 @@ lsi64854_map_pp(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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*/
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int
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lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
|
||||
int datain, size_t *dmasize)
|
||||
int datain, size_t *dmasize)
|
||||
{
|
||||
uint32_t csr;
|
||||
|
||||
@ -616,8 +603,8 @@ lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
|
||||
sc->sc_dmalen = len;
|
||||
sc->sc_datain = datain;
|
||||
|
||||
DPRINTF(LDB_PP, ("%s: pp start %ld@%p,%d\n", sc->dv_name,
|
||||
(long)*sc->sc_dmalen, *sc->sc_dmaaddr, datain ? 1 : 0));
|
||||
DPRINTF(LDB_PP, ("%s: pp start %ld@%p,%d\n", __func__,
|
||||
(long)*sc->sc_dmalen, *sc->sc_dmaaddr, datain ? 1 : 0));
|
||||
|
||||
/*
|
||||
* the rules say we cannot transfer more than the limit
|
||||
@ -625,29 +612,25 @@ lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
|
||||
* and we cannot cross a 16Mb boundary.
|
||||
*/
|
||||
*dmasize = sc->sc_dmasize =
|
||||
min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
|
||||
ulmin(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
|
||||
|
||||
DPRINTF(LDB_PP, ("dma_setup_pp: dmasize = %ld\n", (long)sc->sc_dmasize));
|
||||
DPRINTF(LDB_PP, ("%s: dmasize=%ld\n", __func__, (long)sc->sc_dmasize));
|
||||
|
||||
/* Program the DMA address */
|
||||
if (sc->sc_dmasize) {
|
||||
if (sc->sc_dmasize)
|
||||
if (bus_dmamap_load(sc->sc_buffer_dmat, sc->sc_dmamap,
|
||||
*sc->sc_dmaaddr, sc->sc_dmasize,
|
||||
lsi64854_map_pp, sc, 0) != 0)
|
||||
panic("%s: pp cannot allocate DVMA address",
|
||||
sc->dv_name);
|
||||
}
|
||||
*sc->sc_dmaaddr, sc->sc_dmasize, lsi64854_map_pp, sc, 0))
|
||||
panic("%s: pp cannot allocate DVMA address", __func__);
|
||||
|
||||
/* Setup DMA control register */
|
||||
csr = L64854_GCSR(sc);
|
||||
csr &= ~L64854_BURST_SIZE;
|
||||
if (sc->sc_burst == 32) {
|
||||
if (sc->sc_burst == 32)
|
||||
csr |= L64854_BURST_32;
|
||||
} else if (sc->sc_burst == 16) {
|
||||
else if (sc->sc_burst == 16)
|
||||
csr |= L64854_BURST_16;
|
||||
} else {
|
||||
else
|
||||
csr |= L64854_BURST_0;
|
||||
}
|
||||
csr |= P_EN_DMA|P_INT_EN|P_EN_CNT;
|
||||
#if 0
|
||||
/* This bit is read-only in PP csr register */
|
||||
@ -660,6 +643,7 @@ lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Parallel port DMA interrupt.
|
||||
*/
|
||||
@ -672,15 +656,15 @@ lsi64854_pp_intr(void *arg)
|
||||
|
||||
csr = L64854_GCSR(sc);
|
||||
|
||||
DPRINTF(LDB_PP, ("%s: pp intr: addr 0x%x, csr %b\n", sc->dv_name,
|
||||
bus_space_read_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR),
|
||||
csr, PDMACSR_BITS));
|
||||
DPRINTF(LDB_PP, ("%s: addr 0x%x, csr %b\n", __func__,
|
||||
bus_space_read_4(sc->sc_regt, sc->sc_regh, L64854_REG_ADDR), csr,
|
||||
csr, PDMACSR_BITS));
|
||||
|
||||
if (csr & (P_ERR_PEND|P_SLAVE_ERR)) {
|
||||
resid = bus_space_read_4(sc->sc_regt, sc->sc_regh,
|
||||
L64854_REG_CNT);
|
||||
printf("%s: pp error: resid %d csr=%b\n", sc->dv_name, resid,
|
||||
csr, PDMACSR_BITS);
|
||||
L64854_REG_CNT);
|
||||
device_printf(sc->sc_dev, "error: resid %d csr=%b\n", resid,
|
||||
csr, PDMACSR_BITS);
|
||||
csr &= ~P_EN_DMA; /* Stop DMA */
|
||||
/* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
|
||||
csr |= P_INVALIDATE|P_SLAVE_ERR;
|
||||
@ -693,7 +677,7 @@ lsi64854_pp_intr(void *arg)
|
||||
if (sc->sc_active != 0) {
|
||||
DMA_DRAIN(sc, 0);
|
||||
resid = bus_space_read_4(sc->sc_regt, sc->sc_regh,
|
||||
L64854_REG_CNT);
|
||||
L64854_REG_CNT);
|
||||
}
|
||||
|
||||
/* DMA has stopped */
|
||||
@ -702,18 +686,16 @@ lsi64854_pp_intr(void *arg)
|
||||
sc->sc_active = 0;
|
||||
|
||||
trans = sc->sc_dmasize - resid;
|
||||
if (trans < 0) { /* transferred < 0 ? */
|
||||
if (trans < 0) /* transfered < 0? */
|
||||
trans = sc->sc_dmasize;
|
||||
}
|
||||
*sc->sc_dmalen -= trans;
|
||||
*sc->sc_dmaaddr += trans;
|
||||
|
||||
#if 0 /* XXX */
|
||||
if (sc->sc_dmamap->dm_nsegs > 0) {
|
||||
bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
|
||||
(csr & D_WRITE) != 0
|
||||
? BUS_DMASYNC_POSTREAD
|
||||
: BUS_DMASYNC_POSTWRITE);
|
||||
(csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
|
||||
BUS_DMASYNC_POSTWRITE);
|
||||
bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: lsi64854reg.h,v 1.4 1998/09/21 21:26:52 pk Exp $ */
|
||||
/* $NetBSD: lsi64854reg.h,v 1.5 2001/03/29 02:58:39 petrov Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: lsi64854var.h,v 1.4 2001/03/29 02:58:39 petrov Exp $ */
|
||||
/* $NetBSD: lsi64854var.h,v 1.6 2005/02/04 02:10:36 perry Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
@ -40,7 +40,6 @@
|
||||
|
||||
struct lsi64854_softc {
|
||||
device_t sc_dev;
|
||||
const char *dv_name;
|
||||
|
||||
int sc_rid;
|
||||
struct resource *sc_res;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user