From c878f70aae65f55861b045611f718b5ac80ad984 Mon Sep 17 00:00:00 2001 From: Ian Lepore Date: Wed, 2 Apr 2014 18:32:27 +0000 Subject: [PATCH] Disable the timer and clear any pending bit, then setup the new counter register values, then restart the timer. This prevents a situation where an old event fires just as we're about to load a new value into the timer, when the start routine is called to change the time of the current event. Also re-nest the parens properly for casting the result of converting time and frequency to a count. This doesn't actually change the result of the calcs, but will some day prevent a loss-of-precision warning on the assignment, if that warning gets enabled. --- sys/arm/arm/mpcore_timer.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/sys/arm/arm/mpcore_timer.c b/sys/arm/arm/mpcore_timer.c index 4a0f23b7fdab..0af2626d1e98 100644 --- a/sys/arm/arm/mpcore_timer.c +++ b/sys/arm/arm/mpcore_timer.c @@ -173,6 +173,9 @@ arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period) uint32_t load, count; uint32_t ctrl; + tmr_prv_write_4(PRV_TIMER_CTRL, 0); + tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT); + ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE; if (period != 0) { @@ -182,14 +185,14 @@ arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period) load = 0; if (first != 0) - count = ((uint32_t)et->et_frequency * first) >> 32; + count = (uint32_t)((et->et_frequency * first) >> 32); else count = load; tmr_prv_write_4(PRV_TIMER_LOAD, load); tmr_prv_write_4(PRV_TIMER_COUNT, count); - tmr_prv_write_4(PRV_TIMER_CTRL, ctrl); + return (0); }