SMBus support for the AMD 756 power management unit. See smbus(4),
amdpm(4) and smb(4). This device can be used with userland programs such as sysutils/lmmon to retrieve sensor information from the motherboard. PR: kern/23989 Obtained from: Matthew C. Forman <mcf@dmu.ac.uk> Based on: alpm(4)
This commit is contained in:
Murray Stokely
parent
6fbcb1c3e9
commit
c896039b9b
66
share/man/man4/man4.i386/amdpm.4
Normal file
66
share/man/man4/man4.i386/amdpm.4
Normal file
@ -0,0 +1,66 @@
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.\" Copyright (c) 2001 Murray Stokely
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.\" Copyright (c) 1999 Takanori Watanabe
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
|
||||
.\" modification, are permitted provided that the following conditions
|
||||
.\" are met:
|
||||
.\" 1. Redistributions of source code must retain the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer.
|
||||
.\" 2. Redistributions in binary form must reproduce the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer in the
|
||||
.\" documentation and/or other materials provided with the distribution.
|
||||
.\"
|
||||
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd September 16, 2001
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.Dt AMDPM 4
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.Os
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.Sh NAME
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.Nm amdpm
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.Nd AMD 756 Power Management controller driver
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.Sh SYNOPSIS
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.Cd device smbus
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.Cd device smb
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.Cd device amdpm
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.Sh DESCRIPTION
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This driver provides access to the
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.Tn AMD 756 Power management controller .
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Currently, only smbus controller function is implemented.
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.Pp
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The embedded SMBus controller of the AMD 756 chipset may give you access
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to the monitoring facilities of your mainboard.
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See
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.Xr smb 4
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for writing user code to fetch voltages, temperature and so on from the
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monitoring chip of your mainboard.
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.Sh SEE ALSO
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.Xr smb 4 ,
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.Xr smbus 4
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.Sh HISTORY
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The
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.Nm
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driver first appeared in
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.Fx 5.0 .
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.Sh AUTHORS
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This driver was written by Matthew C. Forman.
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Based heavily on the
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.Nm alpm
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driver by
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.An Nicolas Souchu .
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This manual page was written by
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.An Murray Stokely Aq murray@FreeBSD.org .
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.Sh BUGS
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Only polling mode is supported.
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@ -1190,6 +1190,7 @@ pci/agp_amd.c optional agp
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pci/agp_i810.c optional agp
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pci/alpm.c optional alpm
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pci/amd.c optional amd
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pci/amdpm.c optional amdpm
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pci/cy_pci.c optional cy pci
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pci/if_dc.c optional dc
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pci/if_de.c optional de
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@ -150,3 +150,4 @@ DRIVER_MODULE(smbus, bti2c, smbus_driver, smbus_devclass, 0, 0);
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DRIVER_MODULE(smbus, intsmb, smbus_driver, smbus_devclass, 0, 0);
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DRIVER_MODULE(smbus, alsmb, smbus_driver, smbus_devclass, 0, 0);
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DRIVER_MODULE(smbus, ichsmb, smbus_driver, smbus_devclass, 0, 0);
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DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, 0, 0);
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634
sys/pci/amdpm.c
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634
sys/pci/amdpm.c
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@ -0,0 +1,634 @@
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/*-
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* Copyright (c) 2000 Matthew C. Forman
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*
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* Based (heavily) on alpm.c which is:
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*
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* Copyright (c) 1998, 1999 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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/*
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* Power management function/SMBus function support for the AMD 756 chip.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/uio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus_memio.h>
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#include <machine/bus.h>
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#include <machine/clock.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/smbus/smbconf.h>
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#include "smbus_if.h"
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#define AMDPM_DEBUG(x) if (amdpm_debug) (x)
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#ifdef DEBUG
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static int amdpm_debug = 1;
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#else
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static int amdpm_debug = 0;
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#endif
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#define AMDPM_VENDORID_AMD 0x1022
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#define AMDPM_DEVICEID_AMD756PM 0x740b
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/* PCI Configuration space registers */
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#define AMDPCI_PMBASE 0x58
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#define AMDPCI_GEN_CONFIG_PM 0x41
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#define AMDPCI_PMIOEN (1<<7)
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#define AMDPCI_SCIINT_CONFIG_PM 0x42
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#define AMDPCI_SCISEL_IRQ11 11
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#define AMDPCI_REVID 0x08
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/*
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* I/O registers.
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* Base address programmed via AMDPCI_PMBASE.
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*/
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#define AMDSMB_GLOBAL_STATUS 0xE0
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#define AMDSMB_GS_TO_STS (1<<5)
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#define AMDSMB_GS_HCYC_STS (1<<4)
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#define AMDSMB_GS_HST_STS (1<<3)
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#define AMDSMB_GS_PRERR_STS (1<<2)
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#define AMDSMB_GS_COL_STS (1<<1)
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#define AMDSMB_GS_ABRT_STS (1<<0)
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#define AMDSMB_GS_CLEAR_STS (AMDSMB_GS_TO_STS|AMDSMB_GS_HCYC_STS|AMDSMB_GS_PRERR_STS|AMDSMB_GS_COL_STS|AMDSMB_GS_ABRT_STS)
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#define AMDSMB_GLOBAL_ENABLE 0xE2
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#define AMDSMB_GE_ABORT (1<<5)
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#define AMDSMB_GE_HCYC_EN (1<<4)
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#define AMDSMB_GE_HOST_STC (1<<3)
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#define AMDSMB_GE_CYC_QUICK 0
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#define AMDSMB_GE_CYC_BYTE 1
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#define AMDSMB_GE_CYC_BDATA 2
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#define AMDSMB_GE_CYC_WDATA 3
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#define AMDSMB_GE_CYC_PROCCALL 4
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#define AMDSMB_GE_CYC_BLOCK 5
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#define AMDSMB_HSTADDR 0xE4
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#define AMDSMB_HSTDATA 0xE6
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#define AMDSMB_HSTCMD 0xE8
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#define AMDSMB_HSTDFIFO 0xE9
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#define AMDSMB_HSLVDATA 0xEA
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#define AMDSMB_HSLVDA 0xEC
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#define AMDSMB_HSLVDDR 0xEE
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#define AMDSMB_SNPADDR 0xEF
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struct amdpm_softc {
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int base;
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int rid;
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struct resource *res;
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bus_space_tag_t smbst;
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bus_space_handle_t smbsh;
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};
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struct amdsmb_softc {
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int base;
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device_t smbus;
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struct amdpm_softc *amdpm;
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};
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#define AMDPM_SMBINB(amdsmb,register) \
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(bus_space_read_1(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register))
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#define AMDPM_SMBOUTB(amdsmb,register,value) \
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(bus_space_write_1(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register, value))
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#define AMDPM_SMBINW(amdsmb,register) \
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(bus_space_read_2(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register))
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#define AMDPM_SMBOUTW(amdsmb,register,value) \
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(bus_space_write_2(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register, value))
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static int amdsmb_probe(device_t);
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static int amdsmb_attach(device_t);
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static int amdsmb_smb_callback(device_t, int, caddr_t *);
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static int amdsmb_smb_quick(device_t dev, u_char slave, int how);
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static int amdsmb_smb_sendb(device_t dev, u_char slave, char byte);
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static int amdsmb_smb_recvb(device_t dev, u_char slave, char *byte);
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static int amdsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte);
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static int amdsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte);
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static int amdsmb_smb_writew(device_t dev, u_char slave, char cmd, short word);
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static int amdsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word);
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static int amdsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf);
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static int amdsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *byte);
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static int amdpm_probe(device_t);
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static int amdpm_attach(device_t);
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static int
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amdpm_probe(device_t dev)
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{
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u_long base;
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if ((pci_get_vendor(dev) == AMDPM_VENDORID_AMD) &&
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(pci_get_device(dev) == AMDPM_DEVICEID_AMD756PM)) {
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device_set_desc(dev, "AMD 756 Power Management Controller");
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/*
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* We have to do this, since the BIOS won't give us the
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* resource info (not mine, anyway).
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*/
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base = pci_read_config(dev, AMDPCI_PMBASE, 4);
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base &= 0xff00;
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bus_set_resource(dev, SYS_RES_IOPORT, AMDPCI_PMBASE, base, 256);
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return (0);
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}
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return ENXIO;
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}
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static int
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amdpm_attach(device_t dev)
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{
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struct amdpm_softc *amdpm_sc = device_get_softc(dev);
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u_char val_b;
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int unit = device_get_unit(dev);
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device_t smbinterface;
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/* Enable I/O block access */
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val_b = pci_read_config(dev, AMDPCI_GEN_CONFIG_PM, 1);
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pci_write_config(dev, AMDPCI_GEN_CONFIG_PM, val_b | AMDPCI_PMIOEN, 1);
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/* Allocate I/O space */
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amdpm_sc->rid = AMDPCI_PMBASE;
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amdpm_sc->res = bus_alloc_resource(dev, SYS_RES_IOPORT, &amdpm_sc->rid, 0, ~0, 1, RF_ACTIVE);
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if (amdpm_sc->res == NULL) {
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device_printf(dev, "could not map i/o space\n");
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return (ENXIO);
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}
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amdpm_sc->smbst = rman_get_bustag(amdpm_sc->res);
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amdpm_sc->smbsh = rman_get_bushandle(amdpm_sc->res);
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smbinterface = device_add_child(dev, "amdsmb", unit);
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if (!smbinterface)
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device_printf(dev, "could not add SMBus device\n");
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else
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device_probe_and_attach(smbinterface);
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return (0);
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}
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static int
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amdsmb_probe(device_t dev)
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{
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struct amdsmb_softc *amdsmb_sc = (struct amdsmb_softc *)device_get_softc(dev);
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/* Allocate a new smbus device */
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amdsmb_sc->smbus = smbus_alloc_bus(dev);
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if (!amdsmb_sc->smbus)
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return (EINVAL);
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device_set_desc(dev, "AMD 756 SMBus interface");
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device_printf(dev, "AMD 756 SMBus interface\n");
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return (0);
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}
|
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static int
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amdsmb_attach(device_t dev)
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{
|
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struct amdsmb_softc *amdsmb_sc = (struct amdsmb_softc *)device_get_softc(dev);
|
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|
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amdsmb_sc->amdpm = device_get_softc(device_get_parent(dev));
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|
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/* Probe and attach the smbus */
|
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device_probe_and_attach(amdsmb_sc->smbus);
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return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_callback(device_t dev, int index, caddr_t *data)
|
||||
{
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int error = 0;
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switch (index) {
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case SMB_REQUEST_BUS:
|
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case SMB_RELEASE_BUS:
|
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break;
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default:
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error = EINVAL;
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}
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|
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return (error);
|
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}
|
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|
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static int
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amdsmb_clear(struct amdsmb_softc *sc)
|
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{
|
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AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_STATUS, AMDSMB_GS_CLEAR_STS);
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DELAY(10);
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return (0);
|
||||
}
|
||||
|
||||
static int
|
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amdsmb_abort(struct amdsmb_softc *sc)
|
||||
{
|
||||
u_short l;
|
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|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, l | AMDSMB_GE_ABORT);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_idle(struct amdsmb_softc *sc)
|
||||
{
|
||||
u_short sts;
|
||||
|
||||
sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: busy? STS=0x%x\n", sts));
|
||||
|
||||
return (~(sts & AMDSMB_GS_HST_STS));
|
||||
}
|
||||
|
||||
/*
|
||||
* Poll the SMBus controller
|
||||
*/
|
||||
static int
|
||||
amdsmb_wait(struct amdsmb_softc *sc)
|
||||
{
|
||||
int count = 10000;
|
||||
u_short sts = 0;
|
||||
int error;
|
||||
|
||||
/* Wait for command to complete (SMBus controller is idle) */
|
||||
while(count--) {
|
||||
DELAY(10);
|
||||
sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
|
||||
if (!(sts & AMDSMB_GS_HST_STS))
|
||||
break;
|
||||
}
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: STS=0x%x (count=%d)\n", sts, count));
|
||||
|
||||
error = SMB_ENOERR;
|
||||
|
||||
if (!count)
|
||||
error |= SMB_ETIMEOUT;
|
||||
|
||||
if (sts & AMDSMB_GS_ABRT_STS)
|
||||
error |= SMB_EABORT;
|
||||
|
||||
if (sts & AMDSMB_GS_COL_STS)
|
||||
error |= SMB_ENOACK;
|
||||
|
||||
if (sts & AMDSMB_GS_PRERR_STS)
|
||||
error |= SMB_EBUSERR;
|
||||
|
||||
if (error != SMB_ENOERR)
|
||||
amdsmb_clear(sc);
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_quick(device_t dev, u_char slave, int how)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (EBUSY);
|
||||
|
||||
switch (how) {
|
||||
case SMB_QWRITE:
|
||||
AMDPM_DEBUG(printf("amdpm: QWRITE to 0x%x", slave));
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
|
||||
break;
|
||||
case SMB_QREAD:
|
||||
AMDPM_DEBUG(printf("amdpm: QREAD to 0x%x", slave));
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
|
||||
break;
|
||||
default:
|
||||
panic("%s: unknown QUICK command (%x)!", __FUNCTION__, how);
|
||||
}
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_QUICK | AMDSMB_GE_HOST_STC);
|
||||
|
||||
error = amdsmb_wait(sc);
|
||||
|
||||
AMDPM_DEBUG(printf(", error=0x%x\n", error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_sendb(device_t dev, u_char slave, char byte)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
|
||||
|
||||
error = amdsmb_wait(sc);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_recvb(device_t dev, u_char slave, char *byte)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
|
||||
|
||||
if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
|
||||
*byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
|
||||
|
||||
error = amdsmb_wait(sc);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
|
||||
|
||||
if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
|
||||
*byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_writew(device_t dev, u_char slave, char cmd, short word)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, word);
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
|
||||
|
||||
error = amdsmb_wait(sc);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
int error;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
|
||||
|
||||
if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
|
||||
*word = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
|
||||
|
||||
AMDPM_DEBUG(printf("amdpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
u_char remain, len, i;
|
||||
int error = SMB_ENOERR;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if(!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
remain = count;
|
||||
while (remain) {
|
||||
len = min(remain, 32);
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
|
||||
|
||||
/*
|
||||
* Do we have to reset the internal 32-byte buffer?
|
||||
* Can't see how to do this from the data sheet.
|
||||
*/
|
||||
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, len);
|
||||
|
||||
/* Fill the 32-byte internal buffer */
|
||||
for (i=0; i<len; i++) {
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTDFIFO, buf[count-remain+i]);
|
||||
DELAY(2);
|
||||
}
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
|
||||
|
||||
if ((error = amdsmb_wait(sc)) != SMB_ENOERR)
|
||||
goto error;
|
||||
|
||||
remain -= len;
|
||||
}
|
||||
|
||||
error:
|
||||
AMDPM_DEBUG(printf("amdpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
amdsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
|
||||
{
|
||||
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
||||
u_char remain, len, i;
|
||||
int error = SMB_ENOERR;
|
||||
u_short l;
|
||||
|
||||
amdsmb_clear(sc);
|
||||
if (!amdsmb_idle(sc))
|
||||
return (SMB_EBUSY);
|
||||
|
||||
remain = count;
|
||||
while (remain) {
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
|
||||
|
||||
AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
|
||||
|
||||
l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
|
||||
AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
|
||||
|
||||
if ((error = amdsmb_wait(sc)) != SMB_ENOERR)
|
||||
goto error;
|
||||
|
||||
len = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
|
||||
|
||||
/* Read the 32-byte internal buffer */
|
||||
for (i=0; i<len; i++) {
|
||||
buf[count-remain+i] = AMDPM_SMBINB(sc, AMDSMB_HSTDFIFO);
|
||||
DELAY(2);
|
||||
}
|
||||
|
||||
remain -= len;
|
||||
}
|
||||
error:
|
||||
AMDPM_DEBUG(printf("amdpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static devclass_t amdpm_devclass;
|
||||
|
||||
static device_method_t amdpm_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, amdpm_probe),
|
||||
DEVMETHOD(device_attach, amdpm_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t amdpm_driver = {
|
||||
"amdpm",
|
||||
amdpm_methods,
|
||||
sizeof(struct amdpm_softc),
|
||||
};
|
||||
|
||||
static devclass_t amdsmb_devclass;
|
||||
|
||||
static device_method_t amdsmb_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, amdsmb_probe),
|
||||
DEVMETHOD(device_attach, amdsmb_attach),
|
||||
|
||||
/* Bus interface */
|
||||
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
||||
|
||||
/* SMBus interface */
|
||||
DEVMETHOD(smbus_callback, amdsmb_smb_callback),
|
||||
DEVMETHOD(smbus_quick, amdsmb_smb_quick),
|
||||
DEVMETHOD(smbus_sendb, amdsmb_smb_sendb),
|
||||
DEVMETHOD(smbus_recvb, amdsmb_smb_recvb),
|
||||
DEVMETHOD(smbus_writeb, amdsmb_smb_writeb),
|
||||
DEVMETHOD(smbus_readb, amdsmb_smb_readb),
|
||||
DEVMETHOD(smbus_writew, amdsmb_smb_writew),
|
||||
DEVMETHOD(smbus_readw, amdsmb_smb_readw),
|
||||
DEVMETHOD(smbus_bwrite, amdsmb_smb_bwrite),
|
||||
DEVMETHOD(smbus_bread, amdsmb_smb_bread),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t amdsmb_driver = {
|
||||
"amdsmb",
|
||||
amdsmb_methods,
|
||||
sizeof(struct amdsmb_softc),
|
||||
};
|
||||
|
||||
DRIVER_MODULE(amdpm, pci, amdpm_driver, amdpm_devclass, 0, 0);
|
||||
DRIVER_MODULE(amdsmb, amdpm, amdsmb_driver, amdsmb_devclass, 0, 0);
|
||||
Loading…
x
Reference in New Issue
Block a user