Make this file mostly conform to style(9).
Approved by: msmith in principle before walkabout
This commit is contained in:
Warner Losh
parent
39dccc6f6d
commit
c9579f73e0
@ -540,59 +540,59 @@ pci_get_powerstate_method(device_t dev, device_t child)
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static __inline void
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pci_set_command_bit(device_t dev, device_t child, u_int16_t bit)
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{
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u_int16_t command;
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u_int16_t command;
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command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
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command |= bit;
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PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
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command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
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command |= bit;
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PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
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}
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static __inline void
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pci_clear_command_bit(device_t dev, device_t child, u_int16_t bit)
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{
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u_int16_t command;
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u_int16_t command;
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command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
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command &= ~bit;
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PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
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command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
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command &= ~bit;
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PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
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}
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void
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pci_enable_busmaster_method(device_t dev, device_t child)
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{
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pci_set_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
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pci_set_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
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}
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void
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pci_disable_busmaster_method(device_t dev, device_t child)
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{
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pci_clear_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
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pci_clear_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
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}
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void
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pci_enable_io_method(device_t dev, device_t child, int space)
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{
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switch(space) {
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case SYS_RES_IOPORT:
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pci_set_command_bit(dev, child, PCIM_CMD_PORTEN);
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break;
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case SYS_RES_MEMORY:
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pci_set_command_bit(dev, child, PCIM_CMD_MEMEN);
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break;
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}
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switch(space) {
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case SYS_RES_IOPORT:
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pci_set_command_bit(dev, child, PCIM_CMD_PORTEN);
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break;
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case SYS_RES_MEMORY:
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pci_set_command_bit(dev, child, PCIM_CMD_MEMEN);
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break;
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}
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}
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void
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pci_disable_io_method(device_t dev, device_t child, int space)
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{
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switch(space) {
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case SYS_RES_IOPORT:
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pci_clear_command_bit(dev, child, PCIM_CMD_PORTEN);
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break;
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case SYS_RES_MEMORY:
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pci_clear_command_bit(dev, child, PCIM_CMD_MEMEN);
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break;
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}
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switch(space) {
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case SYS_RES_IOPORT:
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pci_clear_command_bit(dev, child, PCIM_CMD_PORTEN);
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break;
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case SYS_RES_MEMORY:
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pci_clear_command_bit(dev, child, PCIM_CMD_MEMEN);
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break;
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}
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}
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/*
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@ -607,30 +607,31 @@ pci_print_verbose(struct pci_devinfo *dinfo)
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pcicfgregs *cfg = &dinfo->cfg;
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printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
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cfg->vendor, cfg->device, cfg->revid);
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cfg->vendor, cfg->device, cfg->revid);
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printf("\tbus=%d, slot=%d, func=%d\n",
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cfg->bus, cfg->slot, cfg->func);
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cfg->bus, cfg->slot, cfg->func);
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printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
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cfg->baseclass, cfg->subclass, cfg->progif,
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cfg->hdrtype, cfg->mfdev);
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cfg->baseclass, cfg->subclass, cfg->progif, cfg->hdrtype,
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cfg->mfdev);
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#ifdef PCI_DEBUG
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printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
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printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
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cfg->lattimer, cfg->lattimer * 30,
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cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
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cfg->lattimer, cfg->lattimer * 30, cfg->mingnt,
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cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
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#endif /* PCI_DEBUG */
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if (cfg->intpin > 0)
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printf("\tintpin=%c, irq=%d\n", cfg->intpin +'a' -1, cfg->intline);
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printf("\tintpin=%c, irq=%d\n",
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cfg->intpin +'a' -1, cfg->intline);
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if (cfg->pp_cap) {
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u_int16_t status;
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status = pci_read_config(cfg->dev, cfg->pp_status, 2);
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printf("\tpowerspec %d supports D0%s%s D3 current D%d\n",
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cfg->pp_cap & PCIM_PCAP_SPEC,
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cfg->pp_cap & PCIM_PCAP_D1SUPP ? " D1" : "",
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cfg->pp_cap & PCIM_PCAP_D2SUPP ? " D2" : "",
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status & PCIM_PSTAT_DMASK);
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cfg->pp_cap & PCIM_PCAP_SPEC,
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cfg->pp_cap & PCIM_PCAP_D1SUPP ? " D1" : "",
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cfg->pp_cap & PCIM_PCAP_D2SUPP ? " D2" : "",
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status & PCIM_PSTAT_DMASK);
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}
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}
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}
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@ -690,8 +691,8 @@ pci_add_map(device_t pcib, int b, int s, int f, int reg,
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if (bootverbose) {
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printf("\tmap[%02x]: type %x, range %2d, base %08x, size %2d",
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reg, pci_maptype(map), ln2range,
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(unsigned int) base, ln2size);
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reg, pci_maptype(map), ln2range,
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(unsigned int) base, ln2size);
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if (type == SYS_RES_IOPORT && !pci_porten(pcib, b, s, f))
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printf(", port disabled\n");
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else if (type == SYS_RES_MEMORY && !pci_memen(pcib, b, s, f))
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@ -725,9 +726,8 @@ pci_add_map(device_t pcib, int b, int s, int f, int reg,
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return 1;
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#endif
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resource_list_add(rl, type, reg,
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base, base + (1 << ln2size) - 1,
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(1 << ln2size));
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resource_list_add(rl, type, reg, base, base + (1 << ln2size) - 1,
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(1 << ln2size));
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return (ln2range == 64) ? 2 : 1;
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}
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@ -751,20 +751,14 @@ pci_add_resources(device_t pcib, int b, int s, int f, device_t dev)
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pci_add_map(pcib, b, s, f, q->arg1, rl);
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}
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if (cfg->intpin > 0 && cfg->intline != 255
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#ifdef __i386__
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&& cfg->intline != 0
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#endif
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) {
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if (cfg->intpin > 0 && cfg->intline != 255) {
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#ifdef __ia64__
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/*
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* Re-route interrupts on ia64 so that we can get the
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* I/O SAPIC interrupt numbers (the BIOS leaves legacy
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* PIC interrupt numbers in the intline registers).
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*/
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cfg->intline = PCIB_ROUTE_INTERRUPT(pcib,
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dev,
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cfg->intpin);
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cfg->intline = PCIB_ROUTE_INTERRUPT(pcib, dev, cfg->intpin);
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#endif
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resource_list_add(rl, SYS_RES_IRQ, 0,
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cfg->intline, cfg->intline, 1);
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@ -823,7 +817,8 @@ pci_probe(device_t dev)
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if (!once) {
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make_dev(&pcicdev, 0, UID_ROOT, GID_WHEEL, 0644, "pci");
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if ((vendordata = preload_search_by_type("pci_vendor_data")) != NULL) {
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if ((vendordata = preload_search_by_type("pci_vendor_data"))
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!= NULL) {
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info = preload_search_info(vendordata, MODINFO_ADDR);
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pci_vendordata = *(char **)info;
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info = preload_search_info(vendordata, MODINFO_SIZE);
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@ -858,7 +853,7 @@ pci_print_child(device_t dev, device_t child)
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retval += printf(" flags %#x", device_get_flags(dev));
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retval += printf(" at device %d.%d", pci_get_slot(child),
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pci_get_function(child));
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pci_get_function(child));
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retval += bus_print_child_footer(dev, child);
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@ -941,28 +936,28 @@ pci_probe_nomatch(device_t dev, device_t child)
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device_printf(dev, "<%s>", device);
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free(device, M_DEVBUF);
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} else {
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/*
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* Scan the class/subclass descriptions for a general description.
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*/
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cp = "unknown";
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scp = NULL;
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for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
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if (pci_nomatch_tab[i].class == pci_get_class(child)) {
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if (pci_nomatch_tab[i].subclass == -1) {
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cp = pci_nomatch_tab[i].desc;
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} else if (pci_nomatch_tab[i].subclass == pci_get_subclass(child)) {
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scp = pci_nomatch_tab[i].desc;
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}
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/*
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* Scan the class/subclass descriptions for a general
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* description.
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*/
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cp = "unknown";
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scp = NULL;
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for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
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if (pci_nomatch_tab[i].class == pci_get_class(child)) {
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if (pci_nomatch_tab[i].subclass == -1) {
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cp = pci_nomatch_tab[i].desc;
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} else if (pci_nomatch_tab[i].subclass ==
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pci_get_subclass(child)) {
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scp = pci_nomatch_tab[i].desc;
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}
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}
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}
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}
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device_printf(dev, "<%s%s%s>",
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cp ? : "",
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((cp != NULL) && (scp != NULL)) ? ", " : "",
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scp ? : "");
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device_printf(dev, "<%s%s%s>",
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cp ? : "", ((cp != NULL) && (scp != NULL)) ? ", " : "",
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scp ? : "");
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}
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printf(" at device %d.%d (no driver attached)\n",
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pci_get_slot(child),
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pci_get_function(child));
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pci_get_slot(child), pci_get_function(child));
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return;
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}
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@ -1011,10 +1006,12 @@ pci_describe_parse_line(char **ptr, int *vendor, int *device, char **desc)
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}
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/* vendor entry? */
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if (*cp != '\t' && sscanf(cp, "%x\t%80[^\n]", vendor, *desc) == 2)
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if (*cp != '\t' &&
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sscanf(cp, "%x\t%80[^\n]", vendor, *desc) == 2)
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break;
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/* device entry? */
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if (*cp == '\t' && sscanf(cp, "%x\t%80[^\n]", device, *desc) == 2)
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if (*cp == '\t' &&
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sscanf(cp, "%x\t%80[^\n]", device, *desc) == 2)
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break;
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/* skip to next line */
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@ -1080,7 +1077,8 @@ pci_describe_device(device_t dev)
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}
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if (dp[0] == '\0')
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snprintf(dp, 80, "0x%x", pci_get_device(dev));
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if ((desc = malloc(strlen(vp) + strlen(dp) + 3, M_DEVBUF, M_NOWAIT)) != NULL)
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if ((desc = malloc(strlen(vp) + strlen(dp) + 3, M_DEVBUF, M_NOWAIT)) !=
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NULL)
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sprintf(desc, "%s, %s", vp, dp);
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out:
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if (vp != NULL)
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@ -1195,22 +1193,25 @@ pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
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*/
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if (device_get_parent(child) == dev) {
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/*
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* If device doesn't have an interrupt routed, and is deserving of
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* an interrupt, try to assign it one.
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* If device doesn't have an interrupt routed, and is
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* deserving of an interrupt, try to assign it one.
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*/
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if ((type == SYS_RES_IRQ) && (cfg->intline == 255 || cfg->intline == 0) && (cfg->intpin != 0)) {
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cfg->intline = PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child,
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cfg->intpin);
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if ((type == SYS_RES_IRQ) &&
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(cfg->intline == 255 || cfg->intline == 0) && /* 0 bad? */
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(cfg->intpin != 0)) {
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cfg->intline = PCIB_ROUTE_INTERRUPT(
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device_get_parent(dev), child, cfg->intpin);
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if (cfg->intline != 255) {
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pci_write_config(child, PCIR_INTLINE, cfg->intline, 1);
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pci_write_config(child, PCIR_INTLINE,
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cfg->intline, 1);
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resource_list_add(rl, SYS_RES_IRQ, 0,
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cfg->intline, cfg->intline, 1);
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cfg->intline, cfg->intline, 1);
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}
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}
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}
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return resource_list_alloc(rl, dev, child, type, rid,
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start, end, count, flags);
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start, end, count, flags);
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}
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void
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@ -1265,8 +1266,7 @@ pci_read_config_method(device_t dev, device_t child, int reg, int width)
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pcicfgregs *cfg = &dinfo->cfg;
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return PCIB_READ_CONFIG(device_get_parent(dev),
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cfg->bus, cfg->slot, cfg->func,
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reg, width);
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cfg->bus, cfg->slot, cfg->func, reg, width);
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}
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void
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@ -1277,8 +1277,7 @@ pci_write_config_method(device_t dev, device_t child, int reg,
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pcicfgregs *cfg = &dinfo->cfg;
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PCIB_WRITE_CONFIG(device_get_parent(dev),
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cfg->bus, cfg->slot, cfg->func,
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reg, val, width);
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cfg->bus, cfg->slot, cfg->func, reg, val, width);
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}
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static int
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