MFp4 //depot/projects/usb; 157412
Sync from svn.freebsd.org/base/user/thompsa/usb which is a minimal changeset from oldUSB (no config_td). This excludes the taskqueue changes (for the moment) as requested.
This commit is contained in:
Andrew Thompson
parent
3630903af2
commit
caba0185f0
File diff suppressed because it is too large
Load Diff
@ -17,219 +17,219 @@
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define RT2573_NOISE_FLOOR -95
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#define RT2573_NOISE_FLOOR -95
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#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc))
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#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc))
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#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc))
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#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc))
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#define RT2573_CONFIG_NO 1
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#define RT2573_IFACE_INDEX 0
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#define RT2573_CONFIG_NO 1
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#define RT2573_IFACE_INDEX 0
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#define RT2573_MCU_CNTL 0x01
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#define RT2573_WRITE_MAC 0x02
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#define RT2573_READ_MAC 0x03
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#define RT2573_WRITE_MULTI_MAC 0x06
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#define RT2573_READ_MULTI_MAC 0x07
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#define RT2573_READ_EEPROM 0x09
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#define RT2573_WRITE_LED 0x0a
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#define RT2573_MCU_CNTL 0x01
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#define RT2573_WRITE_MAC 0x02
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#define RT2573_READ_MAC 0x03
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#define RT2573_WRITE_MULTI_MAC 0x06
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#define RT2573_READ_MULTI_MAC 0x07
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#define RT2573_READ_EEPROM 0x09
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#define RT2573_WRITE_LED 0x0a
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/*
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* Control and status registers.
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*/
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#define RT2573_AIFSN_CSR 0x0400
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#define RT2573_CWMIN_CSR 0x0404
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#define RT2573_CWMAX_CSR 0x0408
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#define RT2573_MCU_CODE_BASE 0x0800
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#define RT2573_HW_BEACON_BASE0 0x2400
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#define RT2573_MAC_CSR0 0x3000
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#define RT2573_MAC_CSR1 0x3004
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#define RT2573_MAC_CSR2 0x3008
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#define RT2573_MAC_CSR3 0x300c
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#define RT2573_MAC_CSR4 0x3010
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#define RT2573_MAC_CSR5 0x3014
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#define RT2573_MAC_CSR6 0x3018
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#define RT2573_MAC_CSR7 0x301c
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#define RT2573_MAC_CSR8 0x3020
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#define RT2573_MAC_CSR9 0x3024
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#define RT2573_MAC_CSR10 0x3028
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#define RT2573_MAC_CSR11 0x302c
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#define RT2573_MAC_CSR12 0x3030
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#define RT2573_MAC_CSR13 0x3034
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#define RT2573_MAC_CSR14 0x3038
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#define RT2573_MAC_CSR15 0x303c
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#define RT2573_TXRX_CSR0 0x3040
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#define RT2573_TXRX_CSR1 0x3044
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#define RT2573_TXRX_CSR2 0x3048
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#define RT2573_TXRX_CSR3 0x304c
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#define RT2573_TXRX_CSR4 0x3050
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#define RT2573_TXRX_CSR5 0x3054
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#define RT2573_TXRX_CSR6 0x3058
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#define RT2573_TXRX_CSR7 0x305c
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#define RT2573_TXRX_CSR8 0x3060
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#define RT2573_TXRX_CSR9 0x3064
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#define RT2573_TXRX_CSR10 0x3068
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#define RT2573_TXRX_CSR11 0x306c
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#define RT2573_TXRX_CSR12 0x3070
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#define RT2573_TXRX_CSR13 0x3074
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#define RT2573_TXRX_CSR14 0x3078
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#define RT2573_TXRX_CSR15 0x307c
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#define RT2573_PHY_CSR0 0x3080
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#define RT2573_PHY_CSR1 0x3084
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#define RT2573_PHY_CSR2 0x3088
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#define RT2573_PHY_CSR3 0x308c
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#define RT2573_PHY_CSR4 0x3090
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#define RT2573_PHY_CSR5 0x3094
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#define RT2573_PHY_CSR6 0x3098
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#define RT2573_PHY_CSR7 0x309c
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#define RT2573_SEC_CSR0 0x30a0
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#define RT2573_SEC_CSR1 0x30a4
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#define RT2573_SEC_CSR2 0x30a8
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#define RT2573_SEC_CSR3 0x30ac
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#define RT2573_SEC_CSR4 0x30b0
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#define RT2573_SEC_CSR5 0x30b4
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#define RT2573_STA_CSR0 0x30c0
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#define RT2573_STA_CSR1 0x30c4
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#define RT2573_STA_CSR2 0x30c8
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#define RT2573_STA_CSR3 0x30cc
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#define RT2573_STA_CSR4 0x30d0
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#define RT2573_STA_CSR5 0x30d4
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#define RT2573_AIFSN_CSR 0x0400
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#define RT2573_CWMIN_CSR 0x0404
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#define RT2573_CWMAX_CSR 0x0408
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#define RT2573_MCU_CODE_BASE 0x0800
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#define RT2573_HW_BEACON_BASE0 0x2400
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#define RT2573_MAC_CSR0 0x3000
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#define RT2573_MAC_CSR1 0x3004
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#define RT2573_MAC_CSR2 0x3008
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#define RT2573_MAC_CSR3 0x300c
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#define RT2573_MAC_CSR4 0x3010
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#define RT2573_MAC_CSR5 0x3014
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#define RT2573_MAC_CSR6 0x3018
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#define RT2573_MAC_CSR7 0x301c
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#define RT2573_MAC_CSR8 0x3020
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#define RT2573_MAC_CSR9 0x3024
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#define RT2573_MAC_CSR10 0x3028
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#define RT2573_MAC_CSR11 0x302c
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#define RT2573_MAC_CSR12 0x3030
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#define RT2573_MAC_CSR13 0x3034
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#define RT2573_MAC_CSR14 0x3038
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#define RT2573_MAC_CSR15 0x303c
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#define RT2573_TXRX_CSR0 0x3040
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#define RT2573_TXRX_CSR1 0x3044
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#define RT2573_TXRX_CSR2 0x3048
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#define RT2573_TXRX_CSR3 0x304c
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#define RT2573_TXRX_CSR4 0x3050
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#define RT2573_TXRX_CSR5 0x3054
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#define RT2573_TXRX_CSR6 0x3058
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#define RT2573_TXRX_CSR7 0x305c
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#define RT2573_TXRX_CSR8 0x3060
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#define RT2573_TXRX_CSR9 0x3064
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#define RT2573_TXRX_CSR10 0x3068
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#define RT2573_TXRX_CSR11 0x306c
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#define RT2573_TXRX_CSR12 0x3070
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#define RT2573_TXRX_CSR13 0x3074
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#define RT2573_TXRX_CSR14 0x3078
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#define RT2573_TXRX_CSR15 0x307c
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#define RT2573_PHY_CSR0 0x3080
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#define RT2573_PHY_CSR1 0x3084
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#define RT2573_PHY_CSR2 0x3088
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#define RT2573_PHY_CSR3 0x308c
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#define RT2573_PHY_CSR4 0x3090
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#define RT2573_PHY_CSR5 0x3094
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#define RT2573_PHY_CSR6 0x3098
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#define RT2573_PHY_CSR7 0x309c
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#define RT2573_SEC_CSR0 0x30a0
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#define RT2573_SEC_CSR1 0x30a4
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#define RT2573_SEC_CSR2 0x30a8
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#define RT2573_SEC_CSR3 0x30ac
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#define RT2573_SEC_CSR4 0x30b0
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#define RT2573_SEC_CSR5 0x30b4
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#define RT2573_STA_CSR0 0x30c0
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#define RT2573_STA_CSR1 0x30c4
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#define RT2573_STA_CSR2 0x30c8
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#define RT2573_STA_CSR3 0x30cc
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#define RT2573_STA_CSR4 0x30d0
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#define RT2573_STA_CSR5 0x30d4
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/* possible flags for register RT2573_MAC_CSR1 */
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#define RT2573_RESET_ASIC (1 << 0)
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#define RT2573_RESET_BBP (1 << 1)
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#define RT2573_HOST_READY (1 << 2)
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#define RT2573_RESET_ASIC (1 << 0)
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#define RT2573_RESET_BBP (1 << 1)
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#define RT2573_HOST_READY (1 << 2)
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/* possible flags for register MAC_CSR5 */
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#define RT2573_ONE_BSSID 3
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#define RT2573_ONE_BSSID 3
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/* possible flags for register TXRX_CSR0 */
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/* Tx filter flags are in the low 16 bits */
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#define RT2573_AUTO_TX_SEQ (1 << 15)
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#define RT2573_AUTO_TX_SEQ (1 << 15)
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/* Rx filter flags are in the high 16 bits */
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#define RT2573_DISABLE_RX (1 << 16)
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#define RT2573_DROP_CRC_ERROR (1 << 17)
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#define RT2573_DROP_PHY_ERROR (1 << 18)
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#define RT2573_DROP_CTL (1 << 19)
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#define RT2573_DROP_NOT_TO_ME (1 << 20)
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#define RT2573_DROP_TODS (1 << 21)
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#define RT2573_DROP_VER_ERROR (1 << 22)
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#define RT2573_DROP_MULTICAST (1 << 23)
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#define RT2573_DROP_BROADCAST (1 << 24)
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#define RT2573_DROP_ACKCTS (1 << 25)
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#define RT2573_DISABLE_RX (1 << 16)
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#define RT2573_DROP_CRC_ERROR (1 << 17)
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#define RT2573_DROP_PHY_ERROR (1 << 18)
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#define RT2573_DROP_CTL (1 << 19)
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#define RT2573_DROP_NOT_TO_ME (1 << 20)
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#define RT2573_DROP_TODS (1 << 21)
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#define RT2573_DROP_VER_ERROR (1 << 22)
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#define RT2573_DROP_MULTICAST (1 << 23)
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#define RT2573_DROP_BROADCAST (1 << 24)
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#define RT2573_DROP_ACKCTS (1 << 25)
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/* possible flags for register TXRX_CSR4 */
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#define RT2573_SHORT_PREAMBLE (1 << 18)
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#define RT2573_MRR_ENABLED (1 << 19)
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#define RT2573_MRR_CCK_FALLBACK (1 << 22)
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#define RT2573_SHORT_PREAMBLE (1 << 18)
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#define RT2573_MRR_ENABLED (1 << 19)
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#define RT2573_MRR_CCK_FALLBACK (1 << 22)
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/* possible flags for register TXRX_CSR9 */
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#define RT2573_TSF_TICKING (1 << 16)
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#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17)
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#define RT2573_TSF_TICKING (1 << 16)
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#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17)
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/* TBTT stands for Target Beacon Transmission Time */
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#define RT2573_ENABLE_TBTT (1 << 19)
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#define RT2573_GENERATE_BEACON (1 << 20)
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#define RT2573_ENABLE_TBTT (1 << 19)
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#define RT2573_GENERATE_BEACON (1 << 20)
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/* possible flags for register PHY_CSR0 */
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#define RT2573_PA_PE_2GHZ (1 << 16)
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#define RT2573_PA_PE_5GHZ (1 << 17)
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#define RT2573_PA_PE_2GHZ (1 << 16)
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#define RT2573_PA_PE_5GHZ (1 << 17)
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/* possible flags for register PHY_CSR3 */
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#define RT2573_BBP_READ (1 << 15)
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#define RT2573_BBP_BUSY (1 << 16)
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#define RT2573_BBP_READ (1 << 15)
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#define RT2573_BBP_BUSY (1 << 16)
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/* possible flags for register PHY_CSR4 */
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#define RT2573_RF_20BIT (20 << 24)
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#define RT2573_RF_BUSY (1 << 31)
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#define RT2573_RF_20BIT (20 << 24)
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#define RT2573_RF_BUSY (1 << 31)
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/* LED values */
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#define RT2573_LED_RADIO (1 << 8)
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#define RT2573_LED_G (1 << 9)
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#define RT2573_LED_A (1 << 10)
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#define RT2573_LED_ON 0x1e1e
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#define RT2573_LED_OFF 0x0
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#define RT2573_LED_RADIO (1 << 8)
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#define RT2573_LED_G (1 << 9)
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#define RT2573_LED_A (1 << 10)
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#define RT2573_LED_ON 0x1e1e
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#define RT2573_LED_OFF 0x0
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#define RT2573_MCU_RUN (1 << 3)
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#define RT2573_MCU_RUN (1 << 3)
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#define RT2573_SMART_MODE (1 << 0)
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#define RT2573_SMART_MODE (1 << 0)
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#define RT2573_BBPR94_DEFAULT 6
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#define RT2573_BBPR94_DEFAULT 6
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#define RT2573_BBP_WRITE (1 << 15)
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#define RT2573_BBP_WRITE (1 << 15)
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/* dual-band RF */
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#define RT2573_RF_5226 1
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#define RT2573_RF_5225 3
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#define RT2573_RF_5226 1
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#define RT2573_RF_5225 3
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/* single-band RF */
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#define RT2573_RF_2528 2
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#define RT2573_RF_2527 4
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#define RT2573_RF_2528 2
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#define RT2573_RF_2527 4
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#define RT2573_BBP_VERSION 0
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#define RT2573_BBP_VERSION 0
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struct rum_tx_desc {
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uint32_t flags;
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#define RT2573_TX_BURST (1 << 0)
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#define RT2573_TX_VALID (1 << 1)
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#define RT2573_TX_MORE_FRAG (1 << 2)
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#define RT2573_TX_NEED_ACK (1 << 3)
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#define RT2573_TX_TIMESTAMP (1 << 4)
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#define RT2573_TX_OFDM (1 << 5)
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#define RT2573_TX_IFS_SIFS (1 << 6)
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#define RT2573_TX_LONG_RETRY (1 << 7)
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uint16_t wme;
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#define RT2573_QID(v) (v)
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#define RT2573_AIFSN(v) ((v) << 4)
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#define RT2573_LOGCWMIN(v) ((v) << 8)
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#define RT2573_LOGCWMAX(v) ((v) << 12)
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uint32_t flags;
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#define RT2573_TX_BURST (1 << 0)
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#define RT2573_TX_VALID (1 << 1)
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#define RT2573_TX_MORE_FRAG (1 << 2)
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#define RT2573_TX_NEED_ACK (1 << 3)
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#define RT2573_TX_TIMESTAMP (1 << 4)
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#define RT2573_TX_OFDM (1 << 5)
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#define RT2573_TX_IFS_SIFS (1 << 6)
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#define RT2573_TX_LONG_RETRY (1 << 7)
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uint16_t xflags;
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#define RT2573_TX_HWSEQ (1 << 12)
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#define RT2573_TX_BEACON (1 << 15) /* Internal flag only! */
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uint16_t wme;
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#define RT2573_QID(v) (v)
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#define RT2573_AIFSN(v) ((v) << 4)
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#define RT2573_LOGCWMIN(v) ((v) << 8)
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#define RT2573_LOGCWMAX(v) ((v) << 12)
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uint8_t plcp_signal;
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uint8_t plcp_service;
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#define RT2573_PLCP_LENGEXT 0x80
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uint16_t xflags;
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#define RT2573_TX_HWSEQ (1 << 12)
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uint8_t plcp_length_lo;
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uint8_t plcp_length_hi;
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uint8_t plcp_signal;
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uint8_t plcp_service;
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#define RT2573_PLCP_LENGEXT 0x80
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uint32_t iv;
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uint32_t eiv;
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uint8_t plcp_length_lo;
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uint8_t plcp_length_hi;
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uint8_t offset;
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uint8_t qid;
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uint8_t txpower;
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#define RT2573_DEFAULT_TXPOWER 0
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uint32_t iv;
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uint32_t eiv;
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uint8_t reserved;
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uint8_t offset;
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uint8_t qid;
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uint8_t txpower;
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#define RT2573_DEFAULT_TXPOWER 0
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uint8_t reserved;
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} __packed;
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struct rum_rx_desc {
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uint32_t flags;
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#define RT2573_RX_BUSY (1 << 0)
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#define RT2573_RX_DROP (1 << 1)
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#define RT2573_RX_CRC_ERROR (1 << 6)
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#define RT2573_RX_OFDM (1 << 7)
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uint32_t flags;
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#define RT2573_RX_BUSY (1 << 0)
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#define RT2573_RX_DROP (1 << 1)
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#define RT2573_RX_CRC_ERROR (1 << 6)
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#define RT2573_RX_OFDM (1 << 7)
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uint8_t rate;
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uint8_t rssi;
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uint8_t reserved1;
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uint8_t offset;
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uint32_t iv;
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uint32_t eiv;
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uint32_t reserved2[2];
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uint8_t rate;
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uint8_t rssi;
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uint8_t reserved1;
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uint8_t offset;
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uint32_t iv;
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uint32_t eiv;
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uint32_t reserved2[2];
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} __packed;
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#define RT2573_RF1 0
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#define RT2573_RF2 2
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#define RT2573_RF3 1
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#define RT2573_RF4 3
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#define RT2573_RF1 0
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#define RT2573_RF2 2
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#define RT2573_RF3 1
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#define RT2573_RF4 3
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#define RT2573_EEPROM_MACBBP 0x0000
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#define RT2573_EEPROM_ADDRESS 0x0004
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#define RT2573_EEPROM_ANTENNA 0x0020
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#define RT2573_EEPROM_CONFIG2 0x0022
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#define RT2573_EEPROM_BBP_BASE 0x0026
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#define RT2573_EEPROM_TXPOWER 0x0046
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#define RT2573_EEPROM_FREQ_OFFSET 0x005e
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#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a
|
||||
#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c
|
||||
#define RT2573_EEPROM_MACBBP 0x0000
|
||||
#define RT2573_EEPROM_ADDRESS 0x0004
|
||||
#define RT2573_EEPROM_ANTENNA 0x0020
|
||||
#define RT2573_EEPROM_CONFIG2 0x0022
|
||||
#define RT2573_EEPROM_BBP_BASE 0x0026
|
||||
#define RT2573_EEPROM_TXPOWER 0x0046
|
||||
#define RT2573_EEPROM_FREQ_OFFSET 0x005e
|
||||
#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a
|
||||
#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $FreeBSD$ */
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr>
|
||||
@ -17,68 +17,19 @@
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct rum_node {
|
||||
struct ieee80211_node ni;
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
|
||||
#define RUM_NODE(ni) ((struct rum_node *)(ni))
|
||||
|
||||
struct rum_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct ieee80211_beacon_offsets bo;
|
||||
struct ieee80211_amrr amrr;
|
||||
|
||||
int (*newstate) (struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
|
||||
#define RUM_VAP(vap) ((struct rum_vap *)(vap))
|
||||
|
||||
struct rum_config_copy_chan {
|
||||
uint32_t chan_to_ieee;
|
||||
enum ieee80211_phymode chan_to_mode;
|
||||
uint8_t chan_is_5ghz:1;
|
||||
uint8_t chan_is_2ghz:1;
|
||||
uint8_t chan_is_b:1;
|
||||
uint8_t chan_is_a:1;
|
||||
uint8_t chan_is_g:1;
|
||||
uint8_t unused:3;
|
||||
};
|
||||
|
||||
struct rum_config_copy_bss {
|
||||
uint16_t ni_intval;
|
||||
uint8_t ni_bssid[IEEE80211_ADDR_LEN];
|
||||
uint8_t fixed_rate_none;
|
||||
};
|
||||
|
||||
struct rum_config_copy {
|
||||
struct rum_config_copy_chan ic_curchan;
|
||||
struct rum_config_copy_chan ic_bsschan;
|
||||
struct rum_config_copy_bss iv_bss;
|
||||
|
||||
enum ieee80211_opmode ic_opmode;
|
||||
uint32_t ic_flags;
|
||||
uint32_t if_flags;
|
||||
|
||||
uint16_t ic_txpowlimit;
|
||||
uint16_t ic_curmode;
|
||||
|
||||
uint8_t ic_myaddr[IEEE80211_ADDR_LEN];
|
||||
uint8_t if_broadcastaddr[IEEE80211_ADDR_LEN];
|
||||
};
|
||||
#define RUM_TX_LIST_COUNT 8
|
||||
|
||||
struct rum_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
};
|
||||
|
||||
#define RT2573_RX_RADIOTAP_PRESENT \
|
||||
#define RT2573_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
@ -87,91 +38,119 @@ struct rum_rx_radiotap_header {
|
||||
|
||||
struct rum_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
};
|
||||
|
||||
#define RT2573_TX_RADIOTAP_PRESENT \
|
||||
#define RT2573_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct rum_bbp_prom {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed;
|
||||
struct rum_softc;
|
||||
|
||||
struct rum_ifq {
|
||||
struct mbuf *ifq_head;
|
||||
struct mbuf *ifq_tail;
|
||||
uint16_t ifq_len;
|
||||
struct rum_task {
|
||||
struct usb2_proc_msg hdr;
|
||||
struct rum_softc *sc;
|
||||
};
|
||||
|
||||
struct rum_tx_data {
|
||||
STAILQ_ENTRY(rum_tx_data) next;
|
||||
struct rum_softc *sc;
|
||||
struct rum_tx_desc desc;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
int rate;
|
||||
};
|
||||
typedef STAILQ_HEAD(, rum_tx_data) rum_txdhead;
|
||||
|
||||
struct rum_node {
|
||||
struct ieee80211_node ni;
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
#define RUM_NODE(ni) ((struct rum_node *)(ni))
|
||||
|
||||
struct rum_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct rum_softc *sc;
|
||||
struct ieee80211_beacon_offsets bo;
|
||||
struct ieee80211_amrr amrr;
|
||||
struct usb2_callout amrr_ch;
|
||||
struct rum_task amrr_task[2];
|
||||
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define RUM_VAP(vap) ((struct rum_vap *)(vap))
|
||||
|
||||
enum {
|
||||
RUM_BULK_DT_WR,
|
||||
RUM_BULK_DT_RD,
|
||||
RUM_BULK_CS_WR,
|
||||
RUM_BULK_CS_RD,
|
||||
RUM_N_TRANSFER = 4,
|
||||
RUM_BULK_WR,
|
||||
RUM_BULK_RD,
|
||||
RUM_N_TRANSFER = 2,
|
||||
};
|
||||
|
||||
struct rum_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
struct ifnet *sc_ifp;
|
||||
device_t sc_dev;
|
||||
struct usb2_device *sc_udev;
|
||||
struct usb2_process sc_tq;
|
||||
|
||||
struct rum_ifq sc_tx_queue;
|
||||
struct usb2_config_td sc_config_td;
|
||||
struct rum_tx_desc sc_tx_desc;
|
||||
struct rum_rx_desc sc_rx_desc;
|
||||
struct mtx sc_mtx;
|
||||
struct usb2_callout sc_watchdog;
|
||||
struct rum_bbp_prom sc_bbp_prom[16];
|
||||
struct rum_rx_radiotap_header sc_rxtap;
|
||||
struct rum_tx_radiotap_header sc_txtap;
|
||||
|
||||
struct usb2_xfer *sc_xfer[RUM_N_TRANSFER];
|
||||
struct usb2_device *sc_udev;
|
||||
const struct ieee80211_rate_table *sc_rates;
|
||||
struct usb2_xfer *sc_xfer[RUM_N_TRANSFER];
|
||||
|
||||
int (*sc_newstate)
|
||||
(struct ieee80211com *, enum ieee80211_state, int);
|
||||
uint8_t rf_rev;
|
||||
uint8_t rffreq;
|
||||
|
||||
enum ieee80211_state sc_ns_state;
|
||||
uint32_t sc_sta[6];
|
||||
uint32_t sc_unit;
|
||||
int sc_ns_arg;
|
||||
enum ieee80211_state sc_state;
|
||||
int sc_arg;
|
||||
struct rum_task sc_synctask[2];
|
||||
struct rum_task sc_task[2];
|
||||
struct rum_task sc_promisctask[2];
|
||||
struct rum_task sc_scantask[2];
|
||||
int sc_scan_action;
|
||||
#define RUM_SCAN_START 0
|
||||
#define RUM_SCAN_END 1
|
||||
#define RUM_SET_CHANNEL 2
|
||||
|
||||
uint16_t sc_flags;
|
||||
#define RUM_FLAG_READ_STALL 0x0001
|
||||
#define RUM_FLAG_WRITE_STALL 0x0002
|
||||
#define RUM_FLAG_LL_READY 0x0008
|
||||
#define RUM_FLAG_HL_READY 0x0010
|
||||
#define RUM_FLAG_WAIT_COMMAND 0x0020
|
||||
uint16_t sc_txtap_len;
|
||||
uint16_t sc_rxtap_len;
|
||||
uint16_t sc_last_chan;
|
||||
struct rum_tx_data tx_data[RUM_TX_LIST_COUNT];
|
||||
rum_txdhead tx_q;
|
||||
rum_txdhead tx_free;
|
||||
int tx_nfree;
|
||||
struct rum_rx_desc sc_rx_desc;
|
||||
|
||||
uint8_t sc_txpow[44];
|
||||
uint8_t sc_rf_rev;
|
||||
uint8_t sc_rffreq;
|
||||
uint8_t sc_ftype;
|
||||
uint8_t sc_rx_ant;
|
||||
uint8_t sc_tx_ant;
|
||||
uint8_t sc_nb_ant;
|
||||
uint8_t sc_ext_2ghz_lna;
|
||||
uint8_t sc_ext_5ghz_lna;
|
||||
uint8_t sc_sifs;
|
||||
uint8_t sc_bbp17;
|
||||
uint8_t sc_hw_radio;
|
||||
uint8_t sc_amrr_timer;
|
||||
uint8_t sc_beacon_buf[0x800];
|
||||
uint8_t sc_myaddr[IEEE80211_ADDR_LEN];
|
||||
struct mtx sc_mtx;
|
||||
|
||||
int8_t sc_rssi_2ghz_corr;
|
||||
int8_t sc_rssi_5ghz_corr;
|
||||
uint32_t sta[6];
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[44];
|
||||
uint8_t sc_bssid[6];
|
||||
|
||||
char sc_name[32];
|
||||
struct {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed bbp_prom[16];
|
||||
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
int ext_2ghz_lna;
|
||||
int ext_5ghz_lna;
|
||||
int rssi_2ghz_corr;
|
||||
int rssi_5ghz_corr;
|
||||
uint8_t bbp17;
|
||||
|
||||
struct rum_rx_radiotap_header sc_rxtap;
|
||||
int sc_rxtap_len;
|
||||
|
||||
struct rum_tx_radiotap_header sc_txtap;
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define RUM_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RUM_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define RUM_LOCK_ASSERT(sc, t) mtx_assert(&(sc)->sc_mtx, t)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -17,182 +17,195 @@
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RAL_NOISE_FLOOR -95
|
||||
#define RAL_RSSI_CORR 120
|
||||
#define RAL_NOISE_FLOOR -95
|
||||
#define RAL_RSSI_CORR 120
|
||||
|
||||
#define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc))
|
||||
#define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc))
|
||||
#define RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */
|
||||
#if (RAL_FRAME_SIZE % 0x80)
|
||||
#error "Invalid RAL_FRAME_SIZE"
|
||||
#endif
|
||||
#define RAL_RX_DESC_SIZE (sizeof (struct ural_rx_desc))
|
||||
#define RAL_TX_DESC_SIZE (sizeof (struct ural_tx_desc))
|
||||
#define RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */
|
||||
|
||||
#define RAL_CONFIG_NO 1
|
||||
#define RAL_IFACE_INDEX 0
|
||||
#define RAL_CONFIG_NO 1
|
||||
#define RAL_IFACE_INDEX 0
|
||||
|
||||
#define RAL_VENDOR_REQUEST 0x01
|
||||
#define RAL_WRITE_MAC 0x02
|
||||
#define RAL_READ_MAC 0x03
|
||||
#define RAL_WRITE_MULTI_MAC 0x06
|
||||
#define RAL_READ_MULTI_MAC 0x07
|
||||
#define RAL_READ_EEPROM 0x09
|
||||
#define RAL_VENDOR_REQUEST 0x01
|
||||
#define RAL_WRITE_MAC 0x02
|
||||
#define RAL_READ_MAC 0x03
|
||||
#define RAL_WRITE_MULTI_MAC 0x06
|
||||
#define RAL_READ_MULTI_MAC 0x07
|
||||
#define RAL_READ_EEPROM 0x09
|
||||
|
||||
/* MAC registers. */
|
||||
#define RAL_MAC_CSR0 0x0400 /* ASIC Version */
|
||||
#define RAL_MAC_CSR1 0x0402 /* System control */
|
||||
#define RAL_MAC_CSR2 0x0404 /* MAC addr0 */
|
||||
#define RAL_MAC_CSR3 0x0406 /* MAC addr1 */
|
||||
#define RAL_MAC_CSR4 0x0408 /* MAC addr2 */
|
||||
#define RAL_MAC_CSR5 0x040a /* BSSID0 */
|
||||
#define RAL_MAC_CSR6 0x040c /* BSSID1 */
|
||||
#define RAL_MAC_CSR7 0x040e /* BSSID2 */
|
||||
#define RAL_MAC_CSR8 0x0410 /* Max frame length */
|
||||
#define RAL_MAC_CSR9 0x0412 /* Timer control */
|
||||
#define RAL_MAC_CSR10 0x0414 /* Slot time */
|
||||
#define RAL_MAC_CSR11 0x0416 /* IFS */
|
||||
#define RAL_MAC_CSR12 0x0418 /* EIFS */
|
||||
#define RAL_MAC_CSR13 0x041a /* Power mode0 */
|
||||
#define RAL_MAC_CSR14 0x041c /* Power mode1 */
|
||||
#define RAL_MAC_CSR15 0x041e /* Power saving transition0 */
|
||||
#define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */
|
||||
#define RAL_MAC_CSR17 0x0422 /* Power state control */
|
||||
#define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */
|
||||
#define RAL_MAC_CSR19 0x0426 /* GPIO control */
|
||||
#define RAL_MAC_CSR20 0x0428 /* LED control0 */
|
||||
#define RAL_MAC_CSR22 0x042c /* XXX not documented */
|
||||
/*
|
||||
* MAC registers.
|
||||
*/
|
||||
#define RAL_MAC_CSR0 0x0400 /* ASIC Version */
|
||||
#define RAL_MAC_CSR1 0x0402 /* System control */
|
||||
#define RAL_MAC_CSR2 0x0404 /* MAC addr0 */
|
||||
#define RAL_MAC_CSR3 0x0406 /* MAC addr1 */
|
||||
#define RAL_MAC_CSR4 0x0408 /* MAC addr2 */
|
||||
#define RAL_MAC_CSR5 0x040a /* BSSID0 */
|
||||
#define RAL_MAC_CSR6 0x040c /* BSSID1 */
|
||||
#define RAL_MAC_CSR7 0x040e /* BSSID2 */
|
||||
#define RAL_MAC_CSR8 0x0410 /* Max frame length */
|
||||
#define RAL_MAC_CSR9 0x0412 /* Timer control */
|
||||
#define RAL_MAC_CSR10 0x0414 /* Slot time */
|
||||
#define RAL_MAC_CSR11 0x0416 /* IFS */
|
||||
#define RAL_MAC_CSR12 0x0418 /* EIFS */
|
||||
#define RAL_MAC_CSR13 0x041a /* Power mode0 */
|
||||
#define RAL_MAC_CSR14 0x041c /* Power mode1 */
|
||||
#define RAL_MAC_CSR15 0x041e /* Power saving transition0 */
|
||||
#define RAL_MAC_CSR16 0x0420 /* Power saving transition1 */
|
||||
#define RAL_MAC_CSR17 0x0422 /* Power state control */
|
||||
#define RAL_MAC_CSR18 0x0424 /* Auto wake-up control */
|
||||
#define RAL_MAC_CSR19 0x0426 /* GPIO control */
|
||||
#define RAL_MAC_CSR20 0x0428 /* LED control0 */
|
||||
#define RAL_MAC_CSR22 0x042c /* XXX not documented */
|
||||
|
||||
/* Tx/Rx Registers. */
|
||||
#define RAL_TXRX_CSR0 0x0440 /* Security control */
|
||||
#define RAL_TXRX_CSR2 0x0444 /* Rx control */
|
||||
#define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR10 0x0454 /* Auto responder control */
|
||||
#define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */
|
||||
#define RAL_TXRX_CSR18 0x0464 /* Beacon interval */
|
||||
#define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */
|
||||
#define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */
|
||||
#define RAL_TXRX_CSR21 0x046a /* XXX not documented */
|
||||
/*
|
||||
* Tx/Rx Registers.
|
||||
*/
|
||||
#define RAL_TXRX_CSR0 0x0440 /* Security control */
|
||||
#define RAL_TXRX_CSR2 0x0444 /* Rx control */
|
||||
#define RAL_TXRX_CSR5 0x044a /* CCK Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR6 0x044c /* CCK Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR7 0x044e /* OFDM Tx BBP ID0 */
|
||||
#define RAL_TXRX_CSR8 0x0450 /* OFDM Tx BBP ID1 */
|
||||
#define RAL_TXRX_CSR10 0x0454 /* Auto responder control */
|
||||
#define RAL_TXRX_CSR11 0x0456 /* Auto responder basic rate */
|
||||
#define RAL_TXRX_CSR18 0x0464 /* Beacon interval */
|
||||
#define RAL_TXRX_CSR19 0x0466 /* Beacon/sync control */
|
||||
#define RAL_TXRX_CSR20 0x0468 /* Beacon alignment */
|
||||
#define RAL_TXRX_CSR21 0x046a /* XXX not documented */
|
||||
|
||||
/* Security registers. */
|
||||
#define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */
|
||||
/*
|
||||
* Security registers.
|
||||
*/
|
||||
#define RAL_SEC_CSR0 0x0480 /* Shared key 0, word 0 */
|
||||
|
||||
/* PHY registers. */
|
||||
#define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */
|
||||
#define RAL_PHY_CSR4 0x04c8 /* Interface configuration */
|
||||
#define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */
|
||||
#define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */
|
||||
#define RAL_PHY_CSR7 0x04ce /* BBP serial control */
|
||||
#define RAL_PHY_CSR8 0x04d0 /* BBP serial status */
|
||||
#define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */
|
||||
#define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */
|
||||
/*
|
||||
* PHY registers.
|
||||
*/
|
||||
#define RAL_PHY_CSR2 0x04c4 /* Tx MAC configuration */
|
||||
#define RAL_PHY_CSR4 0x04c8 /* Interface configuration */
|
||||
#define RAL_PHY_CSR5 0x04ca /* BBP Pre-Tx CCK */
|
||||
#define RAL_PHY_CSR6 0x04cc /* BBP Pre-Tx OFDM */
|
||||
#define RAL_PHY_CSR7 0x04ce /* BBP serial control */
|
||||
#define RAL_PHY_CSR8 0x04d0 /* BBP serial status */
|
||||
#define RAL_PHY_CSR9 0x04d2 /* RF serial control0 */
|
||||
#define RAL_PHY_CSR10 0x04d4 /* RF serial control1 */
|
||||
|
||||
/* Statistics registers. */
|
||||
#define RAL_STA_CSR0 0x04e0 /* FCS error */
|
||||
/*
|
||||
* Statistics registers.
|
||||
*/
|
||||
#define RAL_STA_CSR0 0x04e0 /* FCS error */
|
||||
|
||||
#define RAL_DISABLE_RX (1 << 0)
|
||||
#define RAL_DROP_CRC (1 << 1)
|
||||
#define RAL_DROP_PHY (1 << 2)
|
||||
#define RAL_DROP_CTL (1 << 3)
|
||||
#define RAL_DROP_NOT_TO_ME (1 << 4)
|
||||
#define RAL_DROP_TODS (1 << 5)
|
||||
#define RAL_DROP_BAD_VERSION (1 << 6)
|
||||
#define RAL_DROP_MULTICAST (1 << 9)
|
||||
#define RAL_DROP_BROADCAST (1 << 10)
|
||||
|
||||
#define RAL_SHORT_PREAMBLE (1 << 2)
|
||||
#define RAL_DISABLE_RX (1 << 0)
|
||||
#define RAL_DROP_CRC (1 << 1)
|
||||
#define RAL_DROP_PHY (1 << 2)
|
||||
#define RAL_DROP_CTL (1 << 3)
|
||||
#define RAL_DROP_NOT_TO_ME (1 << 4)
|
||||
#define RAL_DROP_TODS (1 << 5)
|
||||
#define RAL_DROP_BAD_VERSION (1 << 6)
|
||||
#define RAL_DROP_MULTICAST (1 << 9)
|
||||
#define RAL_DROP_BROADCAST (1 << 10)
|
||||
|
||||
#define RAL_RESET_ASIC (1 << 0)
|
||||
#define RAL_RESET_BBP (1 << 1)
|
||||
#define RAL_HOST_READY (1 << 2)
|
||||
#define RAL_SHORT_PREAMBLE (1 << 2)
|
||||
|
||||
#define RAL_ENABLE_TSF (1 << 0)
|
||||
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
|
||||
#define RAL_ENABLE_TBCN (1 << 3)
|
||||
#define RAL_ENABLE_BEACON_GENERATOR (1 << 4)
|
||||
#define RAL_RESET_ASIC (1 << 0)
|
||||
#define RAL_RESET_BBP (1 << 1)
|
||||
#define RAL_HOST_READY (1 << 2)
|
||||
|
||||
#define RAL_RF_AWAKE (3 << 7)
|
||||
#define RAL_BBP_AWAKE (3 << 5)
|
||||
#define RAL_ENABLE_TSF (1 << 0)
|
||||
#define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1)
|
||||
#define RAL_ENABLE_TBCN (1 << 3)
|
||||
#define RAL_ENABLE_BEACON_GENERATOR (1 << 4)
|
||||
|
||||
#define RAL_BBP_WRITE (1 << 15)
|
||||
#define RAL_BBP_BUSY (1 << 0)
|
||||
#define RAL_RF_AWAKE (3 << 7)
|
||||
#define RAL_BBP_AWAKE (3 << 5)
|
||||
|
||||
#define RAL_RF1_AUTOTUNE 0x08000
|
||||
#define RAL_RF3_AUTOTUNE 0x00040
|
||||
#define RAL_BBP_WRITE (1 << 15)
|
||||
#define RAL_BBP_BUSY (1 << 0)
|
||||
|
||||
#define RAL_RF_2522 0x00
|
||||
#define RAL_RF_2523 0x01
|
||||
#define RAL_RF_2524 0x02
|
||||
#define RAL_RF_2525 0x03
|
||||
#define RAL_RF_2525E 0x04
|
||||
#define RAL_RF_2526 0x05
|
||||
#define RAL_RF1_AUTOTUNE 0x08000
|
||||
#define RAL_RF3_AUTOTUNE 0x00040
|
||||
|
||||
#define RAL_RF_2522 0x00
|
||||
#define RAL_RF_2523 0x01
|
||||
#define RAL_RF_2524 0x02
|
||||
#define RAL_RF_2525 0x03
|
||||
#define RAL_RF_2525E 0x04
|
||||
#define RAL_RF_2526 0x05
|
||||
/* dual-band RF */
|
||||
#define RAL_RF_5222 0x10
|
||||
#define RAL_RF_5222 0x10
|
||||
|
||||
#define RAL_BBP_VERSION 0
|
||||
#define RAL_BBP_TX 2
|
||||
#define RAL_BBP_RX 14
|
||||
#define RAL_BBP_VERSION 0
|
||||
#define RAL_BBP_TX 2
|
||||
#define RAL_BBP_RX 14
|
||||
|
||||
#define RAL_BBP_ANTA 0x00
|
||||
#define RAL_BBP_DIVERSITY 0x01
|
||||
#define RAL_BBP_ANTB 0x02
|
||||
#define RAL_BBP_ANTMASK 0x03
|
||||
#define RAL_BBP_FLIPIQ 0x04
|
||||
#define RAL_BBP_ANTA 0x00
|
||||
#define RAL_BBP_DIVERSITY 0x01
|
||||
#define RAL_BBP_ANTB 0x02
|
||||
#define RAL_BBP_ANTMASK 0x03
|
||||
#define RAL_BBP_FLIPIQ 0x04
|
||||
|
||||
#define RAL_JAPAN_FILTER 0x08
|
||||
|
||||
#define RAL_RF_LOBUSY (1 << 15)
|
||||
#define RAL_RF_BUSY (1 << 31)
|
||||
#define RAL_RF_20BIT (20 << 24)
|
||||
|
||||
#define RAL_RF1 0
|
||||
#define RAL_RF2 2
|
||||
#define RAL_RF3 1
|
||||
#define RAL_RF4 3
|
||||
|
||||
#define RAL_EEPROM_ADDRESS 0x0004
|
||||
#define RAL_EEPROM_TXPOWER 0x003c
|
||||
#define RAL_EEPROM_CONFIG0 0x0016
|
||||
#define RAL_EEPROM_BBP_BASE 0x001c
|
||||
#define RAL_JAPAN_FILTER 0x08
|
||||
|
||||
struct ural_tx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_TX_PACKET_ID(x) ((x) & 0xf)
|
||||
#define RAL_TX_RETRY(x) ((x) << 4)
|
||||
#define RAL_TX_MORE_FRAG (1 << 8)
|
||||
#define RAL_TX_ACK (1 << 9)
|
||||
#define RAL_TX_TIMESTAMP (1 << 10)
|
||||
#define RAL_TX_OFDM (1 << 11)
|
||||
#define RAL_TX_NEWSEQ (1 << 12)
|
||||
#define RAL_TX_IFS_MASK 0x00006000
|
||||
#define RAL_TX_IFS_BACKOFF (0 << 13)
|
||||
#define RAL_TX_IFS_SIFS (1 << 13)
|
||||
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
|
||||
#define RAL_TX_IFS_NONE (3 << 13)
|
||||
uint16_t wme;
|
||||
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
|
||||
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
|
||||
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
|
||||
#define RAL_IVOFFSET(x) (((x) & 0x3f))
|
||||
uint16_t reserved1;
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RAL_PLCP_LENGEXT 0x80
|
||||
uint8_t plcp_length_lo;
|
||||
uint8_t plcp_length_hi;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint32_t flags;
|
||||
#define RAL_TX_RETRY(x) ((x) << 4)
|
||||
#define RAL_TX_MORE_FRAG (1 << 8)
|
||||
#define RAL_TX_ACK (1 << 9)
|
||||
#define RAL_TX_TIMESTAMP (1 << 10)
|
||||
#define RAL_TX_OFDM (1 << 11)
|
||||
#define RAL_TX_NEWSEQ (1 << 12)
|
||||
|
||||
#define RAL_TX_IFS_MASK 0x00006000
|
||||
#define RAL_TX_IFS_BACKOFF (0 << 13)
|
||||
#define RAL_TX_IFS_SIFS (1 << 13)
|
||||
#define RAL_TX_IFS_NEWBACKOFF (2 << 13)
|
||||
#define RAL_TX_IFS_NONE (3 << 13)
|
||||
|
||||
uint16_t wme;
|
||||
#define RAL_LOGCWMAX(x) (((x) & 0xf) << 12)
|
||||
#define RAL_LOGCWMIN(x) (((x) & 0xf) << 8)
|
||||
#define RAL_AIFSN(x) (((x) & 0x3) << 6)
|
||||
#define RAL_IVOFFSET(x) (((x) & 0x3f))
|
||||
|
||||
uint16_t reserved1;
|
||||
uint8_t plcp_signal;
|
||||
uint8_t plcp_service;
|
||||
#define RAL_PLCP_LENGEXT 0x80
|
||||
|
||||
uint8_t plcp_length_lo;
|
||||
uint8_t plcp_length_hi;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
struct ural_rx_desc {
|
||||
uint32_t flags;
|
||||
#define RAL_RX_CRC_ERROR (1 << 5)
|
||||
#define RAL_RX_OFDM (1 << 6)
|
||||
#define RAL_RX_PHY_ERROR (1 << 7)
|
||||
uint8_t rssi;
|
||||
uint8_t rate;
|
||||
uint16_t reserved;
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
uint32_t flags;
|
||||
#define RAL_RX_CRC_ERROR (1 << 5)
|
||||
#define RAL_RX_OFDM (1 << 6)
|
||||
#define RAL_RX_PHY_ERROR (1 << 7)
|
||||
|
||||
uint8_t rssi;
|
||||
uint8_t rate;
|
||||
uint16_t reserved;
|
||||
|
||||
uint32_t iv;
|
||||
uint32_t eiv;
|
||||
} __packed;
|
||||
|
||||
#define RAL_RF_LOBUSY (1 << 15)
|
||||
#define RAL_RF_BUSY (1 << 31)
|
||||
#define RAL_RF_20BIT (20 << 24)
|
||||
|
||||
#define RAL_RF1 0
|
||||
#define RAL_RF2 2
|
||||
#define RAL_RF3 1
|
||||
#define RAL_RF4 3
|
||||
|
||||
#define RAL_EEPROM_ADDRESS 0x0004
|
||||
#define RAL_EEPROM_TXPOWER 0x003c
|
||||
#define RAL_EEPROM_CONFIG0 0x0016
|
||||
#define RAL_EEPROM_BBP_BASE 0x001c
|
||||
|
||||
@ -17,150 +17,139 @@
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct ural_node {
|
||||
struct ieee80211_node ni;
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
#define RAL_TX_LIST_COUNT 8
|
||||
|
||||
#define URAL_NODE(ni) ((struct ural_node *)(ni))
|
||||
#define URAL_SCAN_START 1
|
||||
#define URAL_SCAN_END 2
|
||||
#define URAL_SET_CHANNEL 3
|
||||
|
||||
struct ural_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct ieee80211_beacon_offsets bo;
|
||||
struct ieee80211_amrr amrr;
|
||||
|
||||
int (*newstate) (struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
|
||||
#define URAL_VAP(vap) ((struct ural_vap *)(vap))
|
||||
|
||||
struct ural_config_copy_chan {
|
||||
uint32_t chan_to_ieee;
|
||||
enum ieee80211_phymode chan_to_mode;
|
||||
uint8_t chan_is_5ghz:1;
|
||||
uint8_t chan_is_2ghz:1;
|
||||
uint8_t chan_is_b:1;
|
||||
uint8_t chan_is_a:1;
|
||||
uint8_t chan_is_g:1;
|
||||
uint8_t unused:3;
|
||||
};
|
||||
|
||||
struct ural_config_copy_bss {
|
||||
uint16_t ni_intval;
|
||||
uint8_t ni_bssid[IEEE80211_ADDR_LEN];
|
||||
uint8_t fixed_rate_none;
|
||||
};
|
||||
|
||||
struct ural_config_copy {
|
||||
struct ural_config_copy_chan ic_curchan;
|
||||
struct ural_config_copy_chan ic_bsschan;
|
||||
struct ural_config_copy_bss iv_bss;
|
||||
|
||||
enum ieee80211_opmode ic_opmode;
|
||||
uint32_t ic_flags;
|
||||
uint32_t if_flags;
|
||||
|
||||
uint16_t ic_txpowlimit;
|
||||
uint16_t ic_curmode;
|
||||
|
||||
uint8_t ic_myaddr[IEEE80211_ADDR_LEN];
|
||||
uint8_t if_broadcastaddr[IEEE80211_ADDR_LEN];
|
||||
};
|
||||
|
||||
struct ural_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
uint8_t wr_antenna;
|
||||
uint8_t wr_antsignal;
|
||||
};
|
||||
|
||||
#define RAL_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
|
||||
#define RAL_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA) | \
|
||||
(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
|
||||
|
||||
struct ural_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
uint8_t wt_antenna;
|
||||
};
|
||||
|
||||
#define RAL_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
#define RAL_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_ANTENNA))
|
||||
|
||||
struct ural_bbp_prom {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed;
|
||||
struct ural_softc;
|
||||
|
||||
struct ural_ifq {
|
||||
struct mbuf *ifq_head;
|
||||
struct mbuf *ifq_tail;
|
||||
uint16_t ifq_len;
|
||||
struct ural_task {
|
||||
struct usb2_proc_msg hdr;
|
||||
struct ural_softc *sc;
|
||||
};
|
||||
|
||||
struct ural_tx_data {
|
||||
STAILQ_ENTRY(ural_tx_data) next;
|
||||
struct ural_softc *sc;
|
||||
struct ural_tx_desc desc;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
int rate;
|
||||
};
|
||||
typedef STAILQ_HEAD(, ural_tx_data) ural_txdhead;
|
||||
|
||||
struct ural_node {
|
||||
struct ieee80211_node ni;
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
#define URAL_NODE(ni) ((struct ural_node *)(ni))
|
||||
|
||||
struct ural_vap {
|
||||
struct ieee80211vap vap;
|
||||
struct ural_softc *sc;
|
||||
struct ieee80211_beacon_offsets bo;
|
||||
struct ieee80211_amrr amrr;
|
||||
struct usb2_callout amrr_ch;
|
||||
struct ural_task amrr_task[2];
|
||||
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define URAL_VAP(vap) ((struct ural_vap *)(vap))
|
||||
|
||||
enum {
|
||||
URAL_BULK_DT_WR,
|
||||
URAL_BULK_DT_RD,
|
||||
URAL_BULK_CS_WR,
|
||||
URAL_BULK_CS_RD,
|
||||
URAL_N_TRANSFER = 4,
|
||||
URAL_BULK_WR,
|
||||
URAL_BULK_RD,
|
||||
URAL_N_TRANSFER = 2,
|
||||
};
|
||||
|
||||
struct ural_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
struct ifnet *sc_ifp;
|
||||
device_t sc_dev;
|
||||
struct usb2_device *sc_udev;
|
||||
struct usb2_process sc_tq;
|
||||
|
||||
struct ural_ifq sc_tx_queue;
|
||||
struct usb2_config_td sc_config_td;
|
||||
struct ural_tx_desc sc_tx_desc;
|
||||
struct ural_rx_desc sc_rx_desc;
|
||||
struct mtx sc_mtx;
|
||||
struct usb2_callout sc_watchdog;
|
||||
struct ural_bbp_prom sc_bbp_prom[16];
|
||||
struct ural_rx_radiotap_header sc_rxtap;
|
||||
struct ural_tx_radiotap_header sc_txtap;
|
||||
|
||||
struct usb2_xfer *sc_xfer[URAL_N_TRANSFER];
|
||||
struct usb2_device *sc_udev;
|
||||
const struct ieee80211_rate_table *sc_rates;
|
||||
|
||||
enum ieee80211_state sc_ns_state;
|
||||
uint32_t sc_unit;
|
||||
uint32_t sc_asic_rev;
|
||||
uint32_t sc_rf_regs[4];
|
||||
int sc_ns_arg;
|
||||
uint32_t asic_rev;
|
||||
uint8_t rf_rev;
|
||||
|
||||
uint16_t sc_flags;
|
||||
#define URAL_FLAG_READ_STALL 0x0001
|
||||
#define URAL_FLAG_WRITE_STALL 0x0002
|
||||
#define URAL_FLAG_LL_READY 0x0004
|
||||
#define URAL_FLAG_HL_READY 0x0008
|
||||
#define URAL_FLAG_WAIT_COMMAND 0x0010
|
||||
uint16_t sc_txtap_len;
|
||||
uint16_t sc_rxtap_len;
|
||||
uint16_t sc_sta[11];
|
||||
struct usb2_xfer *sc_xfer[URAL_N_TRANSFER];
|
||||
|
||||
uint8_t sc_rf_rev;
|
||||
uint8_t sc_txpow[14];
|
||||
uint8_t sc_led_mode;
|
||||
uint8_t sc_hw_radio;
|
||||
uint8_t sc_rx_ant;
|
||||
uint8_t sc_tx_ant;
|
||||
uint8_t sc_nb_ant;
|
||||
uint8_t sc_amrr_timer;
|
||||
uint8_t sc_myaddr[IEEE80211_ADDR_LEN];
|
||||
enum ieee80211_state sc_state;
|
||||
int sc_arg;
|
||||
int sc_scan_action; /* should be an enum */
|
||||
struct ural_task sc_synctask[2];
|
||||
struct ural_task sc_task[2];
|
||||
struct ural_task sc_promisctask[2];
|
||||
struct ural_task sc_scantask[2];
|
||||
|
||||
char sc_name[32];
|
||||
struct ural_tx_data tx_data[RAL_TX_LIST_COUNT];
|
||||
ural_txdhead tx_q;
|
||||
ural_txdhead tx_free;
|
||||
int tx_nfree;
|
||||
struct ural_rx_desc sc_rx_desc;
|
||||
|
||||
struct mtx sc_mtx;
|
||||
|
||||
uint16_t sta[11];
|
||||
uint32_t rf_regs[4];
|
||||
uint8_t txpow[14];
|
||||
uint8_t sc_bssid[6];
|
||||
|
||||
struct {
|
||||
uint8_t val;
|
||||
uint8_t reg;
|
||||
} __packed bbp_prom[16];
|
||||
|
||||
int led_mode;
|
||||
int hw_radio;
|
||||
int rx_ant;
|
||||
int tx_ant;
|
||||
int nb_ant;
|
||||
|
||||
struct ural_rx_radiotap_header sc_rxtap;
|
||||
int sc_rxtap_len;
|
||||
|
||||
struct ural_tx_radiotap_header sc_txtap;
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define RAL_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define RAL_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define RAL_LOCK_ASSERT(sc, t) mtx_assert(&(sc)->sc_mtx, t)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -26,7 +26,7 @@
|
||||
|
||||
/* $FreeBSD$ */
|
||||
|
||||
static const uint8_t zd1211_firmware[] = {
|
||||
uint8_t zd1211_firmware[] = {
|
||||
0x08, 0x91, 0xFF, 0xED, 0x09, 0x93, 0x1E, 0xEE,
|
||||
0xD1, 0x94, 0x11, 0xEE, 0x88, 0xD4, 0xD1, 0x96,
|
||||
0xD1, 0x98, 0x5C, 0x99, 0x5C, 0x99, 0x4C, 0x99,
|
||||
@ -672,9 +672,9 @@ static const uint8_t zd1211_firmware[] = {
|
||||
/*
|
||||
* current zd1211b firmware version.
|
||||
*/
|
||||
#define ZD1211B_FIRMWARE_VER 4705
|
||||
#define ZD1211B_FIRMWARE_VER 4705
|
||||
|
||||
static const uint8_t zd1211b_firmware[] = {
|
||||
uint8_t zd1211b_firmware[] = {
|
||||
0x08, 0x91, 0xff, 0xed, 0x09, 0x93, 0x1e, 0xee, 0xd1, 0x94, 0x11,
|
||||
0xee, 0x88, 0xd4, 0xd1, 0x96, 0xd1, 0x98, 0x5c, 0x99, 0x5c, 0x99,
|
||||
0x4c, 0x99, 0x04, 0x9d, 0xd1, 0x98, 0xd1, 0x9a, 0x03, 0xee, 0xf4,
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user