From cc641d93c64d00e284fa7c8f07095f6c5a6622cb Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Fri, 6 May 2011 02:45:02 +0000 Subject: [PATCH] Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC. Submitted by: Luiz Otavio O Souza --- sys/mips/atheros/ar71xx_gpio.c | 15 ++++++++++++++- sys/mips/atheros/ar71xx_gpiovar.h | 2 ++ sys/mips/atheros/ar724xreg.h | 2 -- sys/mips/atheros/ar91xxreg.h | 2 -- 4 files changed, 16 insertions(+), 5 deletions(-) diff --git a/sys/mips/atheros/ar71xx_gpio.c b/sys/mips/atheros/ar71xx_gpio.c index 866c72b5b740..09b4d50124f4 100644 --- a/sys/mips/atheros/ar71xx_gpio.c +++ b/sys/mips/atheros/ar71xx_gpio.c @@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include "gpio_if.h" @@ -144,7 +145,19 @@ static int ar71xx_gpio_pin_max(device_t dev, int *maxpin) { - *maxpin = AR71XX_GPIO_PINS - 1; + switch (ar71xx_soc) { + case AR71XX_SOC_AR9130: + case AR71XX_SOC_AR9132: + *maxpin = AR91XX_GPIO_PINS - 1; + break; + case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: + *maxpin = AR724X_GPIO_PINS - 1; + break; + default: + *maxpin = AR71XX_GPIO_PINS - 1; + } return (0); } diff --git a/sys/mips/atheros/ar71xx_gpiovar.h b/sys/mips/atheros/ar71xx_gpiovar.h index a9ed7e074221..3489f5a7aea5 100644 --- a/sys/mips/atheros/ar71xx_gpiovar.h +++ b/sys/mips/atheros/ar71xx_gpiovar.h @@ -52,6 +52,8 @@ GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits)) #define AR71XX_GPIO_PINS 12 +#define AR724X_GPIO_PINS 18 +#define AR91XX_GPIO_PINS 22 struct ar71xx_gpio_softc { device_t dev; diff --git a/sys/mips/atheros/ar724xreg.h b/sys/mips/atheros/ar724xreg.h index eaceb1d61886..73e20afe95d2 100644 --- a/sys/mips/atheros/ar724xreg.h +++ b/sys/mips/atheros/ar724xreg.h @@ -105,6 +105,4 @@ #define AR724X_GPIO_FUNC_UART_EN (1 >> 1) #define AR724X_GPIO_FUNC_JTAG_DISABLE (1 >> 0) -#define AR724X_GPIO_COUNT 18 - #endif diff --git a/sys/mips/atheros/ar91xxreg.h b/sys/mips/atheros/ar91xxreg.h index 729d9ffcf7d0..2dfaeb5936c0 100644 --- a/sys/mips/atheros/ar91xxreg.h +++ b/sys/mips/atheros/ar91xxreg.h @@ -81,6 +81,4 @@ #define AR91XX_GPIO_FUNC_UART_EN (1 << 8) #define AR91XX_GPIO_FUNC_USB_CLK_EN (1 << 4) -#define AR91XX_GPIO_COUNT 22 - #endif