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The Merlin analog register bank is from 0x7800 -> 0x78fc; fix the code

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to reflect this.
This commit is contained in:
Adrian Chadd 2011-05-21 09:23:18 +00:00
parent d6ee26ad02
commit cd50bf427a
2 changed files with 2 additions and 2 deletions
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2
sys/dev/ath/ath_hal/ah.c
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@ -1069,7 +1069,7 @@ ath_hal_ini_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia,
HAL_INI_VAL(ia, r, col));
/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x7900)
OS_DELAY(100);
DMA_YIELD(regWr);

2
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
View File

@ -430,7 +430,7 @@ ar9280WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
OS_REG_WRITE(ah, reg, val);
/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
if (reg >= 0x7800 && reg < 0x78a0)
if (reg >= 0x7800 && reg < 0x7900)
OS_DELAY(100);
DMA_YIELD(regWrites);