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o Move ISA specific code from ppc.c to ppc_isa.c -- a bus front-

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end for isa(4).
o  Add a seperate bus frontend for acpi(4) and allow ISA DMA for
   it when ISA is configured in the kernel. This allows acpi(4)
   attachments in non-ISA configurations, as is possible for ia64.
o  Add a seperate bus frontend for pci(4) and detect known single
   port parallel cards.
o  Merge PC98 specific changes under pc98/cbus into the MI driver.
   The changes are minor enough for conditional compilation and
   in this form invites better abstraction.
o  Have ppc(4) usabled on all platforms, now that ISA specifics
   are untangled enough.
This commit is contained in:
Marcel Moolenaar 2006-04-24 23:31:51 +00:00
parent 091c9b4961
commit cea4d8752f
22 changed files with 593 additions and 2753 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
sys/conf/files
View File

@ -796,6 +796,11 @@ dev/ppbus/ppi.c optional ppi
dev/ppbus/pps.c optional pps
dev/ppbus/vpo.c optional vpo
dev/ppbus/vpoio.c optional vpo
dev/ppc/ppc.c optional ppc
dev/ppc/ppc_acpi.c optional ppc acpi
dev/ppc/ppc_isa.c optional ppc isa
dev/ppc/ppc_pci.c optional ppc pci
dev/ppc/ppc_puc.c optional ppc puc
dev/pst/pst-iop.c optional pst
dev/pst/pst-pci.c optional pst pci
dev/pst/pst-raid.c optional pst

2
sys/conf/files.alpha
View File

@ -179,8 +179,6 @@ dev/fdc/fdc.c optional fdc
dev/fdc/fdc_isa.c optional fdc isa
dev/hwpmc/hwpmc_alpha.c optional hwpmc
dev/kbd/kbd.c optional atkbd | sc | ukbd
dev/ppc/ppc.c optional ppc
dev/ppc/ppc_puc.c optional ppc puc
dev/sio/sio.c optional sio
dev/sio/sio_isa.c optional sio isa
dev/syscons/schistory.c optional sc

2
sys/conf/files.amd64
View File

@ -174,8 +174,6 @@ dev/hwpmc/hwpmc_x86.c optional hwpmc
dev/kbd/kbd.c optional atkbd | sc | ukbd
dev/mem/memutil.c optional mem
dev/nve/if_nve.c optional nve pci
dev/ppc/ppc.c optional ppc
dev/ppc/ppc_puc.c optional ppc puc
dev/sio/sio.c optional sio
dev/sio/sio_isa.c optional sio isa
dev/speaker/spkr.c optional speaker

2
sys/conf/files.i386
View File

@ -193,8 +193,6 @@ dev/mse/mse.c optional mse
dev/mse/mse_isa.c optional mse isa
dev/nve/if_nve.c optional nve pci
dev/pcf/pcf_isa.c optional pcf
dev/ppc/ppc.c optional ppc
dev/ppc/ppc_puc.c optional ppc puc pci
dev/random/nehemiah.c optional random
dev/sbni/if_sbni.c optional sbni
dev/sbni/if_sbni_isa.c optional sbni isa

2
sys/conf/files.ia64
View File

@ -58,8 +58,6 @@ dev/fb/splash.c optional splash
dev/fb/vga.c optional vga
dev/hwpmc/hwpmc_ia64.c optional hwpmc
dev/kbd/kbd.c optional atkbd | sc | ukbd
dev/ppc/ppc.c optional ppc isa
dev/ppc/ppc_puc.c optional ppc puc
dev/syscons/schistory.c optional sc
dev/syscons/scmouse.c optional sc
dev/syscons/scterm-dumb.c optional sc

2
sys/conf/files.pc98
View File

@ -110,7 +110,6 @@ dev/lnc/if_lnc_cbus.c optional lnc isa
dev/mem/memutil.c optional mem
dev/mse/mse.c optional mse
dev/mse/mse_cbus.c optional mse isa
dev/ppc/ppc_puc.c optional ppc puc pci
dev/sbni/if_sbni.c optional sbni
dev/sbni/if_sbni_pci.c optional sbni pci
dev/snc/dp83932.c optional snc
@ -318,7 +317,6 @@ pc98/cbus/nmi.c standard
pc98/cbus/olpt.c optional olpt
pc98/cbus/pckbd.c optional pckbd
pc98/cbus/pmc.c optional pmc
pc98/cbus/ppc.c optional ppc
pc98/cbus/scgdcrndr.c optional sc gdc
pc98/cbus/scterm-sck.c optional sc
pc98/cbus/scvtb.c optional sc

1
sys/conf/files.powerpc
View File

@ -41,6 +41,7 @@ powerpc/powerpc/cpu.c standard
powerpc/powerpc/elf_machdep.c standard
powerpc/powerpc/fpu.c standard
powerpc/powerpc/fuswintr.c standard
powerpc/powerpc/gdb_machdep.c optional gdb
powerpc/powerpc/in_cksum.c optional inet
powerpc/powerpc/interrupt.c standard
powerpc/powerpc/intr_machdep.c standard

2
sys/conf/options
View File

@ -121,6 +121,8 @@ MPROF_HASH_SIZE opt_mprof.h
MUTEX_WAKE_ALL
NSWBUF_MIN opt_swap.h
PANIC_REBOOT_WAIT_TIME opt_panic.h
PPC_DEBUG opt_ppc.h
PPC_PROBE_CHIPSET opt_ppc.h
PPS_SYNC opt_ntp.h
PREEMPTION opt_sched.h
PUC_FASTINTR opt_puc.h

3
sys/conf/options.alpha
View File

@ -18,9 +18,6 @@ API_UP1000 opt_cpu.h
MAXMEM
PPC_PROBE_CHIPSET opt_ppc.h
PPC_DEBUG opt_ppc.h
VGA_ALT_SEQACCESS opt_vga.h
VGA_DEBUG opt_vga.h
VGA_NO_FONT_LOADING opt_vga.h

2
sys/conf/options.amd64
View File

@ -49,8 +49,6 @@ IPR_LOG opt_i4b.h
# EOF
# -------------------------------
HAMMER opt_cpu.h
PPC_PROBE_CHIPSET opt_ppc.h
PPC_DEBUG opt_ppc.h
PSM_HOOKRESUME opt_psm.h
PSM_RESETAFTERSUSPEND opt_psm.h
PSM_DEBUG opt_psm.h

2
sys/conf/options.i386
View File

@ -15,8 +15,6 @@ MP_WATCHDOG
PERFMON
PMAP_SHPGPERPROC opt_pmap.h
POWERFAIL_NMI opt_trap.h
PPC_DEBUG opt_ppc.h
PPC_PROBE_CHIPSET opt_ppc.h
# Options for emulators. These should only be used at config time, so
# they are handled like options for static filesystems

3
sys/conf/options.ia64
View File

@ -11,9 +11,6 @@ UWX_TRACE_ENABLE opt_global.h
COMPAT_IA32 opt_compat.h
PPC_PROBE_CHIPSET opt_ppc.h
PPC_DEBUG opt_ppc.h
VGA_ALT_SEQACCESS opt_vga.h
VGA_DEBUG opt_vga.h
VGA_NO_FONT_LOADING opt_vga.h

2
sys/conf/options.pc98
View File

@ -14,8 +14,6 @@ MP_WATCHDOG
PERFMON
PMAP_SHPGPERPROC opt_pmap.h
POWERFAIL_NMI opt_trap.h
PPC_DEBUG opt_ppc.h
PPC_PROBE_CHIPSET opt_ppc.h
# Options for emulators. These should only be used at config time, so
# they are handled like options for static filesystems

302
sys/dev/ppc/ppc.c
View File

@ -36,18 +36,16 @@ __FBSDID("$FreeBSD$");
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/malloc.h>
#include <sys/kdb.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/clock.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <machine/vmparam.h>
#include <sys/rman.h>
#include <isa/isareg.h>
#include <isa/isavar.h>
#ifdef __i386__
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/vmparam.h>
#endif
#include <dev/ppbus/ppbconf.h>
#include <dev/ppbus/ppb_msq.h>
@ -57,47 +55,23 @@ __FBSDID("$FreeBSD$");
#include "ppbus_if.h"
static int ppc_isa_probe(device_t dev);
static void ppcintr(void *arg);
#define IO_LPTSIZE_EXTENDED 8 /* "Extended" LPT controllers */
#define IO_LPTSIZE_NORMAL 4 /* "Normal" LPT controllers */
#define LOG_PPC(function, ppc, string) \
if (bootverbose) printf("%s: %s\n", function, string)
#if defined(__i386__) && defined(PC98)
#define PC98_IEEE_1284_DISABLE 0x100
#define PC98_IEEE_1284_PORT 0x140
#endif
#define DEVTOSOFTC(dev) ((struct ppc_data *)device_get_softc(dev))
devclass_t ppc_devclass;
static device_method_t ppc_methods[] = {
/* device interface */
DEVMETHOD(device_probe, ppc_isa_probe),
DEVMETHOD(device_attach, ppc_attach),
DEVMETHOD(device_detach, ppc_detach),
/* bus interface */
DEVMETHOD(bus_read_ivar, ppc_read_ivar),
DEVMETHOD(bus_setup_intr, ppc_setup_intr),
DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
/* ppbus interface */
DEVMETHOD(ppbus_io, ppc_io),
DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
DEVMETHOD(ppbus_setmode, ppc_setmode),
DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
DEVMETHOD(ppbus_read, ppc_read),
DEVMETHOD(ppbus_write, ppc_write),
{ 0, 0 }
};
static driver_t ppc_driver = {
"ppc",
ppc_methods,
sizeof(struct ppc_data),
};
const char ppc_driver_name[] = "ppc";
static char *ppc_models[] = {
"SMC-like", "SMC FDC37C665GT", "SMC FDC37C666GT", "PC87332", "PC87306",
@ -1593,12 +1567,7 @@ ppcintr(void *arg)
#ifdef PPC_DEBUG
printf("d");
#endif
isa_dmadone(
ppc->ppc_dmaflags,
ppc->ppc_dmaddr,
ppc->ppc_dmacnt,
ppc->ppc_dmachan);
ppc->ppc_dmadone(ppc);
ppc->ppc_dmastat = PPC_DMA_COMPLETE;
/* wakeup the waiting process */
@ -1620,163 +1589,10 @@ ppc_read(device_t dev, char *buf, int len, int mode)
return (EINVAL);
}
/*
* Call this function if you want to send data in any advanced mode
* of your parallel port: FIFO, DMA
*
* If what you want is not possible (no ECP, no DMA...),
* EINVAL is returned
*/
int
ppc_write(device_t dev, char *buf, int len, int how)
{
struct ppc_data *ppc = DEVTOSOFTC(dev);
char ecr, ecr_sav, ctr, ctr_sav;
int s, error = 0;
int spin;
#ifdef PPC_DEBUG
printf("w");
#endif
ecr_sav = r_ecr(ppc);
ctr_sav = r_ctr(ppc);
/*
* Send buffer with DMA, FIFO and interrupts
*/
if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_registered)) {
if (ppc->ppc_dmachan > 0) {
/* byte mode, no intr, no DMA, dir=0, flush fifo
*/
ecr = PPC_ECR_STD | PPC_DISABLE_INTR;
w_ecr(ppc, ecr);
/* disable nAck interrupts */
ctr = r_ctr(ppc);
ctr &= ~IRQENABLE;
w_ctr(ppc, ctr);
ppc->ppc_dmaflags = 0;
ppc->ppc_dmaddr = (caddr_t)buf;
ppc->ppc_dmacnt = (u_int)len;
switch (ppc->ppc_mode) {
case PPB_COMPATIBLE:
/* compatible mode with FIFO, no intr, DMA, dir=0 */
ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
break;
case PPB_ECP:
ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
break;
default:
error = EINVAL;
goto error;
}
w_ecr(ppc, ecr);
ecr = r_ecr(ppc);
/* enter splhigh() not to be preempted
* by the dma interrupt, we may miss
* the wakeup otherwise
*/
s = splhigh();
ppc->ppc_dmastat = PPC_DMA_INIT;
/* enable interrupts */
ecr &= ~PPC_SERVICE_INTR;
ppc->ppc_irqstat = PPC_IRQ_DMA;
w_ecr(ppc, ecr);
isa_dmastart(
ppc->ppc_dmaflags,
ppc->ppc_dmaddr,
ppc->ppc_dmacnt,
ppc->ppc_dmachan);
#ifdef PPC_DEBUG
printf("s%d", ppc->ppc_dmacnt);
#endif
ppc->ppc_dmastat = PPC_DMA_STARTED;
/* Wait for the DMA completed interrupt. We hope we won't
* miss it, otherwise a signal will be necessary to unlock the
* process.
*/
do {
/* release CPU */
error = tsleep(ppc,
PPBPRI | PCATCH, "ppcdma", 0);
} while (error == EWOULDBLOCK);
splx(s);
if (error) {
#ifdef PPC_DEBUG
printf("i");
#endif
/* stop DMA */
isa_dmadone(
ppc->ppc_dmaflags, ppc->ppc_dmaddr,
ppc->ppc_dmacnt, ppc->ppc_dmachan);
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
goto error;
}
/* wait for an empty fifo */
while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) {
for (spin=100; spin; spin--)
if (r_ecr(ppc) & PPC_FIFO_EMPTY)
goto fifo_empty;
#ifdef PPC_DEBUG
printf("Z");
#endif
error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100);
if (error != EWOULDBLOCK) {
#ifdef PPC_DEBUG
printf("I");
#endif
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
error = EINTR;
goto error;
}
}
fifo_empty:
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
} else
error = EINVAL; /* XXX we should FIFO and
* interrupts */
} else
error = EINVAL;
error:
/* PDRQ must be kept unasserted until nPDACK is
* deasserted for a minimum of 350ns (SMC datasheet)
*
* Consequence may be a FIFO that never empty
*/
DELAY(1);
w_ecr(ppc, ecr_sav);
w_ctr(ppc, ctr_sav);
return (error);
return (EINVAL);
}
void
@ -1809,34 +1625,15 @@ ppc_setmode(device_t dev, int mode)
return (ENXIO);
}
static struct isa_pnp_id lpc_ids[] = {
{ 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */
{ 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */
{ 0 }
};
static int
ppc_isa_probe(device_t dev)
{
device_t parent;
int error;
parent = device_get_parent(dev);
error = ISA_PNP_PROBE(parent, dev, lpc_ids);
if (error == ENXIO)
return (ENXIO);
else if (error != 0) /* XXX shall be set after detection */
device_set_desc(dev, "Parallel port");
return(ppc_probe(dev));
}
int
ppc_probe(device_t dev)
ppc_probe(device_t dev, int rid)
{
#ifdef __i386__
static short next_bios_ppc = 0;
#ifdef PC98
unsigned int pc98_ieee_mode = 0x00;
unsigned int tmp;
#endif
#endif
struct ppc_data *ppc;
int error;
@ -1848,17 +1645,27 @@ ppc_probe(device_t dev)
ppc = DEVTOSOFTC(dev);
bzero(ppc, sizeof(struct ppc_data));
ppc->rid_irq = ppc->rid_drq = ppc->rid_ioport = 0;
ppc->res_irq = ppc->res_drq = ppc->res_ioport = 0;
ppc->rid_ioport = rid;
/* retrieve ISA parameters */
error = bus_get_resource(dev, SYS_RES_IOPORT, 0, &port, NULL);
error = bus_get_resource(dev, SYS_RES_IOPORT, rid, &port, NULL);
#ifdef __i386__
/*
* If port not specified, use bios list.
*/
if (error) {
#ifdef PC98
if (next_bios_ppc == 0) {
/* Use default IEEE-1284 port of NEC PC-98x1 */
port = PC98_IEEE_1284_PORT;
next_bios_ppc += 1;
if (bootverbose)
device_printf(dev,
"parallel port found at 0x%x\n",
(int) port);
}
#else
if((next_bios_ppc < BIOS_MAX_PPC) &&
(*(BIOS_PORTS+next_bios_ppc) != 0) ) {
port = *(BIOS_PORTS+next_bios_ppc++);
@ -1869,7 +1676,8 @@ ppc_probe(device_t dev)
device_printf(dev, "parallel port not found.\n");
return ENXIO;
}
bus_set_resource(dev, SYS_RES_IOPORT, 0, port,
#endif /* PC98 */
bus_set_resource(dev, SYS_RES_IOPORT, rid, port,
IO_LPTSIZE_EXTENDED);
}
#endif
@ -1878,7 +1686,7 @@ ppc_probe(device_t dev)
* There isn't a bios list on alpha. Put it in the usual place.
*/
if (error) {
bus_set_resource(dev, SYS_RES_IOPORT, 0, 0x3bc,
bus_set_resource(dev, SYS_RES_IOPORT, rid, 0x3bc,
IO_LPTSIZE_NORMAL);
}
#endif
@ -1937,6 +1745,30 @@ ppc_probe(device_t dev)
ppc->ppc_type = PPC_TYPE_GENERIC;
#if defined(__i386__) && defined(PC98)
/*
* IEEE STD 1284 Function Check and Enable
* for default IEEE-1284 port of NEC PC-98x1
*/
if (ppc->ppc_base == PC98_IEEE_1284_PORT &&
!(ppc->ppc_flags & PC98_IEEE_1284_DISABLE)) {
tmp = inb(ppc->ppc_base + PPC_1284_ENABLE);
pc98_ieee_mode = tmp;
if ((tmp & 0x10) == 0x10) {
outb(ppc->ppc_base + PPC_1284_ENABLE, tmp & ~0x10);
tmp = inb(ppc->ppc_base + PPC_1284_ENABLE);
if ((tmp & 0x10) == 0x10)
goto error;
} else {
outb(ppc->ppc_base + PPC_1284_ENABLE, tmp | 0x10);
tmp = inb(ppc->ppc_base + PPC_1284_ENABLE);
if ((tmp & 0x10) != 0x10)
goto error;
}
outb(ppc->ppc_base + PPC_1284_ENABLE, pc98_ieee_mode | 0x10);
}
#endif
/*
* Try to detect the chipset and its mode.
*/
@ -1946,6 +1778,12 @@ ppc_probe(device_t dev)
return (0);
error:
#if defined(__i386__) && defined(PC98)
if (ppc->ppc_base == PC98_IEEE_1284_PORT &&
!(ppc->ppc_flags & PC98_IEEE_1284_DISABLE)) {
outb(ppc->ppc_base + PPC_1284_ENABLE, pc98_ieee_mode);
}
#endif
if (ppc->res_irq != 0) {
bus_release_resource(dev, SYS_RES_IRQ, ppc->rid_irq,
ppc->res_irq);
@ -1981,12 +1819,6 @@ ppc_attach(device_t dev)
device_printf(dev, "FIFO with %d/%d/%d bytes threshold\n",
ppc->ppc_fifo, ppc->ppc_wthr, ppc->ppc_rthr);
if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) {
/* acquire the DMA channel forever */ /* XXX */
isa_dma_acquire(ppc->ppc_dmachan);
isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */
}
/* add ppbus as a child of this isa to parallel bridge */
ppbus = device_add_child(dev, "ppbus", -1);
@ -2192,6 +2024,4 @@ ppc_teardown_intr(device_t bus, device_t child, struct resource *r, void *ih)
return (error);
}
DRIVER_MODULE(ppc, isa, ppc_driver, ppc_devclass, 0, 0);
DRIVER_MODULE(ppc, acpi, ppc_driver, ppc_devclass, 0, 0);
MODULE_DEPEND(ppc, ppbus, 1, 1, 1);

114
sys/dev/ppc/ppc_acpi.c Normal file
View File

@ -0,0 +1,114 @@
/*-
* Copyright (c) 2006 Marcel Moolenaar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_isa.h"
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <isa/isareg.h>
#include <isa/isavar.h>
#include <dev/ppbus/ppbconf.h>
#include <dev/ppbus/ppb_msq.h>
#include <dev/ppc/ppcvar.h>
#include <dev/ppc/ppcreg.h>
#include "ppbus_if.h"
static int ppc_acpi_probe(device_t dev);
int ppc_isa_attach(device_t dev);
int ppc_isa_write(device_t, char *, int, int);
static device_method_t ppc_acpi_methods[] = {
/* device interface */
DEVMETHOD(device_probe, ppc_acpi_probe),
#ifdef DEV_ISA
DEVMETHOD(device_attach, ppc_isa_attach),
#else
DEVMETHOD(device_attach, ppc_attach),
#endif
DEVMETHOD(device_detach, ppc_attach),
/* bus interface */
DEVMETHOD(bus_read_ivar, ppc_read_ivar),
DEVMETHOD(bus_setup_intr, ppc_setup_intr),
DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
/* ppbus interface */
DEVMETHOD(ppbus_io, ppc_io),
DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
DEVMETHOD(ppbus_setmode, ppc_setmode),
DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
DEVMETHOD(ppbus_read, ppc_read),
#ifdef DEV_ISA
DEVMETHOD(ppbus_write, ppc_isa_write),
#else
DEVMETHOD(ppbus_write, ppc_write),
#endif
{ 0, 0 }
};
static driver_t ppc_acpi_driver = {
ppc_driver_name,
ppc_acpi_methods,
sizeof(struct ppc_data),
};
static struct isa_pnp_id lpc_ids[] = {
{ 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */
{ 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */
{ 0 }
};
static int
ppc_acpi_probe(device_t dev)
{
device_t parent;
int error;
parent = device_get_parent(dev);
error = ISA_PNP_PROBE(parent, dev, lpc_ids);
if (error)
return (ENXIO);
device_set_desc(dev, "Parallel port");
return (ppc_probe(dev, 0));
}
DRIVER_MODULE(ppc, acpi, ppc_acpi_driver, ppc_devclass, 0, 0);

281
sys/dev/ppc/ppc_isa.c Normal file
View File

@ -0,0 +1,281 @@
/*-
* Copyright (c) 1997-2000 Nicolas Souchu
* Copyright (c) 2001 Alcove - Nicolas Souchu
* Copyright (c) 2006 Marcel Moolenaar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/malloc.h>
#if defined(__i386__) && defined(PC98)
#include <pc98/cbus/cbus.h>
#else
#include <isa/isareg.h>
#endif
#include <isa/isavar.h>
#include <dev/ppbus/ppbconf.h>
#include <dev/ppbus/ppb_msq.h>
#include <dev/ppc/ppcvar.h>
#include <dev/ppc/ppcreg.h>
#include "ppbus_if.h"
static int ppc_isa_probe(device_t dev);
int ppc_isa_attach(device_t dev);
int ppc_isa_write(device_t, char *, int, int);
static device_method_t ppc_isa_methods[] = {
/* device interface */
DEVMETHOD(device_probe, ppc_isa_probe),
DEVMETHOD(device_attach, ppc_isa_attach),
DEVMETHOD(device_detach, ppc_attach),
/* bus interface */
DEVMETHOD(bus_read_ivar, ppc_read_ivar),
DEVMETHOD(bus_setup_intr, ppc_setup_intr),
DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
/* ppbus interface */
DEVMETHOD(ppbus_io, ppc_io),
DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
DEVMETHOD(ppbus_setmode, ppc_setmode),
DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
DEVMETHOD(ppbus_read, ppc_read),
DEVMETHOD(ppbus_write, ppc_isa_write),
{ 0, 0 }
};
static driver_t ppc_isa_driver = {
ppc_driver_name,
ppc_isa_methods,
sizeof(struct ppc_data),
};
static struct isa_pnp_id lpc_ids[] = {
{ 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */
{ 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */
{ 0 }
};
static void
ppc_isa_dmadone(struct ppc_data *ppc)
{
isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt,
ppc->ppc_dmachan);
}
int
ppc_isa_attach(device_t dev)
{
struct ppc_data *ppc = device_get_softc(dev);
if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) {
/* acquire the DMA channel forever */ /* XXX */
isa_dma_acquire(ppc->ppc_dmachan);
isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */
ppc->ppc_dmadone = ppc_isa_dmadone;
}
return (ppc_attach(dev));
}
static int
ppc_isa_probe(device_t dev)
{
device_t parent;
int error;
parent = device_get_parent(dev);
error = ISA_PNP_PROBE(parent, dev, lpc_ids);
if (error == ENXIO)
return (ENXIO);
if (error != 0) /* XXX shall be set after detection */
device_set_desc(dev, "Parallel port");
return (ppc_probe(dev, 0));
}
/*
* Call this function if you want to send data in any advanced mode
* of your parallel port: FIFO, DMA
*
* If what you want is not possible (no ECP, no DMA...),
* EINVAL is returned
*/
int
ppc_isa_write(device_t dev, char *buf, int len, int how)
{
struct ppc_data *ppc = device_get_softc(dev);
char ecr, ecr_sav, ctr, ctr_sav;
int s, error = 0;
int spin;
if (!(ppc->ppc_avm & PPB_ECP) || !ppc->ppc_registered)
return (EINVAL);
if (ppc->ppc_dmachan == 0)
return (EINVAL);
#ifdef PPC_DEBUG
printf("w");
#endif
ecr_sav = r_ecr(ppc);
ctr_sav = r_ctr(ppc);
/*
* Send buffer with DMA, FIFO and interrupts
*/
/* byte mode, no intr, no DMA, dir=0, flush fifo */
ecr = PPC_ECR_STD | PPC_DISABLE_INTR;
w_ecr(ppc, ecr);
/* disable nAck interrupts */
ctr = r_ctr(ppc);
ctr &= ~IRQENABLE;
w_ctr(ppc, ctr);
ppc->ppc_dmaflags = 0;
ppc->ppc_dmaddr = (caddr_t)buf;
ppc->ppc_dmacnt = (u_int)len;
switch (ppc->ppc_mode) {
case PPB_COMPATIBLE:
/* compatible mode with FIFO, no intr, DMA, dir=0 */
ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
break;
case PPB_ECP:
ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
break;
default:
error = EINVAL;
goto error;
}
w_ecr(ppc, ecr);
ecr = r_ecr(ppc);
/* enter splhigh() not to be preempted
* by the dma interrupt, we may miss
* the wakeup otherwise
*/
s = splhigh();
ppc->ppc_dmastat = PPC_DMA_INIT;
/* enable interrupts */
ecr &= ~PPC_SERVICE_INTR;
ppc->ppc_irqstat = PPC_IRQ_DMA;
w_ecr(ppc, ecr);
isa_dmastart(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt,
ppc->ppc_dmachan);
ppc->ppc_dmastat = PPC_DMA_STARTED;
#ifdef PPC_DEBUG
printf("s%d", ppc->ppc_dmacnt);
#endif
/* Wait for the DMA completed interrupt. We hope we won't
* miss it, otherwise a signal will be necessary to unlock the
* process.
*/
do {
/* release CPU */
error = tsleep(ppc, PPBPRI | PCATCH, "ppcdma", 0);
} while (error == EWOULDBLOCK);
splx(s);
if (error) {
#ifdef PPC_DEBUG
printf("i");
#endif
/* stop DMA */
isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr,
ppc->ppc_dmacnt, ppc->ppc_dmachan);
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
goto error;
}
/* wait for an empty fifo */
while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) {
for (spin=100; spin; spin--)
if (r_ecr(ppc) & PPC_FIFO_EMPTY)
goto fifo_empty;
#ifdef PPC_DEBUG
printf("Z");
#endif
error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100);
if (error != EWOULDBLOCK) {
#ifdef PPC_DEBUG
printf("I");
#endif
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
error = EINTR;
goto error;
}
}
fifo_empty:
/* no dma, no interrupt, flush the fifo */
w_ecr(ppc, PPC_ECR_RESET);
error:
/* PDRQ must be kept unasserted until nPDACK is
* deasserted for a minimum of 350ns (SMC datasheet)
*
* Consequence may be a FIFO that never empty
*/
DELAY(1);
w_ecr(ppc, ecr_sav);
w_ctr(ppc, ctr_sav);
return (error);
}
DRIVER_MODULE(ppc, isa, ppc_isa_driver, ppc_devclass, 0, 0);

110
sys/dev/ppc/ppc_pci.c Normal file
View File

@ -0,0 +1,110 @@
/*-
* Copyright (c) 2006 Marcel Moolenaar
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <dev/pci/pcivar.h>
#include <dev/ppbus/ppbconf.h>
#include <dev/ppbus/ppb_msq.h>
#include <dev/ppc/ppcvar.h>
#include <dev/ppc/ppcreg.h>
#include "ppbus_if.h"
static int ppc_pci_probe(device_t dev);
static device_method_t ppc_pci_methods[] = {
/* device interface */
DEVMETHOD(device_probe, ppc_pci_probe),
DEVMETHOD(device_attach, ppc_attach),
DEVMETHOD(device_detach, ppc_detach),
/* bus interface */
DEVMETHOD(bus_read_ivar, ppc_read_ivar),
DEVMETHOD(bus_setup_intr, ppc_setup_intr),
DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
/* ppbus interface */
DEVMETHOD(ppbus_io, ppc_io),
DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
DEVMETHOD(ppbus_setmode, ppc_setmode),
DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
DEVMETHOD(ppbus_read, ppc_read),
DEVMETHOD(ppbus_write, ppc_write),
{ 0, 0 }
};
static driver_t ppc_pci_driver = {
ppc_driver_name,
ppc_pci_methods,
sizeof(struct ppc_data),
};
struct pci_id {
uint32_t type;
const char *desc;
int rid;
};
static struct pci_id pci_ids[] = {
{ 0x1020131f, "SIIG Cyber Parallel PCI (10x family)", 0x18 },
{ 0x2020131f, "SIIG Cyber Parallel PCI (20x family)", 0x10 },
{ 0x80001407, "Lava Computers 2SP-PCI parallel port", 0x10 },
{ 0x84031415, "Oxford Semiconductor OX12PCI840 Parallel port", 0x10 },
{ 0x95131415, "Oxford Semiconductor OX16PCI954 Parallel port", 0x10 },
{ 0x98059710, "NetMos NM9805 1284 Printer port", 0x10 },
{ 0xffff }
};
static int
ppc_pci_probe(device_t dev)
{
struct pci_id *id;
uint32_t type;
type = pci_get_devid(dev);
id = pci_ids;
while (id->type != 0xffff && id->type != type)
id++;
if (id->type == 0xffff)
return (ENXIO);
device_set_desc(dev, id->desc);
return (ppc_probe(dev, id->rid));
}
DRIVER_MODULE(ppc, pci, ppc_pci_driver, ppc_devclass, 0, 0);

4
sys/dev/ppc/ppc_puc.c
View File

@ -68,7 +68,7 @@ static device_method_t ppc_puc_methods[] = {
};
static driver_t ppc_puc_driver = {
"ppc",
ppc_driver_name,
ppc_puc_methods,
sizeof(struct ppc_data),
};
@ -78,7 +78,7 @@ ppc_puc_probe(dev)
device_t dev;
{
device_set_desc(dev, "Parallel port");
return (ppc_probe(dev));
return (ppc_probe(dev, 0));
}
DRIVER_MODULE(ppc, puc, ppc_puc_driver, ppc_devclass, 0, 0);

9
sys/dev/ppc/ppcreg.h
View File

@ -82,6 +82,7 @@ struct ppc_data {
int ppc_dmaflags; /* dma transfer flags */
caddr_t ppc_dmaddr; /* buffer address */
u_int ppc_dmacnt; /* count of bytes sent with dma */
void (*ppc_dmadone)(struct ppc_data*);
#define PPC_PWORD_MASK 0x30
#define PPC_PWORD_16 0x00
@ -123,10 +124,18 @@ struct ppc_data {
#define PPC_SPP_CTR 2 /* SPP control register */
#define PPC_EPP_ADDR 3 /* EPP address register (8 bit) */
#define PPC_EPP_DATA 4 /* EPP data register (8, 16 or 32 bit) */
#if defined(__i386__) && defined(PC98)
#define PPC_1284_ENABLE 0x09 /* IEEE STD 1284 Enable register */
#define PPC_ECP_D_FIFO 0x0c /* ECP Data fifo register */
#define PPC_ECP_CNFGA 0x0c /* Configuration register A */
#define PPC_ECP_CNFGB 0x0d /* Configuration register B */
#define PPC_ECP_ECR 0x0e /* ECP extended control register */
#else
#define PPC_ECP_D_FIFO 0x400 /* ECP Data fifo register */
#define PPC_ECP_CNFGA 0x400 /* Configuration register A */
#define PPC_ECP_CNFGB 0x401 /* Configuration register B */
#define PPC_ECP_ECR 0x402 /* ECP extended control register */
#endif
#define PPC_FIFO_EMPTY 0x1 /* ecr register - bit 0 */
#define PPC_FIFO_FULL 0x2 /* ecr register - bit 1 */

5
sys/dev/ppc/ppcvar.h
View File

@ -28,7 +28,7 @@
*
*/
int ppc_probe(device_t dev);
int ppc_probe(device_t dev, int rid);
int ppc_attach(device_t dev);
int ppc_detach(device_t dev);
int ppc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val);
@ -46,4 +46,5 @@ void ppc_reset_epp(device_t);
void ppc_ecp_sync(device_t);
int ppc_setmode(device_t, int);
extern devclass_t ppc_devclass;
extern devclass_t ppc_devclass;
extern const char ppc_driver_name[];

2211
sys/pc98/cbus/ppc.c
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File diff suppressed because it is too large Load Diff

280
sys/pc98/cbus/ppcreg.h
View File

@ -1,280 +0,0 @@
/*-
* Copyright (c) 2001 Alcove - Nicolas Souchu
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
*/
#ifndef __PPCREG_H
#define __PPCREG_H
/*
* Parallel Port Chipset type.
*/
#define SMC_LIKE 0
#define SMC_37C665GT 1
#define SMC_37C666GT 2
#define NS_PC87332 3
#define NS_PC87306 4
#define INTEL_820191AA 5 /* XXX not implemented */
#define GENERIC 6
#define WINB_W83877F 7
#define WINB_W83877AF 8
#define WINB_UNKNOWN 9
#define NS_PC87334 10
#define SMC_37C935 11
#define NS_PC87303 12
/*
* Parallel Port Chipset Type. SMC versus GENERIC (others)
*/
#define PPC_TYPE_SMCLIKE 0
#define PPC_TYPE_GENERIC 1
/*
* Generic structure to hold parallel port chipset info.
*/
struct ppc_data {
int ppc_unit;
int ppc_model; /* chipset model if detected */
int ppc_type; /* generic or smclike chipset type */
int ppc_mode; /* chipset current mode */
int ppc_avm; /* chipset available modes */
int ppc_dtm; /* chipset detected modes */
#define PPC_IRQ_NONE 0x0
#define PPC_IRQ_nACK 0x1
#define PPC_IRQ_DMA 0x2
#define PPC_IRQ_FIFO 0x4
#define PPC_IRQ_nFAULT 0x8
int ppc_irqstat; /* remind irq settings */
#define PPC_DMA_INIT 0x01
#define PPC_DMA_STARTED 0x02
#define PPC_DMA_COMPLETE 0x03
#define PPC_DMA_INTERRUPTED 0x04
#define PPC_DMA_ERROR 0x05
int ppc_dmastat; /* dma state */
int ppc_dmachan; /* dma channel */
int ppc_dmaflags; /* dma transfer flags */
caddr_t ppc_dmaddr; /* buffer address */
u_int ppc_dmacnt; /* count of bytes sent with dma */
#define PPC_PWORD_MASK 0x30
#define PPC_PWORD_16 0x00
#define PPC_PWORD_8 0x10
#define PPC_PWORD_32 0x20
char ppc_pword; /* PWord size */
short ppc_fifo; /* FIFO threshold */
short ppc_wthr; /* writeIntrThresold */
short ppc_rthr; /* readIntrThresold */
char *ppc_ptr; /* microseq current pointer */
int ppc_accum; /* microseq accumulator */
int ppc_base; /* parallel port base address */
int ppc_epp; /* EPP mode (1.7 or 1.9) */
int ppc_irq;
unsigned char ppc_flags;
device_t ppbus; /* parallel port chipset corresponding ppbus */
int rid_irq, rid_drq, rid_ioport;
struct resource *res_irq, *res_drq, *res_ioport;
bus_space_handle_t bsh;
bus_space_tag_t bst;
void *intr_cookie;
int ppc_registered; /* 1 if ppcintr() is the registered interrupt */
};
/*
* Parallel Port Chipset registers.
*/
#define PPC_SPP_DTR 0 /* SPP data register */
#define PPC_ECP_A_FIFO 0 /* ECP Address fifo register */
#define PPC_SPP_STR 1 /* SPP status register */
#define PPC_SPP_CTR 2 /* SPP control register */
#define PPC_EPP_ADDR 3 /* EPP address register (8 bit) */
#define PPC_EPP_DATA 4 /* EPP data register (8, 16 or 32 bit) */
#ifdef PC98
#define PPC_1284_ENABLE 0x09 /* IEEE STD 1284 Enable register */
#define PPC_ECP_D_FIFO 0x0c /* ECP Data fifo register */
#define PPC_ECP_CNFGA 0x0c /* Configuration register A */
#define PPC_ECP_CNFGB 0x0d /* Configuration register B */
#define PPC_ECP_ECR 0x0e /* ECP extended control register */
#else
#define PPC_ECP_D_FIFO 0x400 /* ECP Data fifo register */
#define PPC_ECP_CNFGA 0x400 /* Configuration register A */
#define PPC_ECP_CNFGB 0x401 /* Configuration register B */
#define PPC_ECP_ECR 0x402 /* ECP extended control register */
#endif
#define PPC_FIFO_EMPTY 0x1 /* ecr register - bit 0 */
#define PPC_FIFO_FULL 0x2 /* ecr register - bit 1 */
#define PPC_SERVICE_INTR 0x4 /* ecr register - bit 2 */
#define PPC_ENABLE_DMA 0x8 /* ecr register - bit 3 */
#define PPC_nFAULT_INTR 0x10 /* ecr register - bit 4 */
#define PPC_ECR_STD 0x0
#define PPC_ECR_PS2 0x20
#define PPC_ECR_FIFO 0x40
#define PPC_ECR_ECP 0x60
#define PPC_ECR_EPP 0x80
#define PPC_DISABLE_INTR (PPC_SERVICE_INTR | PPC_nFAULT_INTR)
#define PPC_ECR_RESET (PPC_ECR_PS2 | PPC_DISABLE_INTR)
#define r_dtr(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_SPP_DTR))
#define r_str(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_SPP_STR))
#define r_ctr(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_SPP_CTR))
#define r_epp_A(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_EPP_ADDR))
#define r_epp_D(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_EPP_DATA))
#define r_cnfgA(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_ECP_CNFGA))
#define r_cnfgB(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_ECP_CNFGB))
#define r_ecr(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_ECP_ECR))
#define r_fifo(ppc) (bus_space_read_1((ppc)->bst, (ppc)->bsh, PPC_ECP_D_FIFO))
#define w_dtr(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_SPP_DTR, byte))
#define w_str(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_SPP_STR, byte))
#define w_ctr(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_SPP_CTR, byte))
#define w_epp_A(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_EPP_ADDR, byte))
#define w_epp_D(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_EPP_DATA, byte))
#define w_ecr(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_ECP_ECR, byte))
#define w_fifo(ppc, byte) (bus_space_write_1((ppc)->bst, (ppc)->bsh, PPC_ECP_D_FIFO, byte))
/*
* Register defines for the PC873xx parts
*/
#define PC873_FER 0x00
#define PC873_PPENABLE (1<<0)
#define PC873_FAR 0x01
#define PC873_PTR 0x02
#define PC873_CFGLOCK (1<<6)
#define PC873_EPPRDIR (1<<7)
#define PC873_EXTENDED (1<<7)
#define PC873_LPTBIRQ7 (1<<3)
#define PC873_FCR 0x03
#define PC873_ZWS (1<<5)
#define PC873_ZWSPWDN (1<<6)
#define PC873_PCR 0x04
#define PC873_EPPEN (1<<0)
#define PC873_EPP19 (1<<1)
#define PC873_ECPEN (1<<2)
#define PC873_ECPCLK (1<<3)
#define PC873_PMC 0x06
#define PC873_TUP 0x07
#define PC873_SID 0x08
#define PC873_PNP0 0x1b
#define PC873_PNP1 0x1c
#define PC873_LPTBA 0x19
/*
* Register defines for the SMC FDC37C66xGT parts
*/
/* Init codes */
#define SMC665_iCODE 0x55
#define SMC666_iCODE 0x44
/* Base configuration ports */
#define SMC66x_CSR 0x3F0
#define SMC666_CSR 0x370 /* hard-configured value for 666 */
/* Bits */
#define SMC_CR1_ADDR 0x3 /* bit 0 and 1 */
#define SMC_CR1_MODE (1<<3) /* bit 3 */
#define SMC_CR4_EMODE 0x3 /* bits 0 and 1 */
#define SMC_CR4_EPPTYPE (1<<6) /* bit 6 */
/* Extended modes */
#define SMC_SPP 0x0 /* SPP */
#define SMC_EPPSPP 0x1 /* EPP and SPP */
#define SMC_ECP 0x2 /* ECP */
#define SMC_ECPEPP 0x3 /* ECP and EPP */
/*
* Register defines for the SMC FDC37C935 parts
*/
/* Configuration ports */
#define SMC935_CFG 0x370
#define SMC935_IND 0x370
#define SMC935_DAT 0x371
/* Registers */
#define SMC935_LOGDEV 0x7
#define SMC935_ID 0x20
#define SMC935_PORTHI 0x60
#define SMC935_PORTLO 0x61
#define SMC935_PPMODE 0xf0
/* Parallel port modes */
#define SMC935_SPP 0x38 + 0
#define SMC935_EPP19SPP 0x38 + 1
#define SMC935_ECP 0x38 + 2
#define SMC935_ECPEPP19 0x38 + 3
#define SMC935_CENT 0x38 + 4
#define SMC935_EPP17SPP 0x38 + 5
#define SMC935_UNUSED 0x38 + 6
#define SMC935_ECPEPP17 0x38 + 7
/*
* Register defines for the Winbond W83877F parts
*/
#define WINB_W83877F_ID 0xa
#define WINB_W83877AF_ID 0xb
/* Configuration bits */
#define WINB_HEFERE (1<<5) /* CROC bit 5 */
#define WINB_HEFRAS (1<<0) /* CR16 bit 0 */
#define WINB_PNPCVS (1<<2) /* CR16 bit 2 */
#define WINB_CHIPID 0xf /* CR9 bits 0-3 */
#define WINB_PRTMODS0 (1<<2) /* CR0 bit 2 */
#define WINB_PRTMODS1 (1<<3) /* CR0 bit 3 */
#define WINB_PRTMODS2 (1<<7) /* CR9 bit 7 */
/* W83877F modes: CR9/bit7 | CR0/bit3 | CR0/bit2 */
#define WINB_W83757 0x0
#define WINB_EXTFDC 0x4
#define WINB_EXTADP 0x8
#define WINB_EXT2FDD 0xc
#define WINB_JOYSTICK 0x80
#define WINB_PARALLEL 0x80
#define WINB_EPP_SPP 0x4
#define WINB_ECP 0x8
#define WINB_ECP_EPP 0xc
#endif