Disable automatic IP ID increment. Due to a hardware bug the automatic
IP ID increment in TSO case generated corrupted IP packets. This change brings back TSO capability.
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@ -1452,19 +1452,11 @@ msk_attach(device_t dev)
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*/
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ifp->if_capabilities = IFCAP_TXCSUM;
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ifp->if_hwassist = MSK_CSUM_FEATURES;
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#if 0
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/*
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* Under certain circumtances, if TSO is active, Yukon II generates
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* corrupted IP packets. Disable TSO until we find a working
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* workaround or a new silicon revision that doesn't have this
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* hardware bug.
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*/
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if (sc->msk_hw_id != CHIP_ID_YUKON_EC_U) {
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/* It seems Yukon EC Ultra doesn't support TSO. */
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ifp->if_capabilities |= IFCAP_TSO4;
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ifp->if_hwassist |= CSUM_TSO;
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}
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#endif
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ifp->if_capenable = ifp->if_capabilities;
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ifp->if_ioctl = msk_ioctl;
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ifp->if_start = msk_start;
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@ -3766,13 +3758,6 @@ msk_init_locked(struct msk_if_softc *sc_if)
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CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_CLR_RESET);
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CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_OPER_INIT);
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CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_FIFO_OP_ON);
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/* Increase IPID when hardware generates IP packets in TSO. */
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if ((ifp->if_hwassist & CSUM_TSO) != 0)
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CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR),
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BMU_TX_IPIDINCR_ON);
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else
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CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR),
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BMU_TX_IPIDINCR_OFF);
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CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_txq, Q_WM), MSK_BMU_TX_WM);
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if (sc->msk_hw_id == CHIP_ID_YUKON_EC_U &&
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sc->msk_hw_rev == CHIP_REV_YU_EC_U_A0) {
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