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Add workaround for occasional packet loss issue of JMC250 A2

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when it runs on half-duplex media.
While I'm here add register definition for GPREG1. ATM the GPREG1
register is only valid for JMC250 A1/A2.

Submitted by:	Ethan at JMicron
This commit is contained in:
Pyun YongHyeon 2008-09-22 06:17:21 +00:00
parent 7bf717b721
commit cf8f254faa
2 changed files with 20 additions and 3 deletions
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14
sys/dev/jme/if_jme.c
View File

@ -1940,7 +1940,7 @@ static void
jme_mac_config(struct jme_softc *sc)
{
struct mii_data *mii;
uint32_t ghc, rxmac, txmac, txpause;
uint32_t ghc, gpreg, rxmac, txmac, txpause;
JME_LOCK_ASSERT(sc);
@ -1996,9 +1996,19 @@ jme_mac_config(struct jme_softc *sc)
default:
break;
}
/* Workaround CRC errors at 100Mbps on JMC250 A2. */
if (sc->jme_rev == DEVICEID_JMC250 &&
sc->jme_chip_rev == DEVICEREVID_JMC250_A2) {
/*
* Workaround occasional packet loss issue of JMC250 A2
* when it runs on half-duplex media.
*/
gpreg = CSR_READ_4(sc, JME_GPREG1);
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
gpreg &= ~GPREG1_HDPX_FIX;
else
gpreg |= GPREG1_HDPX_FIX;
CSR_WRITE_4(sc, JME_GPREG1, gpreg);
/* Workaround CRC errors at 100Mbps on JMC250 A2. */
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
/* Extend interface FIFO depth. */
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr,

9
sys/dev/jme/if_jmereg.h
View File

@ -574,8 +574,15 @@
#define GPREG0_PHY_ADDR_SHIFT 0
#define GPREG0_PHY_ADDR 1
/* General purpose register 1. reserved for future use. */
/* General purpose register 1. */
#define JME_GPREG1 0x080C
#define GPREG1_RSS_IPV6_10_100 0x00000040 /* JMC250 A2 */
#define GPREG1_HDPX_FIX 0x00000020 /* JMC250 A2 */
#define GPREG1_INTDLY_UNIT_16US 0x00000018 /* JMC250 A1, A2 */
#define GPREG1_INTDLY_UNIT_1US 0x00000010 /* JMC250 A1, A2 */
#define GPREG1_INTDLY_UNIT_256NS 0x00000008 /* JMC250 A1, A2 */
#define GPREG1_INTDLY_UNIT_16NS 0x00000000 /* JMC250 A1, A2 */
#define GPREG1_INTDLY_MASK 0x00000007
/* MSIX entry number of interrupt source. */
#define JME_MSINUM_BASE 0x0810