cxgbe(4): Break up set_sched_class. Validate the channel number and
min/max rates against their actual limits (which are chip and port specific) instead of hardcoded constants. Sponsored by: Chelsio Communications
This commit is contained in:
Navdeep Parhar
parent
74b44794c6
commit
cfbe2911c9
@ -8297,154 +8297,134 @@ in_range(int val, int lo, int hi)
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}
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static int
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set_sched_class(struct adapter *sc, struct t4_sched_params *p)
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set_sched_class_config(struct adapter *sc, int minmax)
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{
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int fw_subcmd, fw_type, rc;
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int rc;
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rc = begin_synchronized_op(sc, NULL, SLEEP_OK | INTR_OK, "t4setsc");
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if (minmax < 0)
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return (EINVAL);
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rc = begin_synchronized_op(sc, NULL, SLEEP_OK | INTR_OK, "t4sscc");
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if (rc)
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return (rc);
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rc = -t4_sched_config(sc, FW_SCHED_TYPE_PKTSCHED, minmax, 1);
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end_synchronized_op(sc, 0);
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if (!(sc->flags & FULL_INIT_DONE)) {
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rc = EAGAIN;
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goto done;
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}
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return (rc);
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}
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static int
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set_sched_class_params(struct adapter *sc, struct t4_sched_class_params *p,
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int sleep_ok)
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{
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int rc, top_speed, fw_level, fw_mode, fw_rateunit, fw_ratemode;
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struct port_info *pi;
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if (p->level == SCHED_CLASS_LEVEL_CL_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_RL;
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else if (p->level == SCHED_CLASS_LEVEL_CL_WRR)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_WRR;
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else if (p->level == SCHED_CLASS_LEVEL_CH_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CH_RL;
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else
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return (EINVAL);
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if (p->mode == SCHED_CLASS_MODE_CLASS)
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fw_mode = FW_SCHED_PARAMS_MODE_CLASS;
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else if (p->mode == SCHED_CLASS_MODE_FLOW)
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fw_mode = FW_SCHED_PARAMS_MODE_FLOW;
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else
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return (EINVAL);
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if (p->rateunit == SCHED_CLASS_RATEUNIT_BITS)
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fw_rateunit = FW_SCHED_PARAMS_UNIT_BITRATE;
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else if (p->rateunit == SCHED_CLASS_RATEUNIT_PKTS)
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fw_rateunit = FW_SCHED_PARAMS_UNIT_PKTRATE;
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else
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return (EINVAL);
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if (p->ratemode == SCHED_CLASS_RATEMODE_REL)
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fw_ratemode = FW_SCHED_PARAMS_RATE_REL;
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else if (p->ratemode == SCHED_CLASS_RATEMODE_ABS)
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fw_ratemode = FW_SCHED_PARAMS_RATE_ABS;
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else
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return (EINVAL);
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/* Vet our parameters ... */
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if (!in_range(p->channel, 0, sc->chip_params->nchan - 1))
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return (ERANGE);
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pi = sc->port[sc->chan_map[p->channel]];
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if (pi == NULL)
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return (ENXIO);
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MPASS(pi->tx_chan == p->channel);
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top_speed = port_top_speed(pi) * 1000000; /* Gbps -> Kbps */
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if (!in_range(p->cl, 0, sc->chip_params->nsched_cls) ||
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!in_range(p->minrate, 0, top_speed) ||
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!in_range(p->maxrate, 0, top_speed) ||
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!in_range(p->weight, 0, 100))
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return (ERANGE);
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/*
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* Translate the cxgbetool parameters into T4 firmware parameters. (The
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* sub-command and type are in common locations.)
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* Translate any unset parameters into the firmware's
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* nomenclature and/or fail the call if the parameters
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* are required ...
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*/
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if (p->subcmd == SCHED_CLASS_SUBCMD_CONFIG)
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fw_subcmd = FW_SCHED_SC_CONFIG;
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else if (p->subcmd == SCHED_CLASS_SUBCMD_PARAMS)
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fw_subcmd = FW_SCHED_SC_PARAMS;
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else {
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rc = EINVAL;
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goto done;
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if (p->rateunit < 0 || p->ratemode < 0 || p->channel < 0 || p->cl < 0)
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return (EINVAL);
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if (p->minrate < 0)
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p->minrate = 0;
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if (p->maxrate < 0) {
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if (p->level == SCHED_CLASS_LEVEL_CL_RL ||
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p->level == SCHED_CLASS_LEVEL_CH_RL)
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return (EINVAL);
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else
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p->maxrate = 0;
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}
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if (p->type == SCHED_CLASS_TYPE_PACKET)
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fw_type = FW_SCHED_TYPE_PKTSCHED;
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else {
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rc = EINVAL;
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goto done;
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if (p->weight < 0) {
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if (p->level == SCHED_CLASS_LEVEL_CL_WRR)
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return (EINVAL);
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else
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p->weight = 0;
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}
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if (p->pktsize < 0) {
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if (p->level == SCHED_CLASS_LEVEL_CL_RL ||
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p->level == SCHED_CLASS_LEVEL_CH_RL)
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return (EINVAL);
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else
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p->pktsize = 0;
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}
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if (fw_subcmd == FW_SCHED_SC_CONFIG) {
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/* Vet our parameters ..*/
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if (p->u.config.minmax < 0) {
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rc = EINVAL;
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goto done;
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}
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rc = begin_synchronized_op(sc, NULL,
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sleep_ok ? (SLEEP_OK | INTR_OK) : HOLD_LOCK, "t4sscp");
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if (rc)
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return (rc);
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rc = -t4_sched_params(sc, FW_SCHED_TYPE_PKTSCHED, fw_level, fw_mode,
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fw_rateunit, fw_ratemode, p->channel, p->cl, p->minrate, p->maxrate,
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p->weight, p->pktsize, sleep_ok);
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end_synchronized_op(sc, sleep_ok ? 0 : LOCK_HELD);
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/* And pass the request to the firmware ...*/
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rc = -t4_sched_config(sc, fw_type, p->u.config.minmax, 1);
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goto done;
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}
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if (fw_subcmd == FW_SCHED_SC_PARAMS) {
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int fw_level;
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int fw_mode;
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int fw_rateunit;
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int fw_ratemode;
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if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_RL;
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else if (p->u.params.level == SCHED_CLASS_LEVEL_CL_WRR)
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fw_level = FW_SCHED_PARAMS_LEVEL_CL_WRR;
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else if (p->u.params.level == SCHED_CLASS_LEVEL_CH_RL)
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fw_level = FW_SCHED_PARAMS_LEVEL_CH_RL;
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else {
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rc = EINVAL;
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goto done;
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}
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if (p->u.params.mode == SCHED_CLASS_MODE_CLASS)
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fw_mode = FW_SCHED_PARAMS_MODE_CLASS;
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else if (p->u.params.mode == SCHED_CLASS_MODE_FLOW)
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fw_mode = FW_SCHED_PARAMS_MODE_FLOW;
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else {
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rc = EINVAL;
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goto done;
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}
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if (p->u.params.rateunit == SCHED_CLASS_RATEUNIT_BITS)
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fw_rateunit = FW_SCHED_PARAMS_UNIT_BITRATE;
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else if (p->u.params.rateunit == SCHED_CLASS_RATEUNIT_PKTS)
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fw_rateunit = FW_SCHED_PARAMS_UNIT_PKTRATE;
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else {
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rc = EINVAL;
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goto done;
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}
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if (p->u.params.ratemode == SCHED_CLASS_RATEMODE_REL)
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fw_ratemode = FW_SCHED_PARAMS_RATE_REL;
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else if (p->u.params.ratemode == SCHED_CLASS_RATEMODE_ABS)
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fw_ratemode = FW_SCHED_PARAMS_RATE_ABS;
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else {
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rc = EINVAL;
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goto done;
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}
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/* Vet our parameters ... */
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if (!in_range(p->u.params.channel, 0, 3) ||
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!in_range(p->u.params.cl, 0, sc->chip_params->nsched_cls) ||
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!in_range(p->u.params.minrate, 0, 10000000) ||
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!in_range(p->u.params.maxrate, 0, 10000000) ||
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!in_range(p->u.params.weight, 0, 100)) {
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rc = ERANGE;
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goto done;
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}
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/*
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* Translate any unset parameters into the firmware's
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* nomenclature and/or fail the call if the parameters
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* are required ...
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*/
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if (p->u.params.rateunit < 0 || p->u.params.ratemode < 0 ||
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p->u.params.channel < 0 || p->u.params.cl < 0) {
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rc = EINVAL;
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goto done;
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}
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if (p->u.params.minrate < 0)
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p->u.params.minrate = 0;
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if (p->u.params.maxrate < 0) {
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if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
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p->u.params.level == SCHED_CLASS_LEVEL_CH_RL) {
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rc = EINVAL;
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goto done;
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} else
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p->u.params.maxrate = 0;
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}
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if (p->u.params.weight < 0) {
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if (p->u.params.level == SCHED_CLASS_LEVEL_CL_WRR) {
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rc = EINVAL;
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goto done;
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} else
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p->u.params.weight = 0;
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}
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if (p->u.params.pktsize < 0) {
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if (p->u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
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p->u.params.level == SCHED_CLASS_LEVEL_CH_RL) {
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rc = EINVAL;
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goto done;
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} else
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p->u.params.pktsize = 0;
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}
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/* See what the firmware thinks of the request ... */
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rc = -t4_sched_params(sc, fw_type, fw_level, fw_mode,
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fw_rateunit, fw_ratemode, p->u.params.channel,
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p->u.params.cl, p->u.params.minrate, p->u.params.maxrate,
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p->u.params.weight, p->u.params.pktsize, 1);
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goto done;
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}
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rc = EINVAL;
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done:
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end_synchronized_op(sc, 0);
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return (rc);
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}
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static int
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set_sched_class(struct adapter *sc, struct t4_sched_params *p)
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{
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if (p->type != SCHED_CLASS_TYPE_PACKET)
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return (EINVAL);
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if (p->subcmd == SCHED_CLASS_SUBCMD_CONFIG)
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return (set_sched_class_config(sc, p->u.config.minmax));
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if (p->subcmd == SCHED_CLASS_SUBCMD_PARAMS)
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return (set_sched_class_params(sc, &p->u.params, 1));
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return (EINVAL);
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}
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static int
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set_sched_queue(struct adapter *sc, struct t4_sched_queue *p)
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{
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