Add a new USB wireless driver, urtw(4) for supporting Realtek's 8187L
chipset.
This commit is contained in:
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118
share/man/man4/urtw.4
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118
share/man/man4/urtw.4
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.\" Copyright (c) 2008 Weongyo Jeong
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd November 15 2008 $
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.Dt URTW 4
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.Os
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.Sh NAME
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.Nm urtw
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.Nd Realtek RTL8187L USB IEEE 802.11b/g wireless network device
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following lines in your kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device ehci"
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.Cd "device uhci"
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.Cd "device ohci"
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.Cd "device usb"
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.Cd "device urtw"
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.Cd "device wlan"
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.Ed
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.Pp
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Alternatively, to load the driver as a module at boot time,
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place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_urtw_load="YES"
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.Ed
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.Sh DESCRIPTION
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The
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.Nm
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driver supports USB 802.11b/g wireless adapters based on the
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Realtek RTL8187L.
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.Pp
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.Nm
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supports
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.Cm station
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and
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.Cm monitor
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mode operation.
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Only one virtual interface may be configured at any time.
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh HARDWARE
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The following adapters should work:
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.Pp
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.Bl -column "Card " "Radio " "Bus" -compact -offset 6n
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.It Em "Card Radio Bus"
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.It Li "Netgear WG111v2" Ta RTL8225 Ta USB
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.It Li "Safehome WLG-1500SMA5" Ta RTL8225 Ta USB
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.It Li "Shuttle XPC Accessory PN20" Ta RTL8225 Ta USB
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.El
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.Sh EXAMPLES
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Join an existing BSS network (i.e., connect to an access point):
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.Pp
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.Bd -literal -offset indent
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ifconfig wlan create wlandev urtw0 inet 192.168.0.20 \e
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netmask 0xffffff00
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.Ed
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.Pp
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Join a specific BSS network with network name
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.Dq Li my_net :
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.Pp
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.Dl "ifconfig wlan create wlandev urtw0 ssid my_net up"
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.Pp
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Join a specific BSS network with 64-bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig wlan create wlandev urtw0 ssid my_net \e
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wepmode on wepkey 0x1234567890 weptxkey 1 up
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.Ed
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.Sh SEE ALSO
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.Xr intro 4 ,
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.Xr netintro 4 ,
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.Xr usb 4 ,
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.Xr wlan 4 ,
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.Xr wlan_ccmp 4 ,
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.Xr wlan_tkip 4 ,
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.Xr wlan_wep 4 ,
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.Xr ifconfig 8 ,
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.Xr wpa_supplicant 8
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.Rs
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.%T Realtek
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.%O http://www.realtek.com.tw
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.Re
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 8.0 .
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.Sh AUTHORS
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.An -nosplit
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The
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.Nm
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driver was written by
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.An Weongyo Jeong
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.Aq weongyo@FreeBSD.org .
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3324
sys/dev/usb/if_urtw.c
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3324
sys/dev/usb/if_urtw.c
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File diff suppressed because it is too large
Load Diff
256
sys/dev/usb/if_urtwreg.h
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256
sys/dev/usb/if_urtwreg.h
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@ -0,0 +1,256 @@
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/* $FreeBSD$ */
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/*-
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* Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define URTW_CONFIG_NO 1
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#define URTW_IFACE_INDEX 0
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/* for 8187 */
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#define URTW_MAC0 0x0000 /* 1 byte */
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#define URTW_MAC1 0x0001 /* 1 byte */
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#define URTW_MAC2 0x0002 /* 1 byte */
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#define URTW_MAC3 0x0003 /* 1 byte */
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#define URTW_MAC4 0x0004 /* 1 byte */
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#define URTW_MAC5 0x0005 /* 1 byte */
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#define URTW_BRSR 0x002c /* 2 byte */
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#define URTW_BRSR_MBR_8185 (0x0fff)
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#define URTW_BSSID 0x002e /* 6 byte */
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#define URTW_RESP_RATE 0x0034 /* 1 byte */
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#define URTW_RESP_MAX_RATE_SHIFT (4)
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#define URTW_RESP_MIN_RATE_SHIFT (0)
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#define URTW_EIFS 0x0035 /* 1 byte */
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#define URTW_INTR_MASK 0x003c /* 2 byte */
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#define URTW_CMD 0x0037 /* 1 byte */
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#define URTW_CMD_TX_ENABLE (0x4)
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#define URTW_CMD_RX_ENABLE (0x8)
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#define URTW_CMD_RST (0x10)
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#define URTW_TX_CONF 0x0040 /* 4 byte */
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#define URTW_TX_LOOPBACK_SHIFT (17)
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#define URTW_TX_LOOPBACK_NONE (0 << URTW_TX_LOOPBACK_SHIFT)
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#define URTW_TX_LOOPBACK_MAC (1 << URTW_TX_LOOPBACK_SHIFT)
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#define URTW_TX_LOOPBACK_BASEBAND (2 << URTW_TX_LOOPBACK_SHIFT)
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#define URTW_TX_LOOPBACK_CONTINUE (3 << URTW_TX_LOOPBACK_SHIFT)
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#define URTW_TX_LOOPBACK_MASK (0x60000)
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#define URTW_TX_DPRETRY_MASK (0xff00)
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#define URTW_TX_RTSRETRY_MASK (0xff)
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#define URTW_TX_DPRETRY_SHIFT (0)
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#define URTW_TX_RTSRETRY_SHIFT (8)
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#define URTW_TX_NOCRC (0x10000)
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#define URTW_TX_MXDMA_MASK (0xe00000)
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#define URTW_TX_MXDMA_1024 (6 << URTW_TX_MXDMA_SHIFT)
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#define URTW_TX_MXDMA_2048 (7 << URTW_TX_MXDMA_SHIFT)
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#define URTW_TX_MXDMA_SHIFT (21)
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#define URTW_TX_CWMIN (1 << 31)
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#define URTW_TX_DISCW (1 << 20)
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#define URTW_TX_SWPLCPLEN (1 << 24)
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#define URTW_TX_NOICV (0x80000)
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#define URTW_RX 0x0044 /* 4 byte */
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#define URTW_RX_9356SEL (1 << 6)
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#define URTW_RX_FILTER_MASK \
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(URTW_RX_FILTER_ALLMAC | URTW_RX_FILTER_NICMAC | URTW_RX_FILTER_MCAST | \
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URTW_RX_FILTER_BCAST | URTW_RX_FILTER_CRCERR | URTW_RX_FILTER_ICVERR | \
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URTW_RX_FILTER_DATA | URTW_RX_FILTER_CTL | URTW_RX_FILTER_MNG | \
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(1 << 21) | \
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URTW_RX_FILTER_PWR | URTW_RX_CHECK_BSSID)
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#define URTW_RX_FILTER_ALLMAC (0x00000001)
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#define URTW_RX_FILTER_NICMAC (0x00000002)
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#define URTW_RX_FILTER_MCAST (0x00000004)
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#define URTW_RX_FILTER_BCAST (0x00000008)
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#define URTW_RX_FILTER_CRCERR (0x00000020)
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#define URTW_RX_FILTER_ICVERR (0x00001000)
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#define URTW_RX_FILTER_DATA (0x00040000)
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#define URTW_RX_FILTER_CTL (0x00080000)
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#define URTW_RX_FILTER_MNG (0x00100000)
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#define URTW_RX_FILTER_PWR (0x00400000)
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#define URTW_RX_CHECK_BSSID (0x00800000)
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#define URTW_RX_FIFO_THRESHOLD_MASK ((1 << 13) | (1 << 14) | (1 << 15))
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#define URTW_RX_FIFO_THRESHOLD_SHIFT (13)
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#define URTW_RX_FIFO_THRESHOLD_128 (3)
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#define URTW_RX_FIFO_THRESHOLD_256 (4)
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#define URTW_RX_FIFO_THRESHOLD_512 (5)
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#define URTW_RX_FIFO_THRESHOLD_1024 (6)
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#define URTW_RX_FIFO_THRESHOLD_NONE (7 << URTW_RX_FIFO_THRESHOLD_SHIFT)
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#define URTW_RX_AUTORESETPHY (1 << URTW_RX_AUTORESETPHY_SHIFT)
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#define URTW_RX_AUTORESETPHY_SHIFT (28)
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#define URTW_MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
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#define URTW_MAX_RX_DMA_2048 (7 << URTW_MAX_RX_DMA_SHIFT)
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#define URTW_MAX_RX_DMA_1024 (6)
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#define URTW_MAX_RX_DMA_SHIFT (10)
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#define URTW_RCR_ONLYERLPKT (1 << 31)
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#define URTW_INT_TIMEOUT 0x0048 /* 4 byte */
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#define URTW_EPROM_CMD 0x0050 /* 1 byte */
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#define URTW_EPROM_CMD_NORMAL (0x0)
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#define URTW_EPROM_CMD_NORMAL_MODE \
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(URTW_EPROM_CMD_NORMAL << URTW_EPROM_CMD_SHIFT)
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#define URTW_EPROM_CMD_LOAD (0x1)
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#define URTW_EPROM_CMD_PROGRAM (0x2)
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#define URTW_EPROM_CMD_PROGRAM_MODE \
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(URTW_EPROM_CMD_PROGRAM << URTW_EPROM_CMD_SHIFT)
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#define URTW_EPROM_CMD_CONFIG (0x3)
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#define URTW_EPROM_CMD_SHIFT (6)
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#define URTW_EPROM_CMD_MASK ((1 << 7) | (1 << 6))
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#define URTW_EPROM_READBIT (0x1)
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#define URTW_EPROM_WRITEBIT (0x2)
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#define URTW_EPROM_CK (0x4)
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#define URTW_EPROM_CS (0x8)
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#define URTW_CONFIG2 0x0053
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#define URTW_ANAPARAM 0x0054 /* 4 byte */
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#define URTW_8225_ANAPARAM_ON (0xa0000a59)
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#define URTW_MSR 0x0058 /* 1 byte */
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#define URTW_MSR_LINK_MASK ((1 << 2) | (1 << 3))
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#define URTW_MSR_LINK_SHIFT (2)
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#define URTW_MSR_LINK_NONE (0 << URTW_MSR_LINK_SHIFT)
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#define URTW_MSR_LINK_ADHOC (1 << URTW_MSR_LINK_SHIFT)
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#define URTW_MSR_LINK_STA (2 << URTW_MSR_LINK_SHIFT)
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#define URTW_MSR_LINK_HOSTAP (3 << URTW_MSR_LINK_SHIFT)
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#define URTW_CONFIG3 0x0059 /* 1 byte */
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#define URTW_CONFIG3_ANAPARAM_WRITE (0x40)
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#define URTW_CONFIG3_ANAPARAM_W_SHIFT (6)
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#define URTW_ADDR_MAGIC4 0x005b /* 1 byte */
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#define URTW_PSR 0x005e /* 1 byte */
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#define URTW_ANAPARAM2 0x0060 /* 4 byte */
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#define URTW_8225_ANAPARAM2_ON (0x860c7312)
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#define URTW_BEACON_INTERVAL 0x0070 /* 2 byte */
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#define URTW_ATIM_WND 0x0072 /* 2 byte */
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#define URTW_BEACON_INTERVAL_TIME 0x0074 /* 2 byte */
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#define URTW_ATIM_TR_ITV 0x0076 /* 2 byte */
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#define URTW_PHY_MAGIC1 0x007c /* 1 byte */
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#define URTW_PHY_MAGIC2 0x007d /* 1 byte */
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#define URTW_PHY_MAGIC3 0x007e /* 1 byte */
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#define URTW_PHY_MAGIC4 0x007f /* 1 byte */
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#define URTW_RF_PINS_OUTPUT 0x0080 /* 2 byte */
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#define URTW_RF_PINS_OUTPUT_MAGIC1 (0x3a0)
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#define URTW_BB_HOST_BANG_CLK (1 << 1)
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#define URTW_BB_HOST_BANG_EN (1 << 2)
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#define URTW_BB_HOST_BANG_RW (1 << 3)
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#define URTW_RF_PINS_ENABLE 0x0082 /* 2 byte */
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#define URTW_RF_PINS_SELECT 0x0084 /* 2 byte */
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#define URTW_ADDR_MAGIC1 0x0085 /* broken? */
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#define URTW_RF_PINS_INPUT 0x0086 /* 2 byte */
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#define URTW_RF_PINS_MAGIC1 (0xfff3)
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#define URTW_RF_PINS_MAGIC2 (0xfff0)
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#define URTW_RF_PINS_MAGIC3 (0x0007)
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#define URTW_RF_PINS_MAGIC4 (0xf)
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#define URTW_RF_PINS_MAGIC5 (0x0080)
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#define URTW_RF_PARA 0x0088 /* 4 byte */
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#define URTW_RF_TIMING 0x008c /* 4 byte */
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#define URTW_GP_ENABLE 0x0090 /* 1 byte */
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#define URTW_GP_ENABLE_DATA_MAGIC1 (0x1)
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#define URTW_GPIO 0x0091 /* 1 byte */
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#define URTW_GPIO_DATA_MAGIC1 (0x1)
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#define URTW_ADDR_MAGIC5 0x0094 /* 4 byte */
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#define URTW_TX_AGC_CTL 0x009c /* 1 byte */
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#define URTW_TX_AGC_CTL_PERPACKET_GAIN (0x1)
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#define URTW_TX_AGC_CTL_PERPACKET_ANTSEL (0x2)
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#define URTW_TX_AGC_CTL_FEEDBACK_ANT (0x4)
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#define URTW_TX_GAIN_CCK 0x009d /* 1 byte */
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#define URTW_TX_GAIN_OFDM 0x009e /* 1 byte */
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#define URTW_TX_ANTENNA 0x009f /* 1 byte */
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#define URTW_WPA_CONFIG 0x00b0 /* 1 byte */
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#define URTW_SIFS 0x00b4 /* 1 byte */
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#define URTW_DIFS 0x00b5 /* 1 byte */
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#define URTW_SLOT 0x00b6 /* 1 byte */
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#define URTW_CW_CONF 0x00bc /* 1 byte */
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#define URTW_CW_CONF_PERPACKET_RETRY (0x2)
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#define URTW_CW_CONF_PERPACKET_CW (0x1)
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#define URTW_CW_VAL 0x00bd /* 1 byte */
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#define URTW_RATE_FALLBACK 0x00be /* 1 byte */
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#define URTW_TALLY_SEL 0x00fc /* 1 byte */
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#define URTW_ADDR_MAGIC2 0x00fe /* 2 byte */
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#define URTW_ADDR_MAGIC3 0x00ff /* 1 byte */
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/* for 8225 */
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#define URTW_8225_ADDR_0_MAGIC 0x0
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#define URTW_8225_ADDR_0_DATA_MAGIC1 (0x1b7)
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#define URTW_8225_ADDR_0_DATA_MAGIC2 (0x0b7)
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#define URTW_8225_ADDR_0_DATA_MAGIC3 (0x127)
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#define URTW_8225_ADDR_0_DATA_MAGIC4 (0x027)
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#define URTW_8225_ADDR_0_DATA_MAGIC5 (0x22f)
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#define URTW_8225_ADDR_0_DATA_MAGIC6 (0x2bf)
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#define URTW_8225_ADDR_1_MAGIC 0x1
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#define URTW_8225_ADDR_2_MAGIC 0x2
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#define URTW_8225_ADDR_2_DATA_MAGIC1 (0xc4d)
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#define URTW_8225_ADDR_2_DATA_MAGIC2 (0x44d)
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#define URTW_8225_ADDR_3_MAGIC 0x3
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#define URTW_8225_ADDR_3_DATA_MAGIC1 (0x2)
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#define URTW_8225_ADDR_5_MAGIC 0x5
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#define URTW_8225_ADDR_5_DATA_MAGIC1 (0x4)
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#define URTW_8225_ADDR_6_MAGIC 0x6
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#define URTW_8225_ADDR_6_DATA_MAGIC1 (0xe6)
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#define URTW_8225_ADDR_6_DATA_MAGIC2 (0x80)
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#define URTW_8225_ADDR_7_MAGIC 0x7
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#define URTW_8225_ADDR_8_MAGIC 0x8
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#define URTW_8225_ADDR_8_DATA_MAGIC1 (0x588)
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#define URTW_8225_ADDR_9_MAGIC 0x9
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#define URTW_8225_ADDR_9_DATA_MAGIC1 (0x700)
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#define URTW_8225_ADDR_C_MAGIC 0xc
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#define URTW_8225_ADDR_C_DATA_MAGIC1 (0x850)
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#define URTW_8225_ADDR_C_DATA_MAGIC2 (0x050)
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/* for EEPROM */
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#define URTW_EPROM_TXPW_BASE 0x05
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#define URTW_EPROM_RFCHIPID 0x06
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#define URTW_EPROM_RFCHIPID_RTL8225U (5)
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#define URTW_EPROM_MACADDR 0x07
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#define URTW_EPROM_TXPW0 0x16
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#define URTW_EPROM_TXPW2 0x1b
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#define URTW_EPROM_TXPW1 0x3d
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#define URTW_EPROM_SWREV 0x3f
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#define URTW_EPROM_CID_MASK (0xff)
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#define URTW_EPROM_CID_RSVD0 (0x00)
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#define URTW_EPROM_CID_RSVD1 (0xff)
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#define URTW_EPROM_CID_ALPHA0 (0x01)
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#define URTW_EPROM_CID_SERCOMM_PS (0x02)
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#define URTW_EPROM_CID_HW_LED (0x03)
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/* LED */
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#define URTW_CID_DEFAULT 0
|
||||
#define URTW_CID_8187_ALPHA0 1
|
||||
#define URTW_CID_8187_SERCOMM_PS 2
|
||||
#define URTW_CID_8187_HW_LED 3
|
||||
#define URTW_SW_LED_MODE0 0
|
||||
#define URTW_SW_LED_MODE1 1
|
||||
#define URTW_SW_LED_MODE2 2
|
||||
#define URTW_SW_LED_MODE3 3
|
||||
#define URTW_HW_LED 4
|
||||
#define URTW_LED_CTL_POWER_ON 0
|
||||
#define URTW_LED_CTL_LINK 2
|
||||
#define URTW_LED_CTL_TX 4
|
||||
#define URTW_LED_PIN_GPIO0 0
|
||||
#define URTW_LED_PIN_LED0 1
|
||||
#define URTW_LED_PIN_LED1 2
|
||||
#define URTW_LED_UNKNOWN 0
|
||||
#define URTW_LED_ON 1
|
||||
#define URTW_LED_OFF 2
|
||||
#define URTW_LED_BLINK_NORMAL 3
|
||||
#define URTW_LED_BLINK_SLOWLY 4
|
||||
#define URTW_LED_POWER_ON_BLINK 5
|
||||
#define URTW_LED_SCAN_BLINK 6
|
||||
#define URTW_LED_NO_LINK_BLINK 7
|
||||
#define URTW_LED_BLINK_CM3 8
|
||||
|
||||
/* for extra area */
|
||||
#define URTW_EPROM_DISABLE 0
|
||||
#define URTW_EPROM_ENABLE 1
|
||||
#define URTW_EPROM_DELAY 10
|
||||
#define URTW_8187_GETREGS_REQ 5
|
||||
#define URTW_8187_SETREGS_REQ 5
|
||||
#define URTW_8225_RF_MAX_SENS 6
|
||||
#define URTW_8225_RF_DEF_SENS 4
|
||||
#define URTW_DEFAULT_RTS_RETRY 7
|
||||
#define URTW_DEFAULT_TX_RETRY 7
|
||||
#define URTW_DEFAULT_RTS_THRESHOLD 2342U
|
151
sys/dev/usb/if_urtwvar.h
Normal file
151
sys/dev/usb/if_urtwvar.h
Normal file
@ -0,0 +1,151 @@
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/* XXX no definition at net80211? */
|
||||
#define URTW_MAX_CHANNELS 15
|
||||
|
||||
struct urtw_data {
|
||||
struct urtw_softc *sc;
|
||||
usbd_xfer_handle xfer;
|
||||
uint8_t *buf;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni; /* NB: tx only */
|
||||
};
|
||||
|
||||
/* XXX not correct.. */
|
||||
#define URTW_MIN_RXBUFSZ \
|
||||
(sizeof(struct ieee80211_frame_min))
|
||||
|
||||
#define URTW_RX_DATA_LIST_COUNT 1
|
||||
#define URTW_TX_DATA_LIST_COUNT 16
|
||||
#define URTW_RX_MAXSIZE 0x9c4
|
||||
#define URTW_TX_MAXSIZE 0x9c4
|
||||
|
||||
struct urtw_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint8_t wr_flags;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
} __packed;
|
||||
|
||||
#define URTW_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL))
|
||||
|
||||
struct urtw_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
} __packed;
|
||||
|
||||
#define URTW_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct urtw_vap {
|
||||
struct ieee80211vap vap;
|
||||
int (*newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define URTW_VAP(vap) ((struct urtw_vap *)(vap))
|
||||
|
||||
struct urtw_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
device_t sc_dev;
|
||||
usbd_device_handle sc_udev;
|
||||
usbd_interface_handle sc_iface;
|
||||
struct mtx sc_mtx;
|
||||
|
||||
int sc_debug;
|
||||
int sc_if_flags;
|
||||
int sc_flags;
|
||||
#define URTW_INIT_ONCE (1 << 1)
|
||||
struct usb_task sc_task;
|
||||
struct usb_task sc_ctxtask;
|
||||
int sc_ctxarg;
|
||||
#define URTW_SET_CHANNEL 1
|
||||
enum ieee80211_state sc_state;
|
||||
int sc_arg;
|
||||
int (*sc_newstate)(struct ieee80211com *,
|
||||
enum ieee80211_state, int);
|
||||
|
||||
int sc_epromtype;
|
||||
#define URTW_EEPROM_93C46 0
|
||||
#define URTW_EEPROM_93C56 1
|
||||
uint8_t sc_crcmon;
|
||||
uint8_t sc_bssid[IEEE80211_ADDR_LEN];
|
||||
|
||||
/* for RF */
|
||||
usbd_status (*sc_rf_init)(struct urtw_softc *);
|
||||
usbd_status (*sc_rf_set_chan)(struct urtw_softc *,
|
||||
int);
|
||||
usbd_status (*sc_rf_set_sens)(struct urtw_softc *,
|
||||
int);
|
||||
uint8_t sc_rfchip;
|
||||
uint32_t sc_max_sens;
|
||||
uint32_t sc_sens;
|
||||
/* for LED */
|
||||
struct callout sc_led_ch;
|
||||
struct usb_task sc_ledtask;
|
||||
uint8_t sc_psr;
|
||||
uint8_t sc_strategy;
|
||||
#define URTW_LED_GPIO 1
|
||||
uint8_t sc_gpio_ledon;
|
||||
uint8_t sc_gpio_ledinprogress;
|
||||
uint8_t sc_gpio_ledstate;
|
||||
uint8_t sc_gpio_ledpin;
|
||||
uint8_t sc_gpio_blinktime;
|
||||
uint8_t sc_gpio_blinkstate;
|
||||
/* RX/TX */
|
||||
usbd_pipe_handle sc_rxpipe;
|
||||
usbd_pipe_handle sc_txpipe_low;
|
||||
usbd_pipe_handle sc_txpipe_normal;
|
||||
#define URTW_PRIORITY_LOW 0
|
||||
#define URTW_PRIORITY_NORMAL 1
|
||||
#define URTW_DATA_TIMEOUT 10000 /* 10 sec */
|
||||
struct urtw_data sc_rxdata[URTW_RX_DATA_LIST_COUNT];
|
||||
struct urtw_data sc_txdata[URTW_TX_DATA_LIST_COUNT];
|
||||
uint32_t sc_tx_low_queued;
|
||||
uint32_t sc_tx_normal_queued;
|
||||
uint32_t sc_txidx;
|
||||
uint8_t sc_rts_retry;
|
||||
uint8_t sc_tx_retry;
|
||||
uint8_t sc_preamble_mode;
|
||||
#define URTW_PREAMBLE_MODE_SHORT 1
|
||||
#define URTW_PREAMBLE_MODE_LONG 2
|
||||
struct callout sc_watchdog_ch;
|
||||
int sc_txtimer;
|
||||
int sc_currate;
|
||||
/* TX power */
|
||||
uint8_t sc_txpwr_cck[URTW_MAX_CHANNELS];
|
||||
uint8_t sc_txpwr_cck_base;
|
||||
uint8_t sc_txpwr_ofdm[URTW_MAX_CHANNELS];
|
||||
uint8_t sc_txpwr_ofdm_base;
|
||||
|
||||
struct urtw_rx_radiotap_header sc_rxtap;
|
||||
int sc_rxtap_len;
|
||||
struct urtw_tx_radiotap_header sc_txtap;
|
||||
int sc_txtap_len;
|
||||
};
|
||||
|
||||
#define URTW_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
|
||||
#define URTW_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
|
||||
#define URTW_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
|
@ -1830,6 +1830,7 @@ product NETGEAR FA120 0x1040 USB 2.0 Ethernet
|
||||
product NETGEAR WG111V2_2 0x4240 PrismGT USB 2.0 WLAN
|
||||
product NETGEAR WG111U 0x4300 WG111U
|
||||
product NETGEAR WG111U_NF 0x4301 WG111U (no firmware)
|
||||
product NETGEAR WG111V2 0x6a00 WG111V2
|
||||
product NETGEAR2 MA101 0x4100 MA101
|
||||
product NETGEAR2 MA101B 0x4102 MA101 Rev B
|
||||
product NETGEAR3 WG111T 0x4250 WG111T
|
||||
@ -2044,6 +2045,7 @@ product RALINK RT2573_2 0x9021 RT2501USB Wireless Adapter
|
||||
/* ReakTek products */
|
||||
/* Green House and CompUSA OEM this part */
|
||||
product REALTEK USBKR100 0x8150 USBKR100 USB Ethernet
|
||||
product REALTEK RTL8187 0x8187 RTL8187 Wireless Adapter
|
||||
|
||||
/* Ricoh products */
|
||||
product RICOH VGPVCC2 0x1830 VGP-VCC2 Camera
|
||||
|
9
sys/modules/urtw/Makefile
Normal file
9
sys/modules/urtw/Makefile
Normal file
@ -0,0 +1,9 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/usb
|
||||
|
||||
KMOD = if_urtw
|
||||
SRCS = if_urtw.c if_urtwvar.h if_urtwreg.h opt_usb.h device_if.h \
|
||||
bus_if.h usbdevs.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
Loading…
x
Reference in New Issue
Block a user