Catch up to rename of the constant for the Master Data Parity Error bit in
the PCI status register. Pointed out by: mdf Pointy hat to: jhb
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7eaa29b5d8
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d1a02e0932
@ -1334,7 +1334,7 @@ mskc_reset(struct msk_softc *sc)
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pci_write_config(sc->msk_dev, PCIR_STATUS, status |
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PCIM_STATUS_PERR | PCIM_STATUS_SERR | PCIM_STATUS_RMABORT |
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PCIM_STATUS_RTABORT | PCIM_STATUS_PERRREPORT, 2);
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PCIM_STATUS_RTABORT | PCIM_STATUS_MDPERR, 2);
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CSR_WRITE_2(sc, B0_CTST, CS_MRST_CLR);
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switch (sc->msk_bustype) {
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@ -3405,7 +3405,7 @@ msk_intr_hwerr(struct msk_softc *sc)
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CSR_WRITE_1(sc, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_write_config(sc->msk_dev, PCIR_STATUS, v16 |
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PCIM_STATUS_PERR | PCIM_STATUS_SERR | PCIM_STATUS_RMABORT |
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PCIM_STATUS_RTABORT | PCIM_STATUS_PERRREPORT, 2);
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PCIM_STATUS_RTABORT | PCIM_STATUS_MDPERR, 2);
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CSR_WRITE_1(sc, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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}
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@ -849,7 +849,7 @@ schizo_pci_bus(void *arg)
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fatal = 1;
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if ((status & (PCIM_STATUS_PERR | PCIM_STATUS_SERR |
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PCIM_STATUS_RMABORT | PCIM_STATUS_RTABORT |
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PCIM_STATUS_PERRREPORT)) != 0 ||
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PCIM_STATUS_MDPERR)) != 0 ||
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(csr & (SCZ_PCI_CTRL_BUS_UNUS | TOM_PCI_CTRL_DTO_ERR |
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STX_PCI_CTRL_TTO_ERR | STX_PCI_CTRL_RTRY_ERR |
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SCZ_PCI_CTRL_SBH_ERR | STX_PCI_CTRL_SERR)) != 0 ||
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