powerpc/booke: Make the TLB save area and mask match
Since TLB_MAXNEST is 3, the insert mask should only be 2 bits. Given that 2 bits counts to 4, and that we already have plenty of space wasted in padding, make the nest level 4 to match the mask.
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@ -365,14 +365,14 @@
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ld %r30, (TLBSAVE_BOOKE_R30)(br); \
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ld %r30, (TLBSAVE_BOOKE_R30)(br); \
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ld %r31, (TLBSAVE_BOOKE_R31)(br);
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ld %r31, (TLBSAVE_BOOKE_R31)(br);
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#define TLB_NEST(outr,inr) \
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#define TLB_NEST(outr,inr) \
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rlwinm outr, inr, 7, 22, 24; /* 8 x TLBSAVE_LEN */
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rlwinm outr, inr, 7, 23, 24; /* 8 x TLBSAVE_LEN */
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#else
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#else
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#define TLB_SAVE_REGS(br) \
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#define TLB_SAVE_REGS(br) \
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stmw %r20, TLBSAVE_BOOKE_R20(br)
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stmw %r20, TLBSAVE_BOOKE_R20(br)
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#define TLB_RESTORE_REGS(br) \
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#define TLB_RESTORE_REGS(br) \
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lmw %r20, TLBSAVE_BOOKE_R20(br)
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lmw %r20, TLBSAVE_BOOKE_R20(br)
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#define TLB_NEST(outr,inr) \
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#define TLB_NEST(outr,inr) \
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rlwinm outr, inr, 6, 23, 25; /* 4 x TLBSAVE_LEN */
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rlwinm outr, inr, 6, 24, 25; /* 4 x TLBSAVE_LEN */
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#endif
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#endif
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#define TLB_PROLOG \
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#define TLB_PROLOG \
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mtspr SPR_SPRG4, %r1; /* Save SP */ \
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mtspr SPR_SPRG4, %r1; /* Save SP */ \
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@ -77,14 +77,14 @@ struct pvo_entry;
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#endif
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#endif
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#define BOOKE_CRITSAVE_LEN (CPUSAVE_LEN + 2)
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#define BOOKE_CRITSAVE_LEN (CPUSAVE_LEN + 2)
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#define BOOKE_TLB_MAXNEST 3
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#define BOOKE_TLB_MAXNEST 4
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#define BOOKE_TLB_SAVELEN 16
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#define BOOKE_TLB_SAVELEN 16
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#define BOOKE_TLBSAVE_LEN (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
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#define BOOKE_TLBSAVE_LEN (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
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#ifdef __powerpc64__
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#ifdef __powerpc64__
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#define BOOKE_PCPU_PAD 901
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#define BOOKE_PCPU_PAD 901
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#else
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#else
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#define BOOKE_PCPU_PAD 429
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#define BOOKE_PCPU_PAD 365
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#endif
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#endif
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#define PCPU_MD_BOOKE_FIELDS \
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#define PCPU_MD_BOOKE_FIELDS \
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register_t critsave[BOOKE_CRITSAVE_LEN]; \
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register_t critsave[BOOKE_CRITSAVE_LEN]; \
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