Extend the RX HAL API to include the RX queue identifier.
The AR93xx and later chips support two RX FIFO queues - a high and low priority queue. For legacy chips, just assume the queues are high priority. This is inspired by the reference driver but is a reimplementation of the API and code.
This commit is contained in:
parent
8efbd296e0
commit
d60a0680ba
@ -1078,8 +1078,8 @@ struct ath_hal {
|
||||
const struct ath_desc *ds, int *rates, int *tries);
|
||||
|
||||
/* Receive Functions */
|
||||
uint32_t __ahdecl(*ah_getRxDP)(struct ath_hal*);
|
||||
void __ahdecl(*ah_setRxDP)(struct ath_hal*, uint32_t rxdp);
|
||||
uint32_t __ahdecl(*ah_getRxDP)(struct ath_hal*, HAL_RX_QUEUE);
|
||||
void __ahdecl(*ah_setRxDP)(struct ath_hal*, uint32_t rxdp, HAL_RX_QUEUE);
|
||||
void __ahdecl(*ah_enableReceive)(struct ath_hal*);
|
||||
HAL_BOOL __ahdecl(*ah_stopDmaReceive)(struct ath_hal*);
|
||||
void __ahdecl(*ah_startPcuReceive)(struct ath_hal*);
|
||||
|
@ -180,8 +180,8 @@ extern void ar5210IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *);
|
||||
extern HAL_BOOL ar5210GetTxCompletionRates(struct ath_hal *ah,
|
||||
const struct ath_desc *, int *rates, int *tries);
|
||||
|
||||
extern uint32_t ar5210GetRxDP(struct ath_hal *);
|
||||
extern void ar5210SetRxDP(struct ath_hal *, uint32_t rxdp);
|
||||
extern uint32_t ar5210GetRxDP(struct ath_hal *, HAL_RX_QUEUE);
|
||||
extern void ar5210SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE);
|
||||
extern void ar5210EnableReceive(struct ath_hal *);
|
||||
extern HAL_BOOL ar5210StopDmaReceive(struct ath_hal *);
|
||||
extern void ar5210StartPcuReceive(struct ath_hal *);
|
||||
|
@ -30,8 +30,10 @@
|
||||
* Get the RXDP.
|
||||
*/
|
||||
uint32_t
|
||||
ar5210GetRxDP(struct ath_hal *ah)
|
||||
ar5210GetRxDP(struct ath_hal *ah, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
return OS_REG_READ(ah, AR_RXDP);
|
||||
}
|
||||
|
||||
@ -39,8 +41,10 @@ ar5210GetRxDP(struct ath_hal *ah)
|
||||
* Set the RxDP.
|
||||
*/
|
||||
void
|
||||
ar5210SetRxDP(struct ath_hal *ah, uint32_t rxdp)
|
||||
ar5210SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
OS_REG_WRITE(ah, AR_RXDP, rxdp);
|
||||
}
|
||||
|
||||
|
@ -205,8 +205,8 @@ extern void ar5211IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *);
|
||||
extern HAL_BOOL ar5211GetTxCompletionRates(struct ath_hal *ah,
|
||||
const struct ath_desc *ds0, int *rates, int *tries);
|
||||
|
||||
extern uint32_t ar5211GetRxDP(struct ath_hal *);
|
||||
extern void ar5211SetRxDP(struct ath_hal *, uint32_t rxdp);
|
||||
extern uint32_t ar5211GetRxDP(struct ath_hal *, HAL_RX_QUEUE);
|
||||
extern void ar5211SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE);
|
||||
extern void ar5211EnableReceive(struct ath_hal *);
|
||||
extern HAL_BOOL ar5211StopDmaReceive(struct ath_hal *);
|
||||
extern void ar5211StartPcuReceive(struct ath_hal *);
|
||||
|
@ -30,8 +30,10 @@
|
||||
* Get the RXDP.
|
||||
*/
|
||||
uint32_t
|
||||
ar5211GetRxDP(struct ath_hal *ah)
|
||||
ar5211GetRxDP(struct ath_hal *ah, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
return OS_REG_READ(ah, AR_RXDP);
|
||||
}
|
||||
|
||||
@ -39,8 +41,10 @@ ar5211GetRxDP(struct ath_hal *ah)
|
||||
* Set the RxDP.
|
||||
*/
|
||||
void
|
||||
ar5211SetRxDP(struct ath_hal *ah, uint32_t rxdp)
|
||||
ar5211SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
OS_REG_WRITE(ah, AR_RXDP, rxdp);
|
||||
HALASSERT(OS_REG_READ(ah, AR_RXDP) == rxdp);
|
||||
}
|
||||
|
@ -519,8 +519,8 @@ extern HAL_BOOL ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode,
|
||||
extern HAL_POWER_MODE ar5212GetPowerMode(struct ath_hal *ah);
|
||||
extern HAL_BOOL ar5212GetPowerStatus(struct ath_hal *ah);
|
||||
|
||||
extern uint32_t ar5212GetRxDP(struct ath_hal *ath);
|
||||
extern void ar5212SetRxDP(struct ath_hal *ah, uint32_t rxdp);
|
||||
extern uint32_t ar5212GetRxDP(struct ath_hal *ath, HAL_RX_QUEUE);
|
||||
extern void ar5212SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE);
|
||||
extern void ar5212EnableReceive(struct ath_hal *ah);
|
||||
extern HAL_BOOL ar5212StopDmaReceive(struct ath_hal *ah);
|
||||
extern void ar5212StartPcuReceive(struct ath_hal *ah);
|
||||
|
@ -29,8 +29,10 @@
|
||||
* Get the RXDP.
|
||||
*/
|
||||
uint32_t
|
||||
ar5212GetRxDP(struct ath_hal *ath)
|
||||
ar5212GetRxDP(struct ath_hal *ath, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
return OS_REG_READ(ath, AR_RXDP);
|
||||
}
|
||||
|
||||
@ -38,8 +40,10 @@ ar5212GetRxDP(struct ath_hal *ath)
|
||||
* Set the RxDP.
|
||||
*/
|
||||
void
|
||||
ar5212SetRxDP(struct ath_hal *ah, uint32_t rxdp)
|
||||
ar5212SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE qtype)
|
||||
{
|
||||
|
||||
HALASSERT(qtype == HAL_RX_QUEUE_HP);
|
||||
OS_REG_WRITE(ah, AR_RXDP, rxdp);
|
||||
HALASSERT(OS_REG_READ(ah, AR_RXDP) == rxdp);
|
||||
}
|
||||
|
@ -916,7 +916,7 @@ ath_rx_proc(struct ath_softc *sc, int resched)
|
||||
* Are there any net80211 buffer calls involved?
|
||||
*/
|
||||
bf = TAILQ_FIRST(&sc->sc_rxbuf);
|
||||
ath_hal_putrxbuf(ah, bf->bf_daddr);
|
||||
ath_hal_putrxbuf(ah, bf->bf_daddr, HAL_RX_QUEUE_HP);
|
||||
ath_hal_rxena(ah); /* enable recv descriptors */
|
||||
ath_mode_init(sc); /* set filters, etc. */
|
||||
ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
|
||||
@ -1002,7 +1002,7 @@ ath_legacy_stoprecv(struct ath_softc *sc, int dodelay)
|
||||
device_printf(sc->sc_dev,
|
||||
"%s: rx queue %p, link %p\n",
|
||||
__func__,
|
||||
(caddr_t)(uintptr_t) ath_hal_getrxbuf(ah),
|
||||
(caddr_t)(uintptr_t) ath_hal_getrxbuf(ah, HAL_RX_QUEUE_HP),
|
||||
sc->sc_rxlink);
|
||||
ix = 0;
|
||||
TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
|
||||
@ -1046,7 +1046,7 @@ ath_legacy_startrecv(struct ath_softc *sc)
|
||||
}
|
||||
|
||||
bf = TAILQ_FIRST(&sc->sc_rxbuf);
|
||||
ath_hal_putrxbuf(ah, bf->bf_daddr);
|
||||
ath_hal_putrxbuf(ah, bf->bf_daddr, HAL_RX_QUEUE_HP);
|
||||
ath_hal_rxena(ah); /* enable recv descriptors */
|
||||
ath_mode_init(sc); /* set filters, etc. */
|
||||
ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
|
||||
|
@ -745,8 +745,8 @@ void ath_intr(void *);
|
||||
((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1)))
|
||||
#define ath_hal_waitforbeacon(_ah, _bf) \
|
||||
((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr))
|
||||
#define ath_hal_putrxbuf(_ah, _bufaddr) \
|
||||
((*(_ah)->ah_setRxDP)((_ah), (_bufaddr)))
|
||||
#define ath_hal_putrxbuf(_ah, _bufaddr, _rxq) \
|
||||
((*(_ah)->ah_setRxDP)((_ah), (_bufaddr), (_rxq)))
|
||||
/* NB: common across all chips */
|
||||
#define AR_TSF_L32 0x804c /* MAC local clock lower 32 bits */
|
||||
#define ath_hal_gettsf32(_ah) \
|
||||
@ -763,8 +763,8 @@ void ath_intr(void *);
|
||||
((*(_ah)->ah_getTxDP)((_ah), (_q)))
|
||||
#define ath_hal_numtxpending(_ah, _q) \
|
||||
((*(_ah)->ah_numTxPending)((_ah), (_q)))
|
||||
#define ath_hal_getrxbuf(_ah) \
|
||||
((*(_ah)->ah_getRxDP)((_ah)))
|
||||
#define ath_hal_getrxbuf(_ah, _rxq) \
|
||||
((*(_ah)->ah_getRxDP)((_ah), (_rxq)))
|
||||
#define ath_hal_txstart(_ah, _q) \
|
||||
((*(_ah)->ah_startTxDma)((_ah), (_q)))
|
||||
#define ath_hal_setchannel(_ah, _chan) \
|
||||
|
Loading…
Reference in New Issue
Block a user