When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled. The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where RIFS is disabled by default. This seems to quieten the occasional baseband hang I've been seeing with the AR9160 in STA mode under constant heavy traffic load. Obtained from: Atheros
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@ -199,7 +199,8 @@ extern HAL_STATUS ar5416GetCapability(struct ath_hal *ah,
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extern HAL_BOOL ar5416GetDiagState(struct ath_hal *ah, int request,
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const void *args, uint32_t argsize,
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void **result, uint32_t *resultsize);
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extern HAL_BOOL ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable);
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extern HAL_BOOL ar5416SetRifsDelay(struct ath_hal *ah,
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const struct ieee80211_channel *chan, HAL_BOOL enable);
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extern HAL_BOOL ar5416SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode,
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int setChip);
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@ -367,9 +367,18 @@ typedef struct {
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} hal_mac_hang_check_t;
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HAL_BOOL
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ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable)
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ar5416SetRifsDelay(struct ath_hal *ah, const struct ieee80211_channel *chan,
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HAL_BOOL enable)
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{
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uint32_t val;
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HAL_BOOL is_chan_2g = AH_FALSE;
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HAL_BOOL is_ht40 = AH_FALSE;
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if (chan)
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is_chan_2g = IEEE80211_IS_CHAN_2GHZ(chan);
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if (chan)
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is_ht40 = IEEE80211_IS_CHAN_HT40(chan);
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/* Only support disabling RIFS delay for now */
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HALASSERT(enable == AH_FALSE);
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@ -382,6 +391,31 @@ ar5416SetRifsDelay(struct ath_hal *ah, HAL_BOOL enable)
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val &= ~AR_PHY_RIFS_INIT_DELAY;
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OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
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/*
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* For Owl, RIFS RX parameters are controlled differently;
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* it isn't enabled in the inivals by default.
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*
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* For Sowl/Howl, RIFS RX is enabled in the inivals by default;
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* the following code sets them back to non-RIFS values.
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*
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* For > Sowl/Howl, RIFS RX can be left on by default and so
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* this function shouldn't be called.
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*/
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if ((! AR_SREV_SOWL(ah)) && (! AR_SREV_HOWL(ah)))
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return AH_TRUE;
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/* Reset search delay to default values */
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if (is_chan_2g)
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if (is_ht40)
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OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x268);
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else
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OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x134);
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else
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if (is_ht40)
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OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x370);
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else
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OS_REG_WRITE(ah, AR_PHY_SEARCH_START_DELAY, 0x1b8);
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return AH_TRUE;
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}
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@ -2591,7 +2591,7 @@ ar5416OverrideIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
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* hang issues.
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*/
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if (AR_SREV_HOWL(ah) || AR_SREV_SOWL(ah))
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(void) ar5416SetRifsDelay(ah, AH_FALSE);
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(void) ar5416SetRifsDelay(ah, chan, AH_FALSE);
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if (!AR_SREV_5416_V20_OR_LATER(ah) || AR_SREV_MERLIN(ah))
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return;
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@ -93,6 +93,8 @@
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#define AR9280_PHY_RXGAIN_TXRX_MARGIN 0x001FC000
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#define AR9280_PHY_RXGAIN_TXRX_MARGIN_S 14
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#define AR_PHY_SEARCH_START_DELAY 0x9918 /* search start delay */
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#define AR_PHY_EXT_CCA 0x99bc
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#define AR_PHY_EXT_CCA_CYCPWR_THR1 0x0000FE00
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#define AR_PHY_EXT_CCA_CYCPWR_THR1_S 9
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